10b57cec5SDimitry Andric //===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric /// \file 100b57cec5SDimitry Andric /// Contains the definition of a TargetInstrInfo class that is common 110b57cec5SDimitry Andric /// to all AMD GPUs. 120b57cec5SDimitry Andric // 130b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 140b57cec5SDimitry Andric 150b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H 160b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AMDGPU_AMDGPUINSTRINFO_H 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric #include "Utils/AMDGPUBaseInfo.h" 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric namespace llvm { 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric class GCNSubtarget; 23e8d8bef9SDimitry Andric class MachineMemOperand; 240b57cec5SDimitry Andric 250b57cec5SDimitry Andric class AMDGPUInstrInfo { 260b57cec5SDimitry Andric public: 270b57cec5SDimitry Andric explicit AMDGPUInstrInfo(const GCNSubtarget &st); 280b57cec5SDimitry Andric 290b57cec5SDimitry Andric static bool isUniformMMO(const MachineMemOperand *MMO); 300b57cec5SDimitry Andric }; 310b57cec5SDimitry Andric 320b57cec5SDimitry Andric namespace AMDGPU { 330b57cec5SDimitry Andric 340b57cec5SDimitry Andric struct RsrcIntrinsic { 350b57cec5SDimitry Andric unsigned Intr; 360b57cec5SDimitry Andric uint8_t RsrcArg; 370b57cec5SDimitry Andric bool IsImage; 380b57cec5SDimitry Andric }; 390b57cec5SDimitry Andric const RsrcIntrinsic *lookupRsrcIntrinsic(unsigned Intr); 400b57cec5SDimitry Andric 410b57cec5SDimitry Andric struct D16ImageDimIntrinsic { 420b57cec5SDimitry Andric unsigned Intr; 430b57cec5SDimitry Andric unsigned D16HelperIntr; 440b57cec5SDimitry Andric }; 450b57cec5SDimitry Andric const D16ImageDimIntrinsic *lookupD16ImageDimIntrinsic(unsigned Intr); 460b57cec5SDimitry Andric 470b57cec5SDimitry Andric struct ImageDimIntrinsicInfo { 480b57cec5SDimitry Andric unsigned Intr; 490b57cec5SDimitry Andric unsigned BaseOpcode; 500b57cec5SDimitry Andric MIMGDim Dim; 51e8d8bef9SDimitry Andric 52*04eeddc0SDimitry Andric uint8_t NumOffsetArgs; 53*04eeddc0SDimitry Andric uint8_t NumBiasArgs; 54*04eeddc0SDimitry Andric uint8_t NumZCompareArgs; 55e8d8bef9SDimitry Andric uint8_t NumGradients; 56e8d8bef9SDimitry Andric uint8_t NumDmask; 57e8d8bef9SDimitry Andric uint8_t NumData; 58e8d8bef9SDimitry Andric uint8_t NumVAddrs; 59e8d8bef9SDimitry Andric uint8_t NumArgs; 60e8d8bef9SDimitry Andric 61e8d8bef9SDimitry Andric uint8_t DMaskIndex; 62e8d8bef9SDimitry Andric uint8_t VAddrStart; 63*04eeddc0SDimitry Andric uint8_t OffsetIndex; 64*04eeddc0SDimitry Andric uint8_t BiasIndex; 65*04eeddc0SDimitry Andric uint8_t ZCompareIndex; 66e8d8bef9SDimitry Andric uint8_t GradientStart; 67e8d8bef9SDimitry Andric uint8_t CoordStart; 68e8d8bef9SDimitry Andric uint8_t LodIndex; 69e8d8bef9SDimitry Andric uint8_t MipIndex; 70e8d8bef9SDimitry Andric uint8_t VAddrEnd; 71e8d8bef9SDimitry Andric uint8_t RsrcIndex; 72e8d8bef9SDimitry Andric uint8_t SampIndex; 73e8d8bef9SDimitry Andric uint8_t UnormIndex; 74e8d8bef9SDimitry Andric uint8_t TexFailCtrlIndex; 75e8d8bef9SDimitry Andric uint8_t CachePolicyIndex; 76e8d8bef9SDimitry Andric 77*04eeddc0SDimitry Andric uint8_t BiasTyArg; 78e8d8bef9SDimitry Andric uint8_t GradientTyArg; 79e8d8bef9SDimitry Andric uint8_t CoordTyArg; 800b57cec5SDimitry Andric }; 810b57cec5SDimitry Andric const ImageDimIntrinsicInfo *getImageDimIntrinsicInfo(unsigned Intr); 820b57cec5SDimitry Andric 83349cc55cSDimitry Andric const ImageDimIntrinsicInfo * 84349cc55cSDimitry Andric getImageDimIntrinsicByBaseOpcode(unsigned BaseOpcode, unsigned Dim); 855ffd83dbSDimitry Andric 860b57cec5SDimitry Andric } // end AMDGPU namespace 870b57cec5SDimitry Andric } // End llvm namespace 880b57cec5SDimitry Andric 890b57cec5SDimitry Andric #endif 90