1 //===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H 10 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H 11 12 #include "AMDGPUInstrInfo.h" 13 #include "llvm/CodeGen/Register.h" 14 #include <tuple> 15 16 namespace llvm { 17 18 class MachineInstr; 19 class MachineRegisterInfo; 20 21 namespace AMDGPU { 22 23 /// Returns Base register, constant offset, and offset def point. 24 std::tuple<Register, unsigned, MachineInstr *> 25 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg); 26 27 bool isLegalVOP3PShuffleMask(ArrayRef<int> Mask); 28 29 /// Return number of address arguments, and the number of gradients for an image 30 /// intrinsic. 31 inline std::pair<int, int> 32 getImageNumVAddr(const AMDGPU::ImageDimIntrinsicInfo *ImageDimIntr, 33 const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode) { 34 const AMDGPU::MIMGDimInfo *DimInfo 35 = AMDGPU::getMIMGDimInfo(ImageDimIntr->Dim); 36 37 int NumGradients = BaseOpcode->Gradients ? DimInfo->NumGradients : 0; 38 int NumCoords = BaseOpcode->Coordinates ? DimInfo->NumCoords : 0; 39 int NumLCM = BaseOpcode->LodOrClampOrMip ? 1 : 0; 40 int NumVAddr = BaseOpcode->NumExtraArgs + NumGradients + NumCoords + NumLCM; 41 return {NumVAddr, NumGradients}; 42 } 43 44 /// Return index of dmask in an gMIR image intrinsic 45 inline int getDMaskIdx(const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode, 46 int NumDefs) { 47 assert(!BaseOpcode->Atomic); 48 return NumDefs + 1 + (BaseOpcode->Store ? 1 : 0); 49 } 50 51 /// Return first address operand index in a gMIR image intrinsic. 52 inline int getImageVAddrIdxBegin(const AMDGPU::MIMGBaseOpcodeInfo *BaseOpcode, 53 int NumDefs) { 54 if (BaseOpcode->Atomic) 55 return NumDefs + 1 + (BaseOpcode->AtomicX2 ? 2 : 1); 56 return getDMaskIdx(BaseOpcode, NumDefs) + 1; 57 } 58 59 } 60 } 61 62 #endif 63