xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
1*5f757f3fSDimitry Andric //===-- AMDGPUGlobalISelDivergenceLowering.cpp ----------------------------===//
2*5f757f3fSDimitry Andric //
3*5f757f3fSDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*5f757f3fSDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*5f757f3fSDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*5f757f3fSDimitry Andric //
7*5f757f3fSDimitry Andric //===----------------------------------------------------------------------===//
8*5f757f3fSDimitry Andric //
9*5f757f3fSDimitry Andric /// \file
10*5f757f3fSDimitry Andric /// GlobalISel pass that selects divergent i1 phis as lane mask phis.
11*5f757f3fSDimitry Andric /// Lane mask merging uses same algorithm as SDAG in SILowerI1Copies.
12*5f757f3fSDimitry Andric /// Handles all cases of temporal divergence.
13*5f757f3fSDimitry Andric /// For divergent non-phi i1 and uniform i1 uses outside of the cycle this pass
14*5f757f3fSDimitry Andric /// currently depends on LCSSA to insert phis with one incoming.
15*5f757f3fSDimitry Andric //
16*5f757f3fSDimitry Andric //===----------------------------------------------------------------------===//
17*5f757f3fSDimitry Andric 
18*5f757f3fSDimitry Andric #include "AMDGPU.h"
19*5f757f3fSDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h"
20*5f757f3fSDimitry Andric 
21*5f757f3fSDimitry Andric #define DEBUG_TYPE "amdgpu-global-isel-divergence-lowering"
22*5f757f3fSDimitry Andric 
23*5f757f3fSDimitry Andric using namespace llvm;
24*5f757f3fSDimitry Andric 
25*5f757f3fSDimitry Andric namespace {
26*5f757f3fSDimitry Andric 
27*5f757f3fSDimitry Andric class AMDGPUGlobalISelDivergenceLowering : public MachineFunctionPass {
28*5f757f3fSDimitry Andric public:
29*5f757f3fSDimitry Andric   static char ID;
30*5f757f3fSDimitry Andric 
31*5f757f3fSDimitry Andric public:
32*5f757f3fSDimitry Andric   AMDGPUGlobalISelDivergenceLowering() : MachineFunctionPass(ID) {
33*5f757f3fSDimitry Andric     initializeAMDGPUGlobalISelDivergenceLoweringPass(
34*5f757f3fSDimitry Andric         *PassRegistry::getPassRegistry());
35*5f757f3fSDimitry Andric   }
36*5f757f3fSDimitry Andric 
37*5f757f3fSDimitry Andric   bool runOnMachineFunction(MachineFunction &MF) override;
38*5f757f3fSDimitry Andric 
39*5f757f3fSDimitry Andric   StringRef getPassName() const override {
40*5f757f3fSDimitry Andric     return "AMDGPU GlobalISel divergence lowering";
41*5f757f3fSDimitry Andric   }
42*5f757f3fSDimitry Andric 
43*5f757f3fSDimitry Andric   void getAnalysisUsage(AnalysisUsage &AU) const override {
44*5f757f3fSDimitry Andric     AU.setPreservesCFG();
45*5f757f3fSDimitry Andric     MachineFunctionPass::getAnalysisUsage(AU);
46*5f757f3fSDimitry Andric   }
47*5f757f3fSDimitry Andric };
48*5f757f3fSDimitry Andric 
49*5f757f3fSDimitry Andric } // End anonymous namespace.
50*5f757f3fSDimitry Andric 
51*5f757f3fSDimitry Andric INITIALIZE_PASS_BEGIN(AMDGPUGlobalISelDivergenceLowering, DEBUG_TYPE,
52*5f757f3fSDimitry Andric                       "AMDGPU GlobalISel divergence lowering", false, false)
53*5f757f3fSDimitry Andric INITIALIZE_PASS_END(AMDGPUGlobalISelDivergenceLowering, DEBUG_TYPE,
54*5f757f3fSDimitry Andric                     "AMDGPU GlobalISel divergence lowering", false, false)
55*5f757f3fSDimitry Andric 
56*5f757f3fSDimitry Andric char AMDGPUGlobalISelDivergenceLowering::ID = 0;
57*5f757f3fSDimitry Andric 
58*5f757f3fSDimitry Andric char &llvm::AMDGPUGlobalISelDivergenceLoweringID =
59*5f757f3fSDimitry Andric     AMDGPUGlobalISelDivergenceLowering::ID;
60*5f757f3fSDimitry Andric 
61*5f757f3fSDimitry Andric FunctionPass *llvm::createAMDGPUGlobalISelDivergenceLoweringPass() {
62*5f757f3fSDimitry Andric   return new AMDGPUGlobalISelDivergenceLowering();
63*5f757f3fSDimitry Andric }
64*5f757f3fSDimitry Andric 
65*5f757f3fSDimitry Andric bool AMDGPUGlobalISelDivergenceLowering::runOnMachineFunction(
66*5f757f3fSDimitry Andric     MachineFunction &MF) {
67*5f757f3fSDimitry Andric   return false;
68*5f757f3fSDimitry Andric }
69