xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCombine.td (revision 77013d11e6483b970af25e13c9b892075742f7e5)
1//=- AMDGPUCombine.td - Define AMDGPU Combine Rules ----------*- tablegen -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9include "llvm/Target/GlobalISel/Combine.td"
10
11// TODO: This really belongs after legalization after scalarization.
12// TODO: GICombineRules should accept subtarget predicates
13
14def fmin_fmax_legacy_matchdata : GIDefMatchData<"AMDGPUPostLegalizerCombinerHelper::FMinFMaxLegacyInfo">;
15
16def fcmp_select_to_fmin_fmax_legacy : GICombineRule<
17  (defs root:$select, fmin_fmax_legacy_matchdata:$matchinfo),
18  (match (wip_match_opcode G_SELECT):$select,
19         [{ return PostLegalizerHelper.matchFMinFMaxLegacy(*${select}, ${matchinfo}); }]),
20  (apply [{ PostLegalizerHelper.applySelectFCmpToFMinToFMaxLegacy(*${select}, ${matchinfo}); }])>;
21
22
23def uchar_to_float : GICombineRule<
24  (defs root:$itofp),
25  (match (wip_match_opcode G_UITOFP, G_SITOFP):$itofp,
26         [{ return PostLegalizerHelper.matchUCharToFloat(*${itofp}); }]),
27  (apply [{ PostLegalizerHelper.applyUCharToFloat(*${itofp}); }])>;
28
29def cvt_f32_ubyteN_matchdata : GIDefMatchData<"AMDGPUPostLegalizerCombinerHelper::CvtF32UByteMatchInfo">;
30
31def cvt_f32_ubyteN : GICombineRule<
32  (defs root:$cvt_f32_ubyteN, cvt_f32_ubyteN_matchdata:$matchinfo),
33  (match (wip_match_opcode G_AMDGPU_CVT_F32_UBYTE0,
34                           G_AMDGPU_CVT_F32_UBYTE1,
35                           G_AMDGPU_CVT_F32_UBYTE2,
36                           G_AMDGPU_CVT_F32_UBYTE3):$cvt_f32_ubyteN,
37         [{ return PostLegalizerHelper.matchCvtF32UByteN(*${cvt_f32_ubyteN}, ${matchinfo}); }]),
38  (apply [{ PostLegalizerHelper.applyCvtF32UByteN(*${cvt_f32_ubyteN}, ${matchinfo}); }])>;
39
40// Combines which should only apply on SI/VI
41def gfx6gfx7_combines : GICombineGroup<[fcmp_select_to_fmin_fmax_legacy]>;
42
43
44def AMDGPUPreLegalizerCombinerHelper: GICombinerHelper<
45  "AMDGPUGenPreLegalizerCombinerHelper", [all_combines]> {
46  let DisableRuleOption = "amdgpuprelegalizercombiner-disable-rule";
47}
48
49def AMDGPUPostLegalizerCombinerHelper: GICombinerHelper<
50  "AMDGPUGenPostLegalizerCombinerHelper",
51  [all_combines, gfx6gfx7_combines,
52   uchar_to_float, cvt_f32_ubyteN]> {
53  let DisableRuleOption = "amdgpupostlegalizercombiner-disable-rule";
54  let StateClass = "AMDGPUPostLegalizerCombinerHelperState";
55  let AdditionalArguments = [];
56}
57
58def AMDGPURegBankCombinerHelper : GICombinerHelper<
59  "AMDGPUGenRegBankCombinerHelper", []> {
60  let DisableRuleOption = "amdgpuregbankcombiner-disable-rule";
61}
62