1*0fca6ea1SDimitry Andric //===- lib/Target/AMDGPU/AMDGPUCodeGenPassBuilder.cpp ---------------------===//
2*0fca6ea1SDimitry Andric //
3*0fca6ea1SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4*0fca6ea1SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
5*0fca6ea1SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6*0fca6ea1SDimitry Andric //
7*0fca6ea1SDimitry Andric //===----------------------------------------------------------------------===//
8*0fca6ea1SDimitry Andric
9*0fca6ea1SDimitry Andric #include "AMDGPUCodeGenPassBuilder.h"
10*0fca6ea1SDimitry Andric #include "AMDGPUISelDAGToDAG.h"
11*0fca6ea1SDimitry Andric #include "AMDGPUTargetMachine.h"
12*0fca6ea1SDimitry Andric #include "llvm/Analysis/UniformityAnalysis.h"
13*0fca6ea1SDimitry Andric
14*0fca6ea1SDimitry Andric using namespace llvm;
15*0fca6ea1SDimitry Andric
AMDGPUCodeGenPassBuilder(AMDGPUTargetMachine & TM,const CGPassBuilderOption & Opts,PassInstrumentationCallbacks * PIC)16*0fca6ea1SDimitry Andric AMDGPUCodeGenPassBuilder::AMDGPUCodeGenPassBuilder(
17*0fca6ea1SDimitry Andric AMDGPUTargetMachine &TM, const CGPassBuilderOption &Opts,
18*0fca6ea1SDimitry Andric PassInstrumentationCallbacks *PIC)
19*0fca6ea1SDimitry Andric : CodeGenPassBuilder(TM, Opts, PIC) {
20*0fca6ea1SDimitry Andric Opt.RequiresCodeGenSCCOrder = true;
21*0fca6ea1SDimitry Andric // Exceptions and StackMaps are not supported, so these passes will never do
22*0fca6ea1SDimitry Andric // anything.
23*0fca6ea1SDimitry Andric // Garbage collection is not supported.
24*0fca6ea1SDimitry Andric disablePass<StackMapLivenessPass, FuncletLayoutPass,
25*0fca6ea1SDimitry Andric ShadowStackGCLoweringPass>();
26*0fca6ea1SDimitry Andric }
27*0fca6ea1SDimitry Andric
addPreISel(AddIRPass & addPass) const28*0fca6ea1SDimitry Andric void AMDGPUCodeGenPassBuilder::addPreISel(AddIRPass &addPass) const {
29*0fca6ea1SDimitry Andric // TODO: Add passes pre instruction selection.
30*0fca6ea1SDimitry Andric // Test only, convert to real IR passes in future.
31*0fca6ea1SDimitry Andric addPass(RequireAnalysisPass<UniformityInfoAnalysis, Function>());
32*0fca6ea1SDimitry Andric }
33*0fca6ea1SDimitry Andric
addAsmPrinter(AddMachinePass & addPass,CreateMCStreamer) const34*0fca6ea1SDimitry Andric void AMDGPUCodeGenPassBuilder::addAsmPrinter(AddMachinePass &addPass,
35*0fca6ea1SDimitry Andric CreateMCStreamer) const {
36*0fca6ea1SDimitry Andric // TODO: Add AsmPrinter.
37*0fca6ea1SDimitry Andric }
38*0fca6ea1SDimitry Andric
addInstSelector(AddMachinePass & addPass) const39*0fca6ea1SDimitry Andric Error AMDGPUCodeGenPassBuilder::addInstSelector(AddMachinePass &addPass) const {
40*0fca6ea1SDimitry Andric addPass(AMDGPUISelDAGToDAGPass(TM));
41*0fca6ea1SDimitry Andric return Error::success();
42*0fca6ea1SDimitry Andric }
43