1 //===- lib/Target/AMDGPU/AMDGPUCallLowering.h - Call lowering -*- C++ -*---===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// This file describes how to lower LLVM calls to machine code calls. 11 /// 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H 15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUCALLLOWERING_H 16 17 #include "llvm/CodeGen/GlobalISel/CallLowering.h" 18 19 namespace llvm { 20 21 class AMDGPUTargetLowering; 22 class MachineInstrBuilder; 23 24 class AMDGPUCallLowering final : public CallLowering { 25 void lowerParameterPtr(Register DstReg, MachineIRBuilder &B, Type *ParamTy, 26 uint64_t Offset) const; 27 28 void lowerParameter(MachineIRBuilder &B, Type *ParamTy, uint64_t Offset, 29 Align Alignment, Register DstReg) const; 30 31 /// A function of this type is used to perform value split action. 32 using SplitArgTy = std::function<void(ArrayRef<Register>, Register, LLT, LLT, int)>; 33 34 void splitToValueTypes(MachineIRBuilder &B, const ArgInfo &OrigArgInfo, 35 SmallVectorImpl<ArgInfo> &SplitArgs, 36 const DataLayout &DL, CallingConv::ID CallConv) const; 37 38 void processSplitArgs(MachineIRBuilder &B, const ArgInfo &OrigArgInfo, 39 const SmallVectorImpl<ArgInfo> &SplitArg, 40 SmallVectorImpl<ArgInfo> &SplitArgs, 41 const DataLayout &DL, CallingConv::ID CallConv, 42 bool IsOutgoing, 43 SplitArgTy PerformArgSplit) const; 44 45 bool canLowerReturn(MachineFunction &MF, CallingConv::ID CallConv, 46 SmallVectorImpl<BaseArgInfo> &Outs, 47 bool IsVarArg) const override; 48 49 bool lowerReturnVal(MachineIRBuilder &B, const Value *Val, 50 ArrayRef<Register> VRegs, MachineInstrBuilder &Ret) const; 51 52 public: 53 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI); 54 55 bool lowerReturn(MachineIRBuilder &B, const Value *Val, 56 ArrayRef<Register> VRegs, 57 FunctionLoweringInfo &FLI) const override; 58 59 bool lowerFormalArgumentsKernel(MachineIRBuilder &B, const Function &F, 60 ArrayRef<ArrayRef<Register>> VRegs) const; 61 62 bool lowerFormalArguments(MachineIRBuilder &B, const Function &F, 63 ArrayRef<ArrayRef<Register>> VRegs, 64 FunctionLoweringInfo &FLI) const override; 65 66 bool passSpecialInputs(MachineIRBuilder &MIRBuilder, 67 CCState &CCInfo, 68 SmallVectorImpl<std::pair<MCRegister, Register>> &ArgRegs, 69 CallLoweringInfo &Info) const; 70 71 bool lowerCall(MachineIRBuilder &MIRBuilder, 72 CallLoweringInfo &Info) const override; 73 74 static CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg); 75 static CCAssignFn *CCAssignFnForReturn(CallingConv::ID CC, bool IsVarArg); 76 }; 77 } // End of namespace llvm; 78 #endif 79