10b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric 90b57cec5SDimitry Andric #include "AMDGPUArgumentUsageInfo.h" 10e8d8bef9SDimitry Andric #include "AMDGPU.h" 115ffd83dbSDimitry Andric #include "AMDGPUTargetMachine.h" 125ffd83dbSDimitry Andric #include "MCTargetDesc/AMDGPUMCTargetDesc.h" 130b57cec5SDimitry Andric #include "SIRegisterInfo.h" 14e8d8bef9SDimitry Andric #include "llvm/CodeGen/TargetRegisterInfo.h" 15e8d8bef9SDimitry Andric #include "llvm/IR/Function.h" 160b57cec5SDimitry Andric #include "llvm/Support/NativeFormatting.h" 170b57cec5SDimitry Andric #include "llvm/Support/raw_ostream.h" 180b57cec5SDimitry Andric 190b57cec5SDimitry Andric using namespace llvm; 200b57cec5SDimitry Andric 210b57cec5SDimitry Andric #define DEBUG_TYPE "amdgpu-argument-reg-usage-info" 220b57cec5SDimitry Andric 230b57cec5SDimitry Andric INITIALIZE_PASS(AMDGPUArgumentUsageInfo, DEBUG_TYPE, 240b57cec5SDimitry Andric "Argument Register Usage Information Storage", false, true) 250b57cec5SDimitry Andric 260b57cec5SDimitry Andric void ArgDescriptor::print(raw_ostream &OS, 270b57cec5SDimitry Andric const TargetRegisterInfo *TRI) const { 280b57cec5SDimitry Andric if (!isSet()) { 290b57cec5SDimitry Andric OS << "<not set>\n"; 300b57cec5SDimitry Andric return; 310b57cec5SDimitry Andric } 320b57cec5SDimitry Andric 330b57cec5SDimitry Andric if (isRegister()) 340b57cec5SDimitry Andric OS << "Reg " << printReg(getRegister(), TRI); 350b57cec5SDimitry Andric else 360b57cec5SDimitry Andric OS << "Stack offset " << getStackOffset(); 370b57cec5SDimitry Andric 380b57cec5SDimitry Andric if (isMasked()) { 390b57cec5SDimitry Andric OS << " & "; 400b57cec5SDimitry Andric llvm::write_hex(OS, Mask, llvm::HexPrintStyle::PrefixLower); 410b57cec5SDimitry Andric } 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric OS << '\n'; 440b57cec5SDimitry Andric } 450b57cec5SDimitry Andric 460b57cec5SDimitry Andric char AMDGPUArgumentUsageInfo::ID = 0; 470b57cec5SDimitry Andric 480b57cec5SDimitry Andric const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::ExternFunctionInfo{}; 490b57cec5SDimitry Andric 505ffd83dbSDimitry Andric // Hardcoded registers from fixed function ABI 515ffd83dbSDimitry Andric const AMDGPUFunctionArgInfo AMDGPUArgumentUsageInfo::FixedABIFunctionInfo 525ffd83dbSDimitry Andric = AMDGPUFunctionArgInfo::fixedABILayout(); 535ffd83dbSDimitry Andric 540b57cec5SDimitry Andric bool AMDGPUArgumentUsageInfo::doInitialization(Module &M) { 550b57cec5SDimitry Andric return false; 560b57cec5SDimitry Andric } 570b57cec5SDimitry Andric 580b57cec5SDimitry Andric bool AMDGPUArgumentUsageInfo::doFinalization(Module &M) { 590b57cec5SDimitry Andric ArgInfoMap.clear(); 600b57cec5SDimitry Andric return false; 610b57cec5SDimitry Andric } 620b57cec5SDimitry Andric 630b57cec5SDimitry Andric void AMDGPUArgumentUsageInfo::print(raw_ostream &OS, const Module *M) const { 640b57cec5SDimitry Andric for (const auto &FI : ArgInfoMap) { 650b57cec5SDimitry Andric OS << "Arguments for " << FI.first->getName() << '\n' 660b57cec5SDimitry Andric << " PrivateSegmentBuffer: " << FI.second.PrivateSegmentBuffer 670b57cec5SDimitry Andric << " DispatchPtr: " << FI.second.DispatchPtr 680b57cec5SDimitry Andric << " QueuePtr: " << FI.second.QueuePtr 690b57cec5SDimitry Andric << " KernargSegmentPtr: " << FI.second.KernargSegmentPtr 700b57cec5SDimitry Andric << " DispatchID: " << FI.second.DispatchID 710b57cec5SDimitry Andric << " FlatScratchInit: " << FI.second.FlatScratchInit 720b57cec5SDimitry Andric << " PrivateSegmentSize: " << FI.second.PrivateSegmentSize 730b57cec5SDimitry Andric << " WorkGroupIDX: " << FI.second.WorkGroupIDX 740b57cec5SDimitry Andric << " WorkGroupIDY: " << FI.second.WorkGroupIDY 750b57cec5SDimitry Andric << " WorkGroupIDZ: " << FI.second.WorkGroupIDZ 760b57cec5SDimitry Andric << " WorkGroupInfo: " << FI.second.WorkGroupInfo 770b57cec5SDimitry Andric << " PrivateSegmentWaveByteOffset: " 780b57cec5SDimitry Andric << FI.second.PrivateSegmentWaveByteOffset 790b57cec5SDimitry Andric << " ImplicitBufferPtr: " << FI.second.ImplicitBufferPtr 800b57cec5SDimitry Andric << " ImplicitArgPtr: " << FI.second.ImplicitArgPtr 810b57cec5SDimitry Andric << " WorkItemIDX " << FI.second.WorkItemIDX 820b57cec5SDimitry Andric << " WorkItemIDY " << FI.second.WorkItemIDY 830b57cec5SDimitry Andric << " WorkItemIDZ " << FI.second.WorkItemIDZ 840b57cec5SDimitry Andric << '\n'; 850b57cec5SDimitry Andric } 860b57cec5SDimitry Andric } 870b57cec5SDimitry Andric 885ffd83dbSDimitry Andric std::tuple<const ArgDescriptor *, const TargetRegisterClass *, LLT> 890b57cec5SDimitry Andric AMDGPUFunctionArgInfo::getPreloadedValue( 900b57cec5SDimitry Andric AMDGPUFunctionArgInfo::PreloadedValue Value) const { 910b57cec5SDimitry Andric switch (Value) { 920b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_BUFFER: { 935ffd83dbSDimitry Andric return std::make_tuple(PrivateSegmentBuffer ? &PrivateSegmentBuffer 945ffd83dbSDimitry Andric : nullptr, 95*fe6060f1SDimitry Andric &AMDGPU::SGPR_128RegClass, LLT::fixed_vector(4, 32)); 960b57cec5SDimitry Andric } 970b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::IMPLICIT_BUFFER_PTR: 985ffd83dbSDimitry Andric return std::make_tuple(ImplicitBufferPtr ? &ImplicitBufferPtr : nullptr, 995ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, 1005ffd83dbSDimitry Andric LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); 1010b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_X: 1025ffd83dbSDimitry Andric return std::make_tuple(WorkGroupIDX ? &WorkGroupIDX : nullptr, 1035ffd83dbSDimitry Andric &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); 1040b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_Y: 1055ffd83dbSDimitry Andric return std::make_tuple(WorkGroupIDY ? &WorkGroupIDY : nullptr, 1065ffd83dbSDimitry Andric &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); 1070b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKGROUP_ID_Z: 1085ffd83dbSDimitry Andric return std::make_tuple(WorkGroupIDZ ? &WorkGroupIDZ : nullptr, 1095ffd83dbSDimitry Andric &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); 1100b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::PRIVATE_SEGMENT_WAVE_BYTE_OFFSET: 1115ffd83dbSDimitry Andric return std::make_tuple( 1120b57cec5SDimitry Andric PrivateSegmentWaveByteOffset ? &PrivateSegmentWaveByteOffset : nullptr, 1135ffd83dbSDimitry Andric &AMDGPU::SGPR_32RegClass, LLT::scalar(32)); 1140b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::KERNARG_SEGMENT_PTR: 1155ffd83dbSDimitry Andric return std::make_tuple(KernargSegmentPtr ? &KernargSegmentPtr : nullptr, 1165ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, 1175ffd83dbSDimitry Andric LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); 1180b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::IMPLICIT_ARG_PTR: 1195ffd83dbSDimitry Andric return std::make_tuple(ImplicitArgPtr ? &ImplicitArgPtr : nullptr, 1205ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, 1215ffd83dbSDimitry Andric LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); 1220b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::DISPATCH_ID: 1235ffd83dbSDimitry Andric return std::make_tuple(DispatchID ? &DispatchID : nullptr, 1245ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, LLT::scalar(64)); 1250b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::FLAT_SCRATCH_INIT: 1265ffd83dbSDimitry Andric return std::make_tuple(FlatScratchInit ? &FlatScratchInit : nullptr, 1275ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, LLT::scalar(64)); 1280b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::DISPATCH_PTR: 1295ffd83dbSDimitry Andric return std::make_tuple(DispatchPtr ? &DispatchPtr : nullptr, 1305ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, 1315ffd83dbSDimitry Andric LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); 1320b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::QUEUE_PTR: 1335ffd83dbSDimitry Andric return std::make_tuple(QueuePtr ? &QueuePtr : nullptr, 1345ffd83dbSDimitry Andric &AMDGPU::SGPR_64RegClass, 1355ffd83dbSDimitry Andric LLT::pointer(AMDGPUAS::CONSTANT_ADDRESS, 64)); 1360b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_X: 1375ffd83dbSDimitry Andric return std::make_tuple(WorkItemIDX ? &WorkItemIDX : nullptr, 1385ffd83dbSDimitry Andric &AMDGPU::VGPR_32RegClass, LLT::scalar(32)); 1390b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_Y: 1405ffd83dbSDimitry Andric return std::make_tuple(WorkItemIDY ? &WorkItemIDY : nullptr, 1415ffd83dbSDimitry Andric &AMDGPU::VGPR_32RegClass, LLT::scalar(32)); 1420b57cec5SDimitry Andric case AMDGPUFunctionArgInfo::WORKITEM_ID_Z: 1435ffd83dbSDimitry Andric return std::make_tuple(WorkItemIDZ ? &WorkItemIDZ : nullptr, 1445ffd83dbSDimitry Andric &AMDGPU::VGPR_32RegClass, LLT::scalar(32)); 1450b57cec5SDimitry Andric } 1460b57cec5SDimitry Andric llvm_unreachable("unexpected preloaded value type"); 1470b57cec5SDimitry Andric } 1485ffd83dbSDimitry Andric 1495ffd83dbSDimitry Andric constexpr AMDGPUFunctionArgInfo AMDGPUFunctionArgInfo::fixedABILayout() { 1505ffd83dbSDimitry Andric AMDGPUFunctionArgInfo AI; 1515ffd83dbSDimitry Andric AI.PrivateSegmentBuffer 1525ffd83dbSDimitry Andric = ArgDescriptor::createRegister(AMDGPU::SGPR0_SGPR1_SGPR2_SGPR3); 1535ffd83dbSDimitry Andric AI.DispatchPtr = ArgDescriptor::createRegister(AMDGPU::SGPR4_SGPR5); 1545ffd83dbSDimitry Andric AI.QueuePtr = ArgDescriptor::createRegister(AMDGPU::SGPR6_SGPR7); 1555ffd83dbSDimitry Andric 1565ffd83dbSDimitry Andric // Do not pass kernarg segment pointer, only pass increment version in its 1575ffd83dbSDimitry Andric // place. 1585ffd83dbSDimitry Andric AI.ImplicitArgPtr = ArgDescriptor::createRegister(AMDGPU::SGPR8_SGPR9); 1595ffd83dbSDimitry Andric AI.DispatchID = ArgDescriptor::createRegister(AMDGPU::SGPR10_SGPR11); 1605ffd83dbSDimitry Andric 1615ffd83dbSDimitry Andric // Skip FlatScratchInit/PrivateSegmentSize 1625ffd83dbSDimitry Andric AI.WorkGroupIDX = ArgDescriptor::createRegister(AMDGPU::SGPR12); 1635ffd83dbSDimitry Andric AI.WorkGroupIDY = ArgDescriptor::createRegister(AMDGPU::SGPR13); 1645ffd83dbSDimitry Andric AI.WorkGroupIDZ = ArgDescriptor::createRegister(AMDGPU::SGPR14); 1655ffd83dbSDimitry Andric 1665ffd83dbSDimitry Andric const unsigned Mask = 0x3ff; 1675ffd83dbSDimitry Andric AI.WorkItemIDX = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask); 1685ffd83dbSDimitry Andric AI.WorkItemIDY = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask << 10); 1695ffd83dbSDimitry Andric AI.WorkItemIDZ = ArgDescriptor::createRegister(AMDGPU::VGPR31, Mask << 20); 1705ffd83dbSDimitry Andric return AI; 1715ffd83dbSDimitry Andric } 1725ffd83dbSDimitry Andric 1735ffd83dbSDimitry Andric const AMDGPUFunctionArgInfo & 1745ffd83dbSDimitry Andric AMDGPUArgumentUsageInfo::lookupFuncArgInfo(const Function &F) const { 1755ffd83dbSDimitry Andric auto I = ArgInfoMap.find(&F); 1765ffd83dbSDimitry Andric if (I == ArgInfoMap.end()) { 1775ffd83dbSDimitry Andric if (AMDGPUTargetMachine::EnableFixedFunctionABI) 1785ffd83dbSDimitry Andric return FixedABIFunctionInfo; 1795ffd83dbSDimitry Andric 1805ffd83dbSDimitry Andric // Without the fixed ABI, we assume no function has special inputs. 1815ffd83dbSDimitry Andric assert(F.isDeclaration()); 1825ffd83dbSDimitry Andric return ExternFunctionInfo; 1835ffd83dbSDimitry Andric } 1845ffd83dbSDimitry Andric 1855ffd83dbSDimitry Andric return I->second; 1865ffd83dbSDimitry Andric } 187