xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPU.td (revision 9f23cbd6cae82fd77edfad7173432fa8dccd0a95) 
1//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===------------------------------------------------------------===//
8
9include "llvm/TableGen/SearchableTable.td"
10include "llvm/Target/Target.td"
11include "AMDGPUFeatures.td"
12
13def p0 : PtrValueType<i64, 0>;
14def p1 : PtrValueType<i64, 1>;
15def p2 : PtrValueType<i32, 2>;
16def p3 : PtrValueType<i32, 3>;
17def p4 : PtrValueType<i64, 4>;
18def p5 : PtrValueType<i32, 5>;
19def p6 : PtrValueType<i32, 6>;
20
21class BoolToList<bit Value> {
22  list<int> ret = !if(Value, [1]<int>, []<int>);
23}
24
25//===------------------------------------------------------------===//
26// Subtarget Features (device properties)
27//===------------------------------------------------------------===//
28
29def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
30  "FastFMAF32",
31  "true",
32  "Assuming f32 fma is at least as fast as mul + add"
33>;
34
35def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32",
36  "FastDenormalF32",
37  "true",
38  "Enabling denormals does not cause f32 instructions to run at f64 rates"
39>;
40
41def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
42  "MIMG_R128",
43  "true",
44  "Support 128-bit texture resources"
45>;
46
47def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
48  "HalfRate64Ops",
49  "true",
50  "Most fp64 instructions are half rate instead of quarter"
51>;
52
53def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
54  "FullRate64Ops",
55  "true",
56  "Most fp64 instructions are full rate"
57>;
58
59def FeatureFlatAddressSpace : SubtargetFeature<"flat-address-space",
60  "FlatAddressSpace",
61  "true",
62  "Support flat address space"
63>;
64
65def FeatureFlatInstOffsets : SubtargetFeature<"flat-inst-offsets",
66  "FlatInstOffsets",
67  "true",
68  "Flat instructions have immediate offset addressing mode"
69>;
70
71def FeatureFlatGlobalInsts : SubtargetFeature<"flat-global-insts",
72  "FlatGlobalInsts",
73  "true",
74  "Have global_* flat memory instructions"
75>;
76
77def FeatureFlatScratchInsts : SubtargetFeature<"flat-scratch-insts",
78  "FlatScratchInsts",
79  "true",
80  "Have scratch_* flat memory instructions"
81>;
82
83def FeatureScalarFlatScratchInsts : SubtargetFeature<"scalar-flat-scratch-insts",
84  "ScalarFlatScratchInsts",
85  "true",
86  "Have s_scratch_* flat memory instructions"
87>;
88
89def FeatureEnableFlatScratch : SubtargetFeature<"enable-flat-scratch",
90  "EnableFlatScratch",
91  "true",
92  "Use scratch_* flat memory instructions to access scratch"
93>;
94
95def FeatureAddNoCarryInsts : SubtargetFeature<"add-no-carry-insts",
96  "AddNoCarryInsts",
97  "true",
98  "Have VALU add/sub instructions without carry out"
99>;
100
101def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
102  "UnalignedBufferAccess",
103  "true",
104  "Hardware supports unaligned global loads and stores"
105>;
106
107def FeatureTrapHandler: SubtargetFeature<"trap-handler",
108  "TrapHandler",
109  "true",
110  "Trap handler support"
111>;
112
113def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
114  "UnalignedScratchAccess",
115  "true",
116  "Support unaligned scratch loads and stores"
117>;
118
119def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
120  "UnalignedDSAccess",
121  "true",
122  "Hardware supports unaligned local and region loads and stores"
123>;
124
125def FeatureApertureRegs : SubtargetFeature<"aperture-regs",
126  "HasApertureRegs",
127  "true",
128  "Has Memory Aperture Base and Size Registers"
129>;
130
131def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
132  "HasMadMixInsts",
133  "true",
134  "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
135>;
136
137def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
138  "HasFmaMixInsts",
139  "true",
140  "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
141>;
142
143def FeatureSupportsXNACK : SubtargetFeature<"xnack-support",
144  "SupportsXNACK",
145  "true",
146  "Hardware supports XNACK"
147>;
148
149// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
150// XNACK. The current default kernel driver setting is:
151// - graphics ring: XNACK disabled
152// - compute ring: XNACK enabled
153//
154// If XNACK is enabled, the VMEM latency can be worse.
155// If XNACK is disabled, the 2 SGPRs can be used for general purposes.
156def FeatureXNACK : SubtargetFeature<"xnack",
157  "EnableXNACK",
158  "true",
159  "Enable XNACK support"
160>;
161
162def FeatureTgSplit : SubtargetFeature<"tgsplit",
163  "EnableTgSplit",
164  "true",
165  "Enable threadgroup split execution"
166>;
167
168def FeatureCuMode : SubtargetFeature<"cumode",
169  "EnableCuMode",
170  "true",
171  "Enable CU wavefront execution mode"
172>;
173
174def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
175  "SGPRInitBug",
176  "true",
177  "VI SGPR initialization bug requiring a fixed SGPR allocation size"
178>;
179
180def FeatureUserSGPRInit16Bug : SubtargetFeature<"user-sgpr-init16-bug",
181  "UserSGPRInit16Bug",
182  "true",
183  "Bug requiring at least 16 user+system SGPRs to be enabled"
184>;
185
186def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
187  "LDSMisalignedBug",
188  "true",
189  "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
190>;
191
192def FeatureMFMAInlineLiteralBug : SubtargetFeature<"mfma-inline-literal-bug",
193  "HasMFMAInlineLiteralBug",
194  "true",
195  "MFMA cannot use inline literal as SrcC"
196>;
197
198def FeatureVcmpxPermlaneHazard : SubtargetFeature<"vcmpx-permlane-hazard",
199  "HasVcmpxPermlaneHazard",
200  "true",
201  "TODO: describe me"
202>;
203
204def FeatureVMEMtoScalarWriteHazard : SubtargetFeature<"vmem-to-scalar-write-hazard",
205  "HasVMEMtoScalarWriteHazard",
206  "true",
207  "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution."
208>;
209
210def FeatureSMEMtoVectorWriteHazard : SubtargetFeature<"smem-to-vector-write-hazard",
211  "HasSMEMtoVectorWriteHazard",
212  "true",
213  "s_load_dword followed by v_cmp page faults"
214>;
215
216def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
217  "HasInstFwdPrefetchBug",
218  "true",
219  "S_INST_PREFETCH instruction causes shader to hang"
220>;
221
222def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
223  "HasVcmpxExecWARHazard",
224  "true",
225  "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)"
226>;
227
228def FeatureLdsBranchVmemWARHazard : SubtargetFeature<"lds-branch-vmem-war-hazard",
229  "HasLdsBranchVmemWARHazard",
230  "true",
231  "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
232>;
233
234def FeatureNSAtoVMEMBug : SubtargetFeature<"nsa-to-vmem-bug",
235  "HasNSAtoVMEMBug",
236  "true",
237  "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
238>;
239
240def FeatureNSAClauseBug : SubtargetFeature<"nsa-clause-bug",
241  "HasNSAClauseBug",
242  "true",
243  "MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
244>;
245
246def FeatureFlatSegmentOffsetBug : SubtargetFeature<"flat-segment-offset-bug",
247  "HasFlatSegmentOffsetBug",
248  "true",
249  "GFX10 bug where inst_offset is ignored when flat instructions access global memory"
250>;
251
252def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
253  "NegativeScratchOffsetBug",
254  "true",
255  "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9"
256>;
257
258def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
259  "NegativeUnalignedScratchOffsetBug",
260  "true",
261  "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10"
262>;
263
264def FeatureOffset3fBug : SubtargetFeature<"offset-3f-bug",
265  "HasOffset3fBug",
266  "true",
267  "Branch offset of 3f hardware bug"
268>;
269
270def FeatureImageStoreD16Bug : SubtargetFeature<"image-store-d16-bug",
271  "HasImageStoreD16Bug",
272  "true",
273  "Image Store D16 hardware bug"
274>;
275
276def FeatureImageGather4D16Bug : SubtargetFeature<"image-gather4-d16-bug",
277  "HasImageGather4D16Bug",
278  "true",
279  "Image Gather4 D16 hardware bug"
280>;
281
282def FeatureMADIntraFwdBug : SubtargetFeature<"mad-intra-fwd-bug",
283  "HasMADIntraFwdBug",
284  "true",
285  "MAD_U64/I64 intra instruction forwarding bug"
286>;
287
288class SubtargetFeatureLDSBankCount <int Value> : SubtargetFeature <
289  "ldsbankcount"#Value,
290  "LDSBankCount",
291  !cast<string>(Value),
292  "The number of LDS banks per compute unit."
293>;
294
295def FeatureLDSBankCount16 : SubtargetFeatureLDSBankCount<16>;
296def FeatureLDSBankCount32 : SubtargetFeatureLDSBankCount<32>;
297
298def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
299  "GCN3Encoding",
300  "true",
301  "Encoding format for VI"
302>;
303
304def FeatureCIInsts : SubtargetFeature<"ci-insts",
305  "CIInsts",
306  "true",
307  "Additional instructions for CI+"
308>;
309
310def FeatureGFX8Insts : SubtargetFeature<"gfx8-insts",
311  "GFX8Insts",
312  "true",
313  "Additional instructions for GFX8+"
314>;
315
316def FeatureGFX9Insts : SubtargetFeature<"gfx9-insts",
317  "GFX9Insts",
318  "true",
319  "Additional instructions for GFX9+"
320>;
321
322def FeatureGFX90AInsts : SubtargetFeature<"gfx90a-insts",
323  "GFX90AInsts",
324  "true",
325  "Additional instructions for GFX90A+"
326>;
327
328def FeatureGFX940Insts : SubtargetFeature<"gfx940-insts",
329  "GFX940Insts",
330  "true",
331  "Additional instructions for GFX940+"
332>;
333
334def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts",
335  "GFX10Insts",
336  "true",
337  "Additional instructions for GFX10+"
338>;
339
340def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
341  "GFX11Insts",
342  "true",
343  "Additional instructions for GFX11+"
344>;
345
346def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
347  "GFX10_3Insts",
348  "true",
349  "Additional instructions for GFX10.3"
350>;
351
352def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
353  "GFX7GFX8GFX9Insts",
354  "true",
355  "Instructions shared in GFX7, GFX8, GFX9"
356>;
357
358def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
359  "HasSMemRealTime",
360  "true",
361  "Has s_memrealtime instruction"
362>;
363
364def FeatureInv2PiInlineImm : SubtargetFeature<"inv-2pi-inline-imm",
365  "HasInv2PiInlineImm",
366  "true",
367  "Has 1 / (2 * pi) as inline immediate"
368>;
369
370def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
371  "Has16BitInsts",
372  "true",
373  "Has i16/f16 instructions"
374>;
375
376def FeatureTrue16BitInsts : SubtargetFeature<"true16",
377  "HasTrue16BitInsts",
378  "true",
379  "True 16-bit operand instructions"
380>;
381
382def FeatureVOP3P : SubtargetFeature<"vop3p",
383  "HasVOP3PInsts",
384  "true",
385  "Has VOP3P packed instructions"
386>;
387
388def FeatureMovrel : SubtargetFeature<"movrel",
389  "HasMovrel",
390  "true",
391  "Has v_movrel*_b32 instructions"
392>;
393
394def FeatureVGPRIndexMode : SubtargetFeature<"vgpr-index-mode",
395  "HasVGPRIndexMode",
396  "true",
397  "Has VGPR mode register indexing"
398>;
399
400def FeatureScalarStores : SubtargetFeature<"scalar-stores",
401  "HasScalarStores",
402  "true",
403  "Has store scalar memory instructions"
404>;
405
406def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics",
407  "HasScalarAtomics",
408  "true",
409  "Has atomic scalar memory instructions"
410>;
411
412def FeatureSDWA : SubtargetFeature<"sdwa",
413  "HasSDWA",
414  "true",
415  "Support SDWA (Sub-DWORD Addressing) extension"
416>;
417
418def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
419  "HasSDWAOmod",
420  "true",
421  "Support OMod with SDWA (Sub-DWORD Addressing) extension"
422>;
423
424def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
425  "HasSDWAScalar",
426  "true",
427  "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
428>;
429
430def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
431  "HasSDWASdst",
432  "true",
433  "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
434>;
435
436def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
437  "HasSDWAMac",
438  "true",
439  "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
440>;
441
442def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
443  "HasSDWAOutModsVOPC",
444  "true",
445  "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
446>;
447
448def FeatureDPP : SubtargetFeature<"dpp",
449  "HasDPP",
450  "true",
451  "Support DPP (Data Parallel Primitives) extension"
452>;
453
454// DPP8 allows arbitrary cross-lane swizzling within groups of 8 lanes.
455def FeatureDPP8 : SubtargetFeature<"dpp8",
456  "HasDPP8",
457  "true",
458  "Support DPP8 (Data Parallel Primitives) extension"
459>;
460
461def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
462  "Has64BitDPP",
463  "true",
464  "Support DPP (Data Parallel Primitives) extension"
465>;
466
467def FeaturePackedFP32Ops : SubtargetFeature<"packed-fp32-ops",
468  "HasPackedFP32Ops",
469  "true",
470  "Support packed fp32 instructions"
471>;
472
473def FeatureR128A16 : SubtargetFeature<"r128-a16",
474  "HasR128A16",
475  "true",
476  "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128"
477>;
478
479def FeatureA16 : SubtargetFeature<"a16",
480  "HasA16",
481  "true",
482  "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands"
483>;
484
485def FeatureG16 : SubtargetFeature<"g16",
486  "HasG16",
487  "true",
488  "Support G16 for 16-bit gradient image operands"
489>;
490
491def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding",
492  "HasNSAEncoding",
493  "true",
494  "Support NSA encoding for image instructions"
495>;
496
497def FeatureImageInsts : SubtargetFeature<"image-insts",
498  "HasImageInsts",
499  "true",
500  "Support image instructions"
501>;
502
503def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
504  "HasExtendedImageInsts",
505  "true",
506  "Support mips != 0, lod != 0, gather4, and get_lod"
507>;
508
509def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
510  "GFX10_AEncoding",
511  "true",
512  "Has BVH ray tracing instructions"
513>;
514
515def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
516  "GFX10_BEncoding",
517  "true",
518  "Encoding format GFX10_B"
519>;
520
521def FeatureIntClamp : SubtargetFeature<"int-clamp-insts",
522  "HasIntClamp",
523  "true",
524  "Support clamp for integer destination"
525>;
526
527def FeatureUnpackedD16VMem : SubtargetFeature<"unpacked-d16-vmem",
528  "HasUnpackedD16VMem",
529  "true",
530  "Has unpacked d16 vmem instructions"
531>;
532
533def FeatureDLInsts : SubtargetFeature<"dl-insts",
534  "HasDLInsts",
535  "true",
536  "Has v_fmac_f32 and v_xnor_b32 instructions"
537>;
538
539def FeatureFmacF64Inst : SubtargetFeature<"fmacf64-inst",
540  "HasFmacF64Inst",
541  "true",
542  "Has v_fmac_f64 instruction"
543>;
544
545def FeatureDot1Insts : SubtargetFeature<"dot1-insts",
546  "HasDot1Insts",
547  "true",
548  "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions"
549>;
550
551def FeatureDot2Insts : SubtargetFeature<"dot2-insts",
552  "HasDot2Insts",
553  "true",
554  "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions"
555>;
556
557def FeatureDot3Insts : SubtargetFeature<"dot3-insts",
558  "HasDot3Insts",
559  "true",
560  "Has v_dot8c_i32_i4 instruction"
561>;
562
563def FeatureDot4Insts : SubtargetFeature<"dot4-insts",
564  "HasDot4Insts",
565  "true",
566  "Has v_dot2c_i32_i16 instruction"
567>;
568
569def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
570  "HasDot5Insts",
571  "true",
572  "Has v_dot2c_f32_f16 instruction"
573>;
574
575def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
576  "HasDot6Insts",
577  "true",
578  "Has v_dot4c_i32_i8 instruction"
579>;
580
581def FeatureDot7Insts : SubtargetFeature<"dot7-insts",
582  "HasDot7Insts",
583  "true",
584  "Has v_dot2_f32_f16, v_dot4_u32_u8, v_dot8_u32_u4 instructions"
585>;
586
587def FeatureDot8Insts : SubtargetFeature<"dot8-insts",
588  "HasDot8Insts",
589  "true",
590  "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions"
591>;
592
593def FeatureDot9Insts : SubtargetFeature<"dot9-insts",
594  "HasDot9Insts",
595  "true",
596  "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions"
597>;
598
599def FeatureMAIInsts : SubtargetFeature<"mai-insts",
600  "HasMAIInsts",
601  "true",
602  "Has mAI instructions"
603>;
604
605def FeatureFP8Insts : SubtargetFeature<"fp8-insts",
606  "HasFP8Insts",
607  "true",
608  "Has fp8 and bf8 instructions"
609>;
610
611def FeaturePkFmacF16Inst : SubtargetFeature<"pk-fmac-f16-inst",
612  "HasPkFmacF16Inst",
613  "true",
614  "Has v_pk_fmac_f16 instruction"
615>;
616
617def FeatureAtomicFaddRtnInsts : SubtargetFeature<"atomic-fadd-rtn-insts",
618  "HasAtomicFaddRtnInsts",
619  "true",
620  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
621  "return original value",
622  [FeatureFlatGlobalInsts]
623>;
624
625def FeatureAtomicFaddNoRtnInsts : SubtargetFeature<"atomic-fadd-no-rtn-insts",
626  "HasAtomicFaddNoRtnInsts",
627  "true",
628  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
629  "don't return original value",
630  [FeatureFlatGlobalInsts]
631>;
632
633def FeatureAtomicPkFaddNoRtnInsts
634  : SubtargetFeature<"atomic-pk-fadd-no-rtn-insts",
635  "HasAtomicPkFaddNoRtnInsts",
636  "true",
637  "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
638  "don't return original value",
639  [FeatureFlatGlobalInsts]
640>;
641
642def FeatureFlatAtomicFaddF32Inst
643  : SubtargetFeature<"flat-atomic-fadd-f32-inst",
644  "HasFlatAtomicFaddF32Inst",
645  "true",
646  "Has flat_atomic_add_f32 instruction"
647>;
648
649def FeatureSupportsSRAMECC : SubtargetFeature<"sramecc-support",
650  "SupportsSRAMECC",
651  "true",
652  "Hardware supports SRAMECC"
653>;
654
655def FeatureSRAMECC : SubtargetFeature<"sramecc",
656  "EnableSRAMECC",
657  "true",
658  "Enable SRAMECC"
659>;
660
661def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
662  "HasNoSdstCMPX",
663  "true",
664  "V_CMPX does not write VCC/SGPR in addition to EXEC"
665>;
666
667def FeatureVscnt : SubtargetFeature<"vscnt",
668  "HasVscnt",
669  "true",
670  "Has separate store vscnt counter"
671>;
672
673def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst",
674  "HasGetWaveIdInst",
675  "true",
676  "Has s_get_waveid_in_workgroup instruction"
677>;
678
679def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst",
680  "HasSMemTimeInst",
681  "true",
682  "Has s_memtime instruction"
683>;
684
685def FeatureShaderCyclesRegister : SubtargetFeature<"shader-cycles-register",
686  "HasShaderCyclesRegister",
687  "true",
688  "Has SHADER_CYCLES hardware register"
689>;
690
691def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts",
692  "HasMadMacF32Insts",
693  "true",
694  "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions"
695>;
696
697def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts",
698  "HasDsSrc2Insts",
699  "true",
700  "Has ds_*_src2 instructions"
701>;
702
703def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
704  "HasVOP3Literal",
705  "true",
706  "Can use one literal in VOP3"
707>;
708
709def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard",
710  "HasNoDataDepHazard",
711  "true",
712  "Does not need SW waitstates"
713>;
714
715def FeatureGFX11FullVGPRs : SubtargetFeature<"gfx11-full-vgprs",
716  "HasGFX11FullVGPRs",
717  "true",
718  "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10"
719>;
720
721class SubtargetFeatureNSAMaxSize <int Value> : SubtargetFeature <
722  "nsa-max-size-"#Value,
723  "NSAMaxSize",
724  !cast<string>(Value),
725  "The maximum non-sequential address size in VGPRs."
726>;
727
728def FeatureNSAMaxSize5 : SubtargetFeatureNSAMaxSize<5>;
729def FeatureNSAMaxSize13 : SubtargetFeatureNSAMaxSize<13>;
730
731def FeatureVOPD : SubtargetFeature<"vopd",
732  "HasVOPDInsts",
733  "true",
734  "Has VOPD dual issue wave32 instructions"
735>;
736
737def FeatureVALUTransUseHazard : SubtargetFeature<"valu-trans-use-hazard",
738  "HasVALUTransUseHazard",
739  "true",
740  "Hazard when TRANS instructions are closely followed by a use of the result"
741>;
742
743//===------------------------------------------------------------===//
744// Subtarget Features (options and debugging)
745//===------------------------------------------------------------===//
746
747class FeatureMaxPrivateElementSize<int size> : SubtargetFeature<
748  "max-private-element-size-"#size,
749  "MaxPrivateElementSize",
750  !cast<string>(size),
751  "Maximum private access size may be "#size
752>;
753
754def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
755def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
756def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
757
758def FeatureDumpCode : SubtargetFeature <"DumpCode",
759  "DumpCode",
760  "true",
761  "Dump MachineInstrs in the CodeEmitter"
762>;
763
764def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
765  "DumpCode",
766  "true",
767  "Dump MachineInstrs in the CodeEmitter"
768>;
769
770// XXX - This should probably be removed once enabled by default
771def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
772  "EnableLoadStoreOpt",
773  "true",
774  "Enable SI load/store optimizer pass"
775>;
776
777// Performance debugging feature. Allow using DS instruction immediate
778// offsets even if the base pointer can't be proven to be base. On SI,
779// base pointer values that won't give the same result as a 16-bit add
780// are not safe to fold, but this will override the conservative test
781// for the base pointer.
782def FeatureEnableUnsafeDSOffsetFolding : SubtargetFeature <
783  "unsafe-ds-offset-folding",
784  "EnableUnsafeDSOffsetFolding",
785  "true",
786  "Force using DS instruction immediate offsets on SI"
787>;
788
789def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
790  "EnableSIScheduler",
791  "true",
792  "Enable SI Machine Scheduler"
793>;
794
795def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
796  "EnableDS128",
797  "true",
798  "Use ds_{read|write}_b128"
799>;
800
801// Sparse texture support requires that all result registers are zeroed when
802// PRTStrictNull is set to true. This feature is turned on for all architectures
803// but is enabled as a feature in case there are situations where PRTStrictNull
804// is disabled by the driver.
805def FeatureEnablePRTStrictNull : SubtargetFeature<"enable-prt-strict-null",
806  "EnablePRTStrictNull",
807  "true",
808  "Enable zeroing of result registers for sparse texture fetches"
809>;
810
811// Unless +-flat-for-global is specified, turn on FlatForGlobal for
812// all OS-es on VI and newer hardware to avoid assertion failures due
813// to missing ADDR64 variants of MUBUF instructions.
814// FIXME: moveToVALU should be able to handle converting addr64 MUBUF
815// instructions.
816
817def FeatureFlatForGlobal : SubtargetFeature<"flat-for-global",
818  "FlatForGlobal",
819  "true",
820  "Force to generate flat instruction for global"
821>;
822
823def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
824  "auto-waitcnt-before-barrier",
825  "AutoWaitcntBeforeBarrier",
826  "true",
827  "Hardware automatically inserts waitcnt before barrier"
828>;
829
830def FeatureBackOffBarrier : SubtargetFeature <"back-off-barrier",
831  "BackOffBarrier",
832  "true",
833  "Hardware supports backing off s_barrier if an exception occurs"
834>;
835
836def FeatureTrigReducedRange : SubtargetFeature<"trig-reduced-range",
837  "HasTrigReducedRange",
838  "true",
839  "Requires use of fract on arguments to trig instructions"
840>;
841
842// Alignment enforcement is controlled by a configuration register:
843// SH_MEM_CONFIG.alignment_mode
844def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
845  "UnalignedAccessMode",
846  "true",
847  "Enable unaligned global, local and region loads and stores if the hardware"
848  " supports it"
849>;
850
851def FeaturePackedTID : SubtargetFeature<"packed-tid",
852  "HasPackedTID",
853  "true",
854  "Workitem IDs are packed into v0 at kernel launch"
855>;
856
857def FeatureArchitectedFlatScratch : SubtargetFeature<"architected-flat-scratch",
858  "HasArchitectedFlatScratch",
859  "true",
860  "Flat Scratch register is a readonly SPI initialized architected register"
861>;
862
863// Dummy feature used to disable assembler instructions.
864def FeatureDisable : SubtargetFeature<"",
865  "FeatureDisable","true",
866  "Dummy feature to disable assembler instructions"
867>;
868
869class GCNSubtargetFeatureGeneration <string Value,
870                                     string FeatureName,
871                                     list<SubtargetFeature> Implies> :
872        SubtargetFeatureGeneration <Value, FeatureName, "GCNSubtarget", Implies>;
873
874def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
875    "southern-islands",
876  [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128,
877  FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts,
878  FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel,
879  FeatureTrigReducedRange, FeatureExtendedImageInsts, FeatureImageInsts
880  ]
881>;
882
883def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS",
884    "sea-islands",
885  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
886  FeatureWavefrontSize64, FeatureFlatAddressSpace,
887  FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange,
888  FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
889  FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureUnalignedBufferAccess,
890  FeatureImageInsts
891  ]
892>;
893
894def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
895  "volcanic-islands",
896  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
897   FeatureWavefrontSize64, FeatureFlatAddressSpace,
898   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
899   FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel,
900   FeatureScalarStores, FeatureInv2PiInlineImm,
901   FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP,
902   FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts,
903   FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
904   FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureFastDenormalF32,
905   FeatureUnalignedBufferAccess, FeatureImageInsts
906  ]
907>;
908
909def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
910  "gfx9",
911  [FeatureFP64, FeatureLocalMemorySize65536,
912   FeatureWavefrontSize64, FeatureFlatAddressSpace,
913   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
914   FeatureSMemRealTime, FeatureScalarStores, FeatureInv2PiInlineImm,
915   FeatureApertureRegs, FeatureGFX9Insts, FeatureVOP3P, FeatureVGPRIndexMode,
916   FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
917   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
918   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
919   FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts,
920   FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16,
921   FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK,
922   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess,
923   FeatureNegativeScratchOffsetBug
924  ]
925>;
926
927def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
928  "gfx10",
929  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
930   FeatureFlatAddressSpace,
931   FeatureCIInsts, Feature16BitInsts,
932   FeatureSMemRealTime, FeatureInv2PiInlineImm,
933   FeatureApertureRegs, FeatureGFX9Insts, FeatureGFX10Insts, FeatureVOP3P,
934   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
935   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
936   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
937   FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
938   FeatureNoSdstCMPX, FeatureVscnt,
939   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
940   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
941   FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureG16,
942   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureImageInsts
943  ]
944>;
945
946def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
947  "gfx11",
948  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
949   FeatureFlatAddressSpace, Feature16BitInsts,
950   FeatureInv2PiInlineImm, FeatureApertureRegs,
951   FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
952   FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
953   FeatureGFX11Insts, FeatureVOP3P, FeatureVOPD, FeatureTrue16BitInsts,
954   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
955   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
956   FeatureAddNoCarryInsts, FeatureFmaMixInsts,
957   FeatureNoSdstCMPX, FeatureVscnt,
958   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
959   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
960   FeatureA16, FeatureFastDenormalF32, FeatureG16,
961   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess
962  ]
963>;
964
965class FeatureSet<list<SubtargetFeature> Features_> {
966  list<SubtargetFeature> Features = Features_;
967}
968
969def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands,
970   FeatureFastFMAF32,
971   HalfRate64Ops,
972   FeatureLDSBankCount32]>;
973
974def FeatureISAVersion6_0_1 : FeatureSet<
975  [FeatureSouthernIslands,
976   FeatureLDSBankCount32]>;
977
978def FeatureISAVersion6_0_2 : FeatureSet<
979  [FeatureSouthernIslands,
980   FeatureLDSBankCount32]>;
981
982def FeatureISAVersion7_0_0 : FeatureSet<
983  [FeatureSeaIslands,
984   FeatureLDSBankCount32]>;
985
986def FeatureISAVersion7_0_1 : FeatureSet<
987  [FeatureSeaIslands,
988   HalfRate64Ops,
989   FeatureLDSBankCount32,
990   FeatureFastFMAF32]>;
991
992def FeatureISAVersion7_0_2 : FeatureSet<
993  [FeatureSeaIslands,
994   FeatureLDSBankCount16,
995   FeatureFastFMAF32]>;
996
997def FeatureISAVersion7_0_3 : FeatureSet<
998  [FeatureSeaIslands,
999   FeatureLDSBankCount16]>;
1000
1001def FeatureISAVersion7_0_4 : FeatureSet<
1002  [FeatureSeaIslands,
1003   FeatureLDSBankCount32]>;
1004
1005def FeatureISAVersion7_0_5 : FeatureSet<
1006  [FeatureSeaIslands,
1007   FeatureLDSBankCount16]>;
1008
1009def FeatureISAVersion8_0_1 : FeatureSet<
1010  [FeatureVolcanicIslands,
1011   FeatureFastFMAF32,
1012   HalfRate64Ops,
1013   FeatureLDSBankCount32,
1014   FeatureSupportsXNACK,
1015   FeatureUnpackedD16VMem]>;
1016
1017def FeatureISAVersion8_0_2 : FeatureSet<
1018  [FeatureVolcanicIslands,
1019   FeatureLDSBankCount32,
1020   FeatureSGPRInitBug,
1021   FeatureUnpackedD16VMem]>;
1022
1023def FeatureISAVersion8_0_3 : FeatureSet<
1024  [FeatureVolcanicIslands,
1025   FeatureLDSBankCount32,
1026   FeatureUnpackedD16VMem]>;
1027
1028def FeatureISAVersion8_0_5 : FeatureSet<
1029  [FeatureVolcanicIslands,
1030   FeatureLDSBankCount32,
1031   FeatureSGPRInitBug,
1032   FeatureUnpackedD16VMem]>;
1033
1034def FeatureISAVersion8_1_0 : FeatureSet<
1035  [FeatureVolcanicIslands,
1036   FeatureLDSBankCount16,
1037   FeatureSupportsXNACK,
1038   FeatureImageStoreD16Bug,
1039   FeatureImageGather4D16Bug]>;
1040
1041def FeatureISAVersion9_0_0 : FeatureSet<
1042  [FeatureGFX9,
1043   FeatureMadMixInsts,
1044   FeatureLDSBankCount32,
1045   FeatureDsSrc2Insts,
1046   FeatureExtendedImageInsts,
1047   FeatureImageInsts,
1048   FeatureMadMacF32Insts,
1049   FeatureImageGather4D16Bug]>;
1050
1051def FeatureISAVersion9_0_2 : FeatureSet<
1052  [FeatureGFX9,
1053   FeatureMadMixInsts,
1054   FeatureLDSBankCount32,
1055   FeatureDsSrc2Insts,
1056   FeatureExtendedImageInsts,
1057   FeatureImageInsts,
1058   FeatureMadMacF32Insts,
1059   FeatureImageGather4D16Bug]>;
1060
1061def FeatureISAVersion9_0_4 : FeatureSet<
1062  [FeatureGFX9,
1063   FeatureLDSBankCount32,
1064   FeatureDsSrc2Insts,
1065   FeatureExtendedImageInsts,
1066   FeatureImageInsts,
1067   FeatureMadMacF32Insts,
1068   FeatureFmaMixInsts,
1069   FeatureImageGather4D16Bug]>;
1070
1071def FeatureISAVersion9_0_6 : FeatureSet<
1072  [FeatureGFX9,
1073   HalfRate64Ops,
1074   FeatureFmaMixInsts,
1075   FeatureLDSBankCount32,
1076   FeatureDsSrc2Insts,
1077   FeatureExtendedImageInsts,
1078   FeatureImageInsts,
1079   FeatureMadMacF32Insts,
1080   FeatureDLInsts,
1081   FeatureDot1Insts,
1082   FeatureDot2Insts,
1083   FeatureDot7Insts,
1084   FeatureSupportsSRAMECC,
1085   FeatureImageGather4D16Bug]>;
1086
1087def FeatureISAVersion9_0_8 : FeatureSet<
1088  [FeatureGFX9,
1089   HalfRate64Ops,
1090   FeatureFmaMixInsts,
1091   FeatureLDSBankCount32,
1092   FeatureDsSrc2Insts,
1093   FeatureExtendedImageInsts,
1094   FeatureImageInsts,
1095   FeatureMadMacF32Insts,
1096   FeatureDLInsts,
1097   FeatureDot1Insts,
1098   FeatureDot2Insts,
1099   FeatureDot3Insts,
1100   FeatureDot4Insts,
1101   FeatureDot5Insts,
1102   FeatureDot6Insts,
1103   FeatureDot7Insts,
1104   FeatureMAIInsts,
1105   FeaturePkFmacF16Inst,
1106   FeatureAtomicFaddNoRtnInsts,
1107   FeatureAtomicPkFaddNoRtnInsts,
1108   FeatureSupportsSRAMECC,
1109   FeatureMFMAInlineLiteralBug,
1110   FeatureImageGather4D16Bug]>;
1111
1112def FeatureISAVersion9_0_9 : FeatureSet<
1113  [FeatureGFX9,
1114   FeatureMadMixInsts,
1115   FeatureLDSBankCount32,
1116   FeatureDsSrc2Insts,
1117   FeatureExtendedImageInsts,
1118   FeatureImageInsts,
1119   FeatureMadMacF32Insts,
1120   FeatureImageGather4D16Bug]>;
1121
1122def FeatureISAVersion9_0_A : FeatureSet<
1123  [FeatureGFX9,
1124   FeatureGFX90AInsts,
1125   FeatureFmaMixInsts,
1126   FeatureLDSBankCount32,
1127   FeatureDLInsts,
1128   FeatureFmacF64Inst,
1129   FeatureDot1Insts,
1130   FeatureDot2Insts,
1131   FeatureDot3Insts,
1132   FeatureDot4Insts,
1133   FeatureDot5Insts,
1134   FeatureDot6Insts,
1135   FeatureDot7Insts,
1136   Feature64BitDPP,
1137   FeaturePackedFP32Ops,
1138   FeatureMAIInsts,
1139   FeaturePkFmacF16Inst,
1140   FeatureAtomicFaddRtnInsts,
1141   FeatureAtomicFaddNoRtnInsts,
1142   FeatureAtomicPkFaddNoRtnInsts,
1143   FeatureImageInsts,
1144   FeatureMadMacF32Insts,
1145   FeatureSupportsSRAMECC,
1146   FeaturePackedTID,
1147   FullRate64Ops,
1148   FeatureBackOffBarrier]>;
1149
1150def FeatureISAVersion9_0_C : FeatureSet<
1151  [FeatureGFX9,
1152   FeatureMadMixInsts,
1153   FeatureLDSBankCount32,
1154   FeatureDsSrc2Insts,
1155   FeatureExtendedImageInsts,
1156   FeatureImageInsts,
1157   FeatureMadMacF32Insts,
1158   FeatureImageGather4D16Bug]>;
1159
1160def FeatureISAVersion9_4_0 : FeatureSet<
1161  [FeatureGFX9,
1162   FeatureGFX90AInsts,
1163   FeatureGFX940Insts,
1164   FeatureFmaMixInsts,
1165   FeatureLDSBankCount32,
1166   FeatureDLInsts,
1167   FeatureFmacF64Inst,
1168   FeatureDot1Insts,
1169   FeatureDot2Insts,
1170   FeatureDot3Insts,
1171   FeatureDot4Insts,
1172   FeatureDot5Insts,
1173   FeatureDot6Insts,
1174   FeatureDot7Insts,
1175   Feature64BitDPP,
1176   FeaturePackedFP32Ops,
1177   FeatureMAIInsts,
1178   FeatureFP8Insts,
1179   FeaturePkFmacF16Inst,
1180   FeatureAtomicFaddRtnInsts,
1181   FeatureAtomicFaddNoRtnInsts,
1182   FeatureAtomicPkFaddNoRtnInsts,
1183   FeatureFlatAtomicFaddF32Inst,
1184   FeatureSupportsSRAMECC,
1185   FeaturePackedTID,
1186   FeatureArchitectedFlatScratch,
1187   FullRate64Ops,
1188   FeatureBackOffBarrier]>;
1189
1190// TODO: Organize more features into groups.
1191def FeatureGroup {
1192  // Bugs present on gfx10.1.
1193  list<SubtargetFeature> GFX10_1_Bugs = [
1194    FeatureVcmpxPermlaneHazard,
1195    FeatureVMEMtoScalarWriteHazard,
1196    FeatureSMEMtoVectorWriteHazard,
1197    FeatureInstFwdPrefetchBug,
1198    FeatureVcmpxExecWARHazard,
1199    FeatureLdsBranchVmemWARHazard,
1200    FeatureNSAtoVMEMBug,
1201    FeatureNSAClauseBug,
1202    FeatureOffset3fBug,
1203    FeatureFlatSegmentOffsetBug,
1204    FeatureNegativeUnalignedScratchOffsetBug
1205   ];
1206}
1207
1208def FeatureISAVersion10_1_0 : FeatureSet<
1209  !listconcat(FeatureGroup.GFX10_1_Bugs,
1210    [FeatureGFX10,
1211     FeatureLDSBankCount32,
1212     FeatureDLInsts,
1213     FeatureNSAEncoding,
1214     FeatureNSAMaxSize5,
1215     FeatureWavefrontSize32,
1216     FeatureScalarStores,
1217     FeatureScalarAtomics,
1218     FeatureScalarFlatScratchInsts,
1219     FeatureGetWaveIdInst,
1220     FeatureMadMacF32Insts,
1221     FeatureDsSrc2Insts,
1222     FeatureLdsMisalignedBug,
1223     FeatureSupportsXNACK,
1224     FeatureBackOffBarrier])>;
1225
1226def FeatureISAVersion10_1_1 : FeatureSet<
1227  !listconcat(FeatureGroup.GFX10_1_Bugs,
1228    [FeatureGFX10,
1229     FeatureLDSBankCount32,
1230     FeatureDLInsts,
1231     FeatureDot1Insts,
1232     FeatureDot2Insts,
1233     FeatureDot5Insts,
1234     FeatureDot6Insts,
1235     FeatureDot7Insts,
1236     FeatureNSAEncoding,
1237     FeatureNSAMaxSize5,
1238     FeatureWavefrontSize32,
1239     FeatureScalarStores,
1240     FeatureScalarAtomics,
1241     FeatureScalarFlatScratchInsts,
1242     FeatureGetWaveIdInst,
1243     FeatureMadMacF32Insts,
1244     FeatureDsSrc2Insts,
1245     FeatureLdsMisalignedBug,
1246     FeatureSupportsXNACK,
1247     FeatureBackOffBarrier])>;
1248
1249def FeatureISAVersion10_1_2 : FeatureSet<
1250  !listconcat(FeatureGroup.GFX10_1_Bugs,
1251    [FeatureGFX10,
1252     FeatureLDSBankCount32,
1253     FeatureDLInsts,
1254     FeatureDot1Insts,
1255     FeatureDot2Insts,
1256     FeatureDot5Insts,
1257     FeatureDot6Insts,
1258     FeatureDot7Insts,
1259     FeatureNSAEncoding,
1260     FeatureNSAMaxSize5,
1261     FeatureWavefrontSize32,
1262     FeatureScalarStores,
1263     FeatureScalarAtomics,
1264     FeatureScalarFlatScratchInsts,
1265     FeatureGetWaveIdInst,
1266     FeatureMadMacF32Insts,
1267     FeatureDsSrc2Insts,
1268     FeatureLdsMisalignedBug,
1269     FeatureSupportsXNACK,
1270     FeatureBackOffBarrier])>;
1271
1272def FeatureISAVersion10_1_3 : FeatureSet<
1273  !listconcat(FeatureGroup.GFX10_1_Bugs,
1274    [FeatureGFX10,
1275     FeatureGFX10_AEncoding,
1276     FeatureLDSBankCount32,
1277     FeatureDLInsts,
1278     FeatureNSAEncoding,
1279     FeatureNSAMaxSize5,
1280     FeatureWavefrontSize32,
1281     FeatureScalarStores,
1282     FeatureScalarAtomics,
1283     FeatureScalarFlatScratchInsts,
1284     FeatureGetWaveIdInst,
1285     FeatureMadMacF32Insts,
1286     FeatureDsSrc2Insts,
1287     FeatureLdsMisalignedBug,
1288     FeatureSupportsXNACK,
1289     FeatureBackOffBarrier])>;
1290
1291def FeatureISAVersion10_3_0 : FeatureSet<
1292  [FeatureGFX10,
1293   FeatureGFX10_AEncoding,
1294   FeatureGFX10_BEncoding,
1295   FeatureGFX10_3Insts,
1296   FeatureLDSBankCount32,
1297   FeatureDLInsts,
1298   FeatureDot1Insts,
1299   FeatureDot2Insts,
1300   FeatureDot5Insts,
1301   FeatureDot6Insts,
1302   FeatureDot7Insts,
1303   FeatureNSAEncoding,
1304   FeatureNSAMaxSize13,
1305   FeatureWavefrontSize32,
1306   FeatureShaderCyclesRegister,
1307   FeatureBackOffBarrier]>;
1308
1309def FeatureISAVersion11_Common : FeatureSet<
1310  [FeatureGFX11,
1311   FeatureLDSBankCount32,
1312   FeatureDLInsts,
1313   FeatureDot5Insts,
1314   FeatureDot7Insts,
1315   FeatureDot8Insts,
1316   FeatureDot9Insts,
1317   FeatureNSAEncoding,
1318   FeatureNSAMaxSize5,
1319   FeatureWavefrontSize32,
1320   FeatureShaderCyclesRegister,
1321   FeatureArchitectedFlatScratch,
1322   FeatureAtomicFaddRtnInsts,
1323   FeatureAtomicFaddNoRtnInsts,
1324   FeatureFlatAtomicFaddF32Inst,
1325   FeatureImageInsts,
1326   FeaturePackedTID,
1327   FeatureVcmpxPermlaneHazard,
1328   FeatureVALUTransUseHazard,
1329   FeatureMADIntraFwdBug]>;
1330
1331def FeatureISAVersion11_0_0 : FeatureSet<
1332  !listconcat(FeatureISAVersion11_Common.Features,
1333    [FeatureGFX11FullVGPRs,
1334     FeatureUserSGPRInit16Bug])>;
1335
1336def FeatureISAVersion11_0_1 : FeatureSet<
1337  !listconcat(FeatureISAVersion11_Common.Features,
1338    [FeatureGFX11FullVGPRs])>;
1339
1340def FeatureISAVersion11_0_2 : FeatureSet<
1341  !listconcat(FeatureISAVersion11_Common.Features,
1342    [FeatureUserSGPRInit16Bug])>;
1343
1344def FeatureISAVersion11_0_3 : FeatureSet<
1345  !listconcat(FeatureISAVersion11_Common.Features,
1346    [])>;
1347
1348//===----------------------------------------------------------------------===//
1349
1350def AMDGPUInstrInfo : InstrInfo {
1351  let guessInstructionProperties = 1;
1352}
1353
1354def AMDGPUAsmParser : AsmParser {
1355  // Some of the R600 registers have the same name, so this crashes.
1356  // For example T0_XYZW and T0_XY both have the asm name T0.
1357  let ShouldEmitMatchRegisterName = 0;
1358
1359  // Call the custom operand parser for all operands.
1360  let OperandParserMethod = "parseCustomOperand";
1361  let CallCustomParserForAllOperands = true;
1362}
1363
1364def AMDGPUAsmWriter : AsmWriter {
1365  int PassSubtarget = 1;
1366}
1367
1368def AMDGPUAsmVariants {
1369  string Default = "Default";
1370  int Default_ID = 0;
1371  string VOP3 = "VOP3";
1372  int VOP3_ID = 1;
1373  string SDWA = "SDWA";
1374  int SDWA_ID = 2;
1375  string SDWA9 = "SDWA9";
1376  int SDWA9_ID = 3;
1377  string DPP = "DPP";
1378  int DPP_ID = 4;
1379  string VOP3_DPP = "VOP3_DPP";
1380  int VOP3_DPP_ID = 5;
1381  string Disable = "Disable";
1382  int Disable_ID = 6;
1383}
1384
1385def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
1386  let Variant = AMDGPUAsmVariants.Default_ID;
1387  let Name = AMDGPUAsmVariants.Default;
1388}
1389
1390def VOP3AsmParserVariant : AsmParserVariant {
1391  let Variant = AMDGPUAsmVariants.VOP3_ID;
1392  let Name = AMDGPUAsmVariants.VOP3;
1393}
1394
1395def SDWAAsmParserVariant : AsmParserVariant {
1396  let Variant = AMDGPUAsmVariants.SDWA_ID;
1397  let Name = AMDGPUAsmVariants.SDWA;
1398}
1399
1400def SDWA9AsmParserVariant : AsmParserVariant {
1401  let Variant = AMDGPUAsmVariants.SDWA9_ID;
1402  let Name = AMDGPUAsmVariants.SDWA9;
1403}
1404
1405def DPPAsmParserVariant : AsmParserVariant {
1406  let Variant = AMDGPUAsmVariants.DPP_ID;
1407  let Name = AMDGPUAsmVariants.DPP;
1408}
1409
1410def VOP3_DPPAsmParserVariant : AsmParserVariant {
1411  let Variant = AMDGPUAsmVariants.VOP3_DPP_ID;
1412  let Name = AMDGPUAsmVariants.VOP3_DPP;
1413}
1414
1415def AMDGPU : Target {
1416  // Pull in Instruction Info:
1417  let InstructionSet = AMDGPUInstrInfo;
1418  let AssemblyParsers = [AMDGPUAsmParser];
1419  let AssemblyParserVariants = [DefaultAMDGPUAsmParserVariant,
1420                                VOP3AsmParserVariant,
1421                                SDWAAsmParserVariant,
1422                                SDWA9AsmParserVariant,
1423                                DPPAsmParserVariant,
1424                                VOP3_DPPAsmParserVariant];
1425  let AssemblyWriters = [AMDGPUAsmWriter];
1426  let AllowRegisterRenaming = 1;
1427}
1428
1429// Dummy Instruction itineraries for pseudo instructions
1430def ALU_NULL : FuncUnit;
1431def NullALU : InstrItinClass;
1432
1433//===----------------------------------------------------------------------===//
1434// Predicate helper class
1435//===----------------------------------------------------------------------===//
1436
1437def isGFX6 :
1438  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1439  AssemblerPredicate<(all_of FeatureSouthernIslands)>;
1440
1441def isGFX6GFX7 :
1442  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1443            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1444  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>;
1445
1446def isGFX6GFX7GFX10 :
1447  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1448            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1449            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1450  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX11Insts))>;
1451
1452def isGFX6GFX7GFX10Plus :
1453  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1454            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1455            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1456  AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>;
1457
1458def isGFX7Only :
1459  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1460  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>;
1461
1462def isGFX7GFX10 :
1463  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1464            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1465  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX11Insts))>;
1466
1467def isGFX7GFX10GFX11 :
1468  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1469            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1470            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1471  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>;
1472
1473def isGFX7GFX8GFX9 :
1474  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1475            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1476            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1477  AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>;
1478
1479def isGFX6GFX7GFX8GFX9 :
1480  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1481            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1482            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1483            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1484  AssemblerPredicate<(all_of (not FeatureGFX10Insts))>;
1485
1486def isGFX6GFX7GFX8GFX9NotGFX90A :
1487  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1488            "(Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1489            " Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1490            " Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1491            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1492  AssemblerPredicate<(all_of (not FeatureGFX10Insts), (not FeatureGFX90AInsts))>;
1493
1494def isGFX6GFX7GFX8GFX9GFX10 :
1495  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1496            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1497            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1498            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1499            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1500  AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
1501
1502def isGFX7GFX8GFX9GFX10 :
1503  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1504            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1505            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1506            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1507  AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
1508
1509def isGFX7Plus :
1510  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
1511  AssemblerPredicate<(all_of FeatureCIInsts)>;
1512
1513def isGFX8Plus :
1514  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1515  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1516
1517def isGFX8Only : Predicate<"Subtarget->getGeneration() =="
1518                           "AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1519  AssemblerPredicate <(all_of FeatureVolcanicIslands)>;
1520
1521def isGFX9Plus :
1522  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1523  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1524
1525def isGFX9Only : Predicate <
1526  "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1527  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>;
1528
1529def isGCN3ExcludingGFX90A :
1530  Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1531  AssemblerPredicate<(all_of FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1532
1533def isGFX90APlus :
1534  Predicate<"Subtarget->hasGFX90AInsts()">,
1535  AssemblerPredicate<(all_of FeatureGFX90AInsts)>;
1536
1537def isNotGFX90APlus :
1538  Predicate<"!Subtarget->hasGFX90AInsts()">,
1539  AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
1540
1541def isGFX8GFX9NotGFX90A :
1542  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1543            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1544            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1545  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1546
1547def isGFX90AOnly :
1548  Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
1549  AssemblerPredicate<(all_of FeatureGFX90AInsts, (not FeatureGFX940Insts))>;
1550
1551def isGFX908orGFX90A :
1552  Predicate<"Subtarget->hasMAIInsts() && !Subtarget->hasGFX940Insts()">,
1553  AssemblerPredicate<(all_of FeatureMAIInsts, (not FeatureGFX940Insts))>;
1554
1555def isGFX940Plus :
1556  Predicate<"Subtarget->hasGFX940Insts()">,
1557  AssemblerPredicate<(all_of FeatureGFX940Insts)>;
1558
1559def isGFX8GFX9NotGFX940 :
1560  Predicate<"!Subtarget->hasGFX940Insts() &&"
1561            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1562            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1563  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX940Insts))>;
1564
1565def isGFX8GFX9 :
1566  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1567            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1568  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>;
1569
1570def isGFX10Only :
1571  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1572  AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX11Insts))>;
1573
1574def isGFX10Plus :
1575  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1576  AssemblerPredicate<(all_of FeatureGFX10Insts)>;
1577
1578def isGFX10Before1030 :
1579  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
1580            "!Subtarget->hasGFX10_3Insts()">,
1581  AssemblerPredicate<(all_of FeatureGFX10Insts,(not FeatureGFX10_3Insts))>;
1582
1583def isGFX9GFX10 :
1584  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1585            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1586  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureGFX11Insts))>;
1587
1588def isGFX8GFX9GFX10 :
1589  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1590            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1591            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1592  AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX11Insts))>;
1593
1594def isGFX11Only :
1595  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1596  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1597
1598def isGFX11Plus :
1599  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1600  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1601
1602def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
1603  AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
1604
1605def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
1606  AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>;
1607def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
1608  AssemblerPredicate<(all_of FeatureFlatScratchInsts)>;
1609def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">,
1610  AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>;
1611def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
1612  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1613
1614def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
1615  AssemblerPredicate<(any_of FeatureGFX10_3Insts, FeatureGFX940Insts)>;
1616def HasFlatScratchSVSMode : Predicate<"Subtarget->hasFlatScratchSVSMode()">,
1617  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1618
1619def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
1620  AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
1621
1622def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
1623  AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
1624
1625def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">,
1626  AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>;
1627def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">,
1628  AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>;
1629
1630def D16PreservesUnusedBits :
1631  Predicate<"Subtarget->d16PreservesUnusedBits()">,
1632  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>;
1633
1634def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
1635def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
1636
1637def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1638  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1639
1640def HasLDSFPAtomicAdd : Predicate<"Subtarget->hasLDSFPAtomicAdd()">,
1641  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1642
1643def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">,
1644  AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>;
1645
1646def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">;
1647
1648def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
1649  AssemblerPredicate<(all_of Feature16BitInsts)>;
1650
1651def HasTrue16BitInsts : Predicate<"Subtarget->hasTrue16BitInsts()">,
1652  AssemblerPredicate<(all_of FeatureTrue16BitInsts)>;
1653def NotHasTrue16BitInsts : Predicate<"!Subtarget->hasTrue16BitInsts()">;
1654
1655def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">,
1656  AssemblerPredicate<(all_of FeatureVOP3P)>;
1657
1658def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">;
1659def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">;
1660
1661def HasFminFmaxLegacy : Predicate<"Subtarget->hasFminFmaxLegacy()">;
1662
1663def HasSDWA : Predicate<"Subtarget->hasSDWA()">,
1664  AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>;
1665
1666def HasSDWA9 :
1667  Predicate<"Subtarget->hasSDWA()">,
1668  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>;
1669
1670def HasSDWA10 :
1671  Predicate<"Subtarget->hasSDWA()">,
1672  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>;
1673
1674def HasDPP : Predicate<"Subtarget->hasDPP()">,
1675  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>;
1676
1677def HasDPP8 : Predicate<"Subtarget->hasDPP8()">,
1678  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>;
1679
1680def Has64BitDPP : Predicate<"Subtarget->has64BitDPP()">,
1681  AssemblerPredicate<(all_of Feature64BitDPP)>;
1682
1683def HasPackedFP32Ops : Predicate<"Subtarget->hasPackedFP32Ops()">,
1684  AssemblerPredicate<(all_of FeaturePackedFP32Ops)>;
1685
1686def HasFmaakFmamkF32Insts :
1687  Predicate<"Subtarget->hasFmaakFmamkF32Insts()">,
1688  AssemblerPredicate<(any_of FeatureGFX10Insts, FeatureGFX940Insts)>;
1689
1690def HasImageInsts : Predicate<"Subtarget->hasImageInsts()">,
1691  AssemblerPredicate<(all_of FeatureImageInsts)>;
1692
1693def HasExtendedImageInsts : Predicate<"Subtarget->hasExtendedImageInsts()">,
1694  AssemblerPredicate<(all_of FeatureExtendedImageInsts)>;
1695
1696def HasR128A16 : Predicate<"Subtarget->hasR128A16()">,
1697  AssemblerPredicate<(all_of FeatureR128A16)>;
1698
1699def HasA16 : Predicate<"Subtarget->hasA16()">,
1700  AssemblerPredicate<(all_of FeatureA16)>;
1701
1702def HasG16 : Predicate<"Subtarget->hasG16()">,
1703  AssemblerPredicate<(all_of FeatureG16)>;
1704
1705def HasDPP16 : Predicate<"Subtarget->hasDPP()">,
1706  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>;
1707
1708def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
1709  AssemblerPredicate<(all_of FeatureIntClamp)>;
1710
1711def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
1712  AssemblerPredicate<(all_of FeatureMadMixInsts)>;
1713
1714def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">,
1715  AssemblerPredicate<(all_of FeatureScalarStores)>;
1716
1717def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">,
1718  AssemblerPredicate<(all_of FeatureScalarAtomics)>;
1719
1720def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">,
1721  AssemblerPredicate<(all_of FeatureNoSdstCMPX)>;
1722
1723def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">,
1724  AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>;
1725
1726def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
1727def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
1728def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">,
1729                      AssemblerPredicate<(all_of FeatureVGPRIndexMode)>;
1730def HasMovrel : Predicate<"Subtarget->hasMovrel()">,
1731                AssemblerPredicate<(all_of FeatureMovrel)>;
1732
1733def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
1734  AssemblerPredicate<(all_of FeatureFmaMixInsts)>;
1735
1736def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
1737  AssemblerPredicate<(all_of FeatureDLInsts)>;
1738
1739def HasFmacF64Inst : Predicate<"Subtarget->hasFmacF64Inst()">,
1740  AssemblerPredicate<(all_of FeatureFmacF64Inst)>;
1741
1742def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
1743  AssemblerPredicate<(all_of FeatureDot1Insts)>;
1744
1745def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
1746  AssemblerPredicate<(all_of FeatureDot2Insts)>;
1747
1748def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">,
1749  AssemblerPredicate<(all_of FeatureDot3Insts)>;
1750
1751def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">,
1752  AssemblerPredicate<(all_of FeatureDot4Insts)>;
1753
1754def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1755  AssemblerPredicate<(all_of FeatureDot5Insts)>;
1756
1757def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1758  AssemblerPredicate<(all_of FeatureDot6Insts)>;
1759
1760def HasDot7Insts : Predicate<"Subtarget->hasDot7Insts()">,
1761  AssemblerPredicate<(all_of FeatureDot7Insts)>;
1762
1763def HasDot8Insts : Predicate<"Subtarget->hasDot8Insts()">,
1764  AssemblerPredicate<(all_of FeatureDot8Insts)>;
1765
1766def HasDot9Insts : Predicate<"Subtarget->hasDot9Insts()">,
1767  AssemblerPredicate<(all_of FeatureDot9Insts)>;
1768
1769def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
1770  AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
1771
1772def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
1773  AssemblerPredicate<(all_of FeatureMAIInsts)>;
1774
1775def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
1776  AssemblerPredicate<(all_of FeatureSMemRealTime)>;
1777
1778def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
1779  AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
1780
1781def HasShaderCyclesRegister : Predicate<"Subtarget->hasShaderCyclesRegister()">,
1782  AssemblerPredicate<(all_of FeatureShaderCyclesRegister)>;
1783
1784def HasFP8Insts : Predicate<"Subtarget->hasFP8Insts()">,
1785  AssemblerPredicate<(all_of FeatureFP8Insts)>;
1786
1787def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
1788  AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
1789
1790def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">,
1791  AssemblerPredicate<(all_of FeatureMadMacF32Insts)>;
1792
1793def HasFmaLegacy32 : Predicate<"Subtarget->hasGFX10_3Insts()">,
1794  AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
1795
1796def HasAtomicFaddRtnInsts : Predicate<"Subtarget->hasAtomicFaddRtnInsts()">,
1797  AssemblerPredicate<(all_of FeatureAtomicFaddRtnInsts)>;
1798def HasAtomicFaddNoRtnInsts : Predicate<"Subtarget->hasAtomicFaddNoRtnInsts()">,
1799  AssemblerPredicate<(all_of FeatureAtomicFaddNoRtnInsts)>;
1800def HasAtomicPkFaddNoRtnInsts
1801  : Predicate<"Subtarget->hasAtomicPkFaddNoRtnInsts()">,
1802  AssemblerPredicate<(all_of FeatureAtomicPkFaddNoRtnInsts)>;
1803def HasFlatAtomicFaddF32Inst
1804  : Predicate<"Subtarget->hasFlatAtomicFaddF32Inst()">,
1805  AssemblerPredicate<(all_of FeatureFlatAtomicFaddF32Inst)>;
1806
1807def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">,
1808  AssemblerPredicate<(all_of FeatureDsSrc2Insts)>;
1809
1810def EnableLateCFGStructurize : Predicate<
1811  "EnableLateStructurizeCFG">;
1812
1813def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
1814
1815def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
1816
1817def HasUnalignedAccessMode : Predicate<"Subtarget->hasUnalignedAccessMode()">,
1818  AssemblerPredicate<(all_of FeatureUnalignedAccessMode)>;
1819
1820def HasMADIntraFwdBug : Predicate<"Subtarget->hasMADIntraFwdBug()">;
1821
1822def HasNotMADIntraFwdBug : Predicate<"!Subtarget->hasMADIntraFwdBug()">;
1823
1824// Include AMDGPU TD files
1825include "SISchedule.td"
1826include "GCNProcessors.td"
1827include "AMDGPUInstrInfo.td"
1828include "SIRegisterInfo.td"
1829include "AMDGPURegisterBanks.td"
1830include "AMDGPUInstructions.td"
1831include "SIInstrInfo.td"
1832include "AMDGPUCallingConv.td"
1833include "AMDGPUSearchableTables.td"
1834