xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPU.td (revision 59c8e88e72633afbc47a4ace0d2170d00d51f7dc) 
1//===-- AMDGPU.td - AMDGPU Tablegen files --------*- tablegen -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===------------------------------------------------------------===//
8
9include "llvm/TableGen/SearchableTable.td"
10include "llvm/Target/Target.td"
11include "AMDGPUFeatures.td"
12
13def p0 : PtrValueType<i64, 0>;
14def p1 : PtrValueType<i64, 1>;
15def p2 : PtrValueType<i32, 2>;
16def p3 : PtrValueType<i32, 3>;
17def p4 : PtrValueType<i64, 4>;
18def p5 : PtrValueType<i32, 5>;
19def p6 : PtrValueType<i32, 6>;
20
21//===------------------------------------------------------------===//
22// Subtarget Features (device properties)
23//===------------------------------------------------------------===//
24
25def FeatureFastFMAF32 : SubtargetFeature<"fast-fmaf",
26  "FastFMAF32",
27  "true",
28  "Assuming f32 fma is at least as fast as mul + add"
29>;
30
31def FeatureFastDenormalF32 : SubtargetFeature<"fast-denormal-f32",
32  "FastDenormalF32",
33  "true",
34  "Enabling denormals does not cause f32 instructions to run at f64 rates"
35>;
36
37def FeatureMIMG_R128 : SubtargetFeature<"mimg-r128",
38  "MIMG_R128",
39  "true",
40  "Support 128-bit texture resources"
41>;
42
43def HalfRate64Ops : SubtargetFeature<"half-rate-64-ops",
44  "HalfRate64Ops",
45  "true",
46  "Most fp64 instructions are half rate instead of quarter"
47>;
48
49def FullRate64Ops : SubtargetFeature<"full-rate-64-ops",
50  "FullRate64Ops",
51  "true",
52  "Most fp64 instructions are full rate"
53>;
54
55def FeatureFlatAddressSpace : SubtargetFeature<"flat-address-space",
56  "FlatAddressSpace",
57  "true",
58  "Support flat address space"
59>;
60
61def FeatureFlatInstOffsets : SubtargetFeature<"flat-inst-offsets",
62  "FlatInstOffsets",
63  "true",
64  "Flat instructions have immediate offset addressing mode"
65>;
66
67def FeatureFlatGlobalInsts : SubtargetFeature<"flat-global-insts",
68  "FlatGlobalInsts",
69  "true",
70  "Have global_* flat memory instructions"
71>;
72
73def FeatureFlatScratchInsts : SubtargetFeature<"flat-scratch-insts",
74  "FlatScratchInsts",
75  "true",
76  "Have scratch_* flat memory instructions"
77>;
78
79def FeatureScalarFlatScratchInsts : SubtargetFeature<"scalar-flat-scratch-insts",
80  "ScalarFlatScratchInsts",
81  "true",
82  "Have s_scratch_* flat memory instructions"
83>;
84
85def FeatureEnableFlatScratch : SubtargetFeature<"enable-flat-scratch",
86  "EnableFlatScratch",
87  "true",
88  "Use scratch_* flat memory instructions to access scratch"
89>;
90
91def FeatureAddNoCarryInsts : SubtargetFeature<"add-no-carry-insts",
92  "AddNoCarryInsts",
93  "true",
94  "Have VALU add/sub instructions without carry out"
95>;
96
97def FeatureUnalignedBufferAccess : SubtargetFeature<"unaligned-buffer-access",
98  "UnalignedBufferAccess",
99  "true",
100  "Hardware supports unaligned global loads and stores"
101>;
102
103def FeatureTrapHandler: SubtargetFeature<"trap-handler",
104  "TrapHandler",
105  "true",
106  "Trap handler support"
107>;
108
109def FeatureUnalignedScratchAccess : SubtargetFeature<"unaligned-scratch-access",
110  "UnalignedScratchAccess",
111  "true",
112  "Support unaligned scratch loads and stores"
113>;
114
115def FeatureUnalignedDSAccess : SubtargetFeature<"unaligned-ds-access",
116  "UnalignedDSAccess",
117  "true",
118  "Hardware supports unaligned local and region loads and stores"
119>;
120
121def FeatureApertureRegs : SubtargetFeature<"aperture-regs",
122  "HasApertureRegs",
123  "true",
124  "Has Memory Aperture Base and Size Registers"
125>;
126
127def FeatureMadMixInsts : SubtargetFeature<"mad-mix-insts",
128  "HasMadMixInsts",
129  "true",
130  "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions"
131>;
132
133def FeatureFmaMixInsts : SubtargetFeature<"fma-mix-insts",
134  "HasFmaMixInsts",
135  "true",
136  "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions"
137>;
138
139def FeatureSupportsXNACK : SubtargetFeature<"xnack-support",
140  "SupportsXNACK",
141  "true",
142  "Hardware supports XNACK"
143>;
144
145// XNACK is disabled if SH_MEM_CONFIG.ADDRESS_MODE = GPUVM on chips that support
146// XNACK. The current default kernel driver setting is:
147// - graphics ring: XNACK disabled
148// - compute ring: XNACK enabled
149//
150// If XNACK is enabled, the VMEM latency can be worse.
151// If XNACK is disabled, the 2 SGPRs can be used for general purposes.
152def FeatureXNACK : SubtargetFeature<"xnack",
153  "EnableXNACK",
154  "true",
155  "Enable XNACK support"
156>;
157
158def FeatureTgSplit : SubtargetFeature<"tgsplit",
159  "EnableTgSplit",
160  "true",
161  "Enable threadgroup split execution"
162>;
163
164def FeatureCuMode : SubtargetFeature<"cumode",
165  "EnableCuMode",
166  "true",
167  "Enable CU wavefront execution mode"
168>;
169
170def FeatureSGPRInitBug : SubtargetFeature<"sgpr-init-bug",
171  "SGPRInitBug",
172  "true",
173  "VI SGPR initialization bug requiring a fixed SGPR allocation size"
174>;
175
176def FeatureUserSGPRInit16Bug : SubtargetFeature<"user-sgpr-init16-bug",
177  "UserSGPRInit16Bug",
178  "true",
179  "Bug requiring at least 16 user+system SGPRs to be enabled"
180>;
181
182def FeatureLdsMisalignedBug : SubtargetFeature<"lds-misaligned-bug",
183  "LDSMisalignedBug",
184  "true",
185  "Some GFX10 bug with multi-dword LDS and flat access that is not naturally aligned in WGP mode"
186>;
187
188def FeatureMFMAInlineLiteralBug : SubtargetFeature<"mfma-inline-literal-bug",
189  "HasMFMAInlineLiteralBug",
190  "true",
191  "MFMA cannot use inline literal as SrcC"
192>;
193
194def FeatureVcmpxPermlaneHazard : SubtargetFeature<"vcmpx-permlane-hazard",
195  "HasVcmpxPermlaneHazard",
196  "true",
197  "TODO: describe me"
198>;
199
200def FeatureVMEMtoScalarWriteHazard : SubtargetFeature<"vmem-to-scalar-write-hazard",
201  "HasVMEMtoScalarWriteHazard",
202  "true",
203  "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution."
204>;
205
206def FeatureSMEMtoVectorWriteHazard : SubtargetFeature<"smem-to-vector-write-hazard",
207  "HasSMEMtoVectorWriteHazard",
208  "true",
209  "s_load_dword followed by v_cmp page faults"
210>;
211
212def FeatureInstFwdPrefetchBug : SubtargetFeature<"inst-fwd-prefetch-bug",
213  "HasInstFwdPrefetchBug",
214  "true",
215  "S_INST_PREFETCH instruction causes shader to hang"
216>;
217
218def FeatureVcmpxExecWARHazard : SubtargetFeature<"vcmpx-exec-war-hazard",
219  "HasVcmpxExecWARHazard",
220  "true",
221  "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)"
222>;
223
224def FeatureLdsBranchVmemWARHazard : SubtargetFeature<"lds-branch-vmem-war-hazard",
225  "HasLdsBranchVmemWARHazard",
226  "true",
227  "Switching between LDS and VMEM-tex not waiting VM_VSRC=0"
228>;
229
230def FeatureNSAtoVMEMBug : SubtargetFeature<"nsa-to-vmem-bug",
231  "HasNSAtoVMEMBug",
232  "true",
233  "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero"
234>;
235
236def FeatureNSAClauseBug : SubtargetFeature<"nsa-clause-bug",
237  "HasNSAClauseBug",
238  "true",
239  "MIMG-NSA in a hard clause has unpredictable results on GFX10.1"
240>;
241
242def FeatureFlatSegmentOffsetBug : SubtargetFeature<"flat-segment-offset-bug",
243  "HasFlatSegmentOffsetBug",
244  "true",
245  "GFX10 bug where inst_offset is ignored when flat instructions access global memory"
246>;
247
248def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
249  "NegativeScratchOffsetBug",
250  "true",
251  "Negative immediate offsets in scratch instructions with an SGPR offset page fault on GFX9"
252>;
253
254def FeatureNegativeUnalignedScratchOffsetBug : SubtargetFeature<"negative-unaligned-scratch-offset-bug",
255  "NegativeUnalignedScratchOffsetBug",
256  "true",
257  "Scratch instructions with a VGPR offset and a negative immediate offset that is not a multiple of 4 read wrong memory on GFX10"
258>;
259
260def FeatureOffset3fBug : SubtargetFeature<"offset-3f-bug",
261  "HasOffset3fBug",
262  "true",
263  "Branch offset of 3f hardware bug"
264>;
265
266def FeatureImageStoreD16Bug : SubtargetFeature<"image-store-d16-bug",
267  "HasImageStoreD16Bug",
268  "true",
269  "Image Store D16 hardware bug"
270>;
271
272def FeatureImageGather4D16Bug : SubtargetFeature<"image-gather4-d16-bug",
273  "HasImageGather4D16Bug",
274  "true",
275  "Image Gather4 D16 hardware bug"
276>;
277
278def FeatureMADIntraFwdBug : SubtargetFeature<"mad-intra-fwd-bug",
279  "HasMADIntraFwdBug",
280  "true",
281  "MAD_U64/I64 intra instruction forwarding bug"
282>;
283
284class SubtargetFeatureLDSBankCount <int Value> : SubtargetFeature <
285  "ldsbankcount"#Value,
286  "LDSBankCount",
287  !cast<string>(Value),
288  "The number of LDS banks per compute unit."
289>;
290
291def FeatureLDSBankCount16 : SubtargetFeatureLDSBankCount<16>;
292def FeatureLDSBankCount32 : SubtargetFeatureLDSBankCount<32>;
293
294def FeatureGCN3Encoding : SubtargetFeature<"gcn3-encoding",
295  "GCN3Encoding",
296  "true",
297  "Encoding format for VI"
298>;
299
300def FeatureCIInsts : SubtargetFeature<"ci-insts",
301  "CIInsts",
302  "true",
303  "Additional instructions for CI+"
304>;
305
306def FeatureGFX8Insts : SubtargetFeature<"gfx8-insts",
307  "GFX8Insts",
308  "true",
309  "Additional instructions for GFX8+"
310>;
311
312def FeatureGFX9Insts : SubtargetFeature<"gfx9-insts",
313  "GFX9Insts",
314  "true",
315  "Additional instructions for GFX9+"
316>;
317
318def FeatureGFX90AInsts : SubtargetFeature<"gfx90a-insts",
319  "GFX90AInsts",
320  "true",
321  "Additional instructions for GFX90A+"
322>;
323
324def FeatureGFX940Insts : SubtargetFeature<"gfx940-insts",
325  "GFX940Insts",
326  "true",
327  "Additional instructions for GFX940+"
328>;
329
330def FeatureGFX10Insts : SubtargetFeature<"gfx10-insts",
331  "GFX10Insts",
332  "true",
333  "Additional instructions for GFX10+"
334>;
335
336def FeatureGFX11Insts : SubtargetFeature<"gfx11-insts",
337  "GFX11Insts",
338  "true",
339  "Additional instructions for GFX11+"
340>;
341
342def FeatureGFX10_3Insts : SubtargetFeature<"gfx10-3-insts",
343  "GFX10_3Insts",
344  "true",
345  "Additional instructions for GFX10.3"
346>;
347
348def FeatureGFX7GFX8GFX9Insts : SubtargetFeature<"gfx7-gfx8-gfx9-insts",
349  "GFX7GFX8GFX9Insts",
350  "true",
351  "Instructions shared in GFX7, GFX8, GFX9"
352>;
353
354def FeatureSMemRealTime : SubtargetFeature<"s-memrealtime",
355  "HasSMemRealTime",
356  "true",
357  "Has s_memrealtime instruction"
358>;
359
360def FeatureInv2PiInlineImm : SubtargetFeature<"inv-2pi-inline-imm",
361  "HasInv2PiInlineImm",
362  "true",
363  "Has 1 / (2 * pi) as inline immediate"
364>;
365
366def Feature16BitInsts : SubtargetFeature<"16-bit-insts",
367  "Has16BitInsts",
368  "true",
369  "Has i16/f16 instructions"
370>;
371
372def FeatureTrue16BitInsts : SubtargetFeature<"true16",
373  "HasTrue16BitInsts",
374  "true",
375  "True 16-bit operand instructions"
376>;
377
378def FeatureVOP3P : SubtargetFeature<"vop3p",
379  "HasVOP3PInsts",
380  "true",
381  "Has VOP3P packed instructions"
382>;
383
384def FeatureMovrel : SubtargetFeature<"movrel",
385  "HasMovrel",
386  "true",
387  "Has v_movrel*_b32 instructions"
388>;
389
390def FeatureVGPRIndexMode : SubtargetFeature<"vgpr-index-mode",
391  "HasVGPRIndexMode",
392  "true",
393  "Has VGPR mode register indexing"
394>;
395
396def FeatureScalarStores : SubtargetFeature<"scalar-stores",
397  "HasScalarStores",
398  "true",
399  "Has store scalar memory instructions"
400>;
401
402def FeatureScalarAtomics : SubtargetFeature<"scalar-atomics",
403  "HasScalarAtomics",
404  "true",
405  "Has atomic scalar memory instructions"
406>;
407
408def FeatureSDWA : SubtargetFeature<"sdwa",
409  "HasSDWA",
410  "true",
411  "Support SDWA (Sub-DWORD Addressing) extension"
412>;
413
414def FeatureSDWAOmod : SubtargetFeature<"sdwa-omod",
415  "HasSDWAOmod",
416  "true",
417  "Support OMod with SDWA (Sub-DWORD Addressing) extension"
418>;
419
420def FeatureSDWAScalar : SubtargetFeature<"sdwa-scalar",
421  "HasSDWAScalar",
422  "true",
423  "Support scalar register with SDWA (Sub-DWORD Addressing) extension"
424>;
425
426def FeatureSDWASdst : SubtargetFeature<"sdwa-sdst",
427  "HasSDWASdst",
428  "true",
429  "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension"
430>;
431
432def FeatureSDWAMac : SubtargetFeature<"sdwa-mav",
433  "HasSDWAMac",
434  "true",
435  "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension"
436>;
437
438def FeatureSDWAOutModsVOPC : SubtargetFeature<"sdwa-out-mods-vopc",
439  "HasSDWAOutModsVOPC",
440  "true",
441  "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension"
442>;
443
444def FeatureDPP : SubtargetFeature<"dpp",
445  "HasDPP",
446  "true",
447  "Support DPP (Data Parallel Primitives) extension"
448>;
449
450// DPP8 allows arbitrary cross-lane swizzling within groups of 8 lanes.
451def FeatureDPP8 : SubtargetFeature<"dpp8",
452  "HasDPP8",
453  "true",
454  "Support DPP8 (Data Parallel Primitives) extension"
455>;
456
457def Feature64BitDPP : SubtargetFeature<"dpp-64bit",
458  "Has64BitDPP",
459  "true",
460  "Support DPP (Data Parallel Primitives) extension"
461>;
462
463def FeaturePackedFP32Ops : SubtargetFeature<"packed-fp32-ops",
464  "HasPackedFP32Ops",
465  "true",
466  "Support packed fp32 instructions"
467>;
468
469def FeatureR128A16 : SubtargetFeature<"r128-a16",
470  "HasR128A16",
471  "true",
472  "Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 is aliased with r128"
473>;
474
475def FeatureA16 : SubtargetFeature<"a16",
476  "HasA16",
477  "true",
478  "Support A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands"
479>;
480
481def FeatureG16 : SubtargetFeature<"g16",
482  "HasG16",
483  "true",
484  "Support G16 for 16-bit gradient image operands"
485>;
486
487def FeatureNSAEncoding : SubtargetFeature<"nsa-encoding",
488  "HasNSAEncoding",
489  "true",
490  "Support NSA encoding for image instructions"
491>;
492
493def FeaturePartialNSAEncoding : SubtargetFeature<"partial-nsa-encoding",
494  "HasPartialNSAEncoding",
495  "true",
496  "Support partial NSA encoding for image instructions"
497>;
498
499def FeatureImageInsts : SubtargetFeature<"image-insts",
500  "HasImageInsts",
501  "true",
502  "Support image instructions"
503>;
504
505def FeatureExtendedImageInsts : SubtargetFeature<"extended-image-insts",
506  "HasExtendedImageInsts",
507  "true",
508  "Support mips != 0, lod != 0, gather4, and get_lod"
509>;
510
511def FeatureGFX10_AEncoding : SubtargetFeature<"gfx10_a-encoding",
512  "GFX10_AEncoding",
513  "true",
514  "Has BVH ray tracing instructions"
515>;
516
517def FeatureGFX10_BEncoding : SubtargetFeature<"gfx10_b-encoding",
518  "GFX10_BEncoding",
519  "true",
520  "Encoding format GFX10_B"
521>;
522
523def FeatureIntClamp : SubtargetFeature<"int-clamp-insts",
524  "HasIntClamp",
525  "true",
526  "Support clamp for integer destination"
527>;
528
529def FeatureUnpackedD16VMem : SubtargetFeature<"unpacked-d16-vmem",
530  "HasUnpackedD16VMem",
531  "true",
532  "Has unpacked d16 vmem instructions"
533>;
534
535def FeatureDLInsts : SubtargetFeature<"dl-insts",
536  "HasDLInsts",
537  "true",
538  "Has v_fmac_f32 and v_xnor_b32 instructions"
539>;
540
541def FeatureFmacF64Inst : SubtargetFeature<"fmacf64-inst",
542  "HasFmacF64Inst",
543  "true",
544  "Has v_fmac_f64 instruction"
545>;
546
547def FeatureDot1Insts : SubtargetFeature<"dot1-insts",
548  "HasDot1Insts",
549  "true",
550  "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions"
551>;
552
553def FeatureDot2Insts : SubtargetFeature<"dot2-insts",
554  "HasDot2Insts",
555  "true",
556  "Has v_dot2_i32_i16, v_dot2_u32_u16 instructions"
557>;
558
559def FeatureDot3Insts : SubtargetFeature<"dot3-insts",
560  "HasDot3Insts",
561  "true",
562  "Has v_dot8c_i32_i4 instruction"
563>;
564
565def FeatureDot4Insts : SubtargetFeature<"dot4-insts",
566  "HasDot4Insts",
567  "true",
568  "Has v_dot2c_i32_i16 instruction"
569>;
570
571def FeatureDot5Insts : SubtargetFeature<"dot5-insts",
572  "HasDot5Insts",
573  "true",
574  "Has v_dot2c_f32_f16 instruction"
575>;
576
577def FeatureDot6Insts : SubtargetFeature<"dot6-insts",
578  "HasDot6Insts",
579  "true",
580  "Has v_dot4c_i32_i8 instruction"
581>;
582
583def FeatureDot7Insts : SubtargetFeature<"dot7-insts",
584  "HasDot7Insts",
585  "true",
586  "Has v_dot4_u32_u8, v_dot8_u32_u4 instructions"
587>;
588
589def FeatureDot8Insts : SubtargetFeature<"dot8-insts",
590  "HasDot8Insts",
591  "true",
592  "Has v_dot4_i32_iu8, v_dot8_i32_iu4 instructions"
593>;
594
595def FeatureDot9Insts : SubtargetFeature<"dot9-insts",
596  "HasDot9Insts",
597  "true",
598  "Has v_dot2_f16_f16, v_dot2_bf16_bf16, v_dot2_f32_bf16 instructions"
599>;
600
601def FeatureDot10Insts : SubtargetFeature<"dot10-insts",
602  "HasDot10Insts",
603  "true",
604  "Has v_dot2_f32_f16 instruction"
605>;
606
607def FeatureMAIInsts : SubtargetFeature<"mai-insts",
608  "HasMAIInsts",
609  "true",
610  "Has mAI instructions"
611>;
612
613def FeatureFP8Insts : SubtargetFeature<"fp8-insts",
614  "HasFP8Insts",
615  "true",
616  "Has fp8 and bf8 instructions"
617>;
618
619def FeaturePkFmacF16Inst : SubtargetFeature<"pk-fmac-f16-inst",
620  "HasPkFmacF16Inst",
621  "true",
622  "Has v_pk_fmac_f16 instruction"
623>;
624
625def FeatureAtomicDsPkAdd16Insts : SubtargetFeature<"atomic-ds-pk-add-16-insts",
626  "HasAtomicDsPkAdd16Insts",
627  "true",
628  "Has ds_pk_add_bf16, ds_pk_add_f16, ds_pk_add_rtn_bf16, "
629  "ds_pk_add_rtn_f16 instructions"
630>;
631
632def FeatureAtomicFlatPkAdd16Insts : SubtargetFeature<"atomic-flat-pk-add-16-insts",
633  "HasAtomicFlatPkAdd16Insts",
634  "true",
635  "Has flat_atomic_pk_add_f16 and flat_atomic_pk_add_bf16 instructions"
636>;
637
638def FeatureAtomicFaddRtnInsts : SubtargetFeature<"atomic-fadd-rtn-insts",
639  "HasAtomicFaddRtnInsts",
640  "true",
641  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
642  "return original value",
643  [FeatureFlatGlobalInsts]
644>;
645
646def FeatureAtomicFaddNoRtnInsts : SubtargetFeature<"atomic-fadd-no-rtn-insts",
647  "HasAtomicFaddNoRtnInsts",
648  "true",
649  "Has buffer_atomic_add_f32 and global_atomic_add_f32 instructions that "
650  "don't return original value",
651  [FeatureFlatGlobalInsts]
652>;
653
654def FeatureAtomicBufferGlobalPkAddF16NoRtnInsts
655  : SubtargetFeature<"atomic-buffer-global-pk-add-f16-no-rtn-insts",
656  "HasAtomicBufferGlobalPkAddF16NoRtnInsts",
657  "true",
658  "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
659  "don't return original value",
660  [FeatureFlatGlobalInsts]
661>;
662
663def FeatureAtomicBufferGlobalPkAddF16Insts : SubtargetFeature<"atomic-buffer-global-pk-add-f16-insts",
664 "HasAtomicBufferGlobalPkAddF16Insts",
665 "true",
666 "Has buffer_atomic_pk_add_f16 and global_atomic_pk_add_f16 instructions that "
667 "can return original value",
668 [FeatureFlatGlobalInsts]
669>;
670
671def FeatureAtomicGlobalPkAddBF16Inst : SubtargetFeature<"atomic-global-pk-add-bf16-inst",
672 "HasAtomicGlobalPkAddBF16Inst",
673 "true",
674 "Has global_atomic_pk_add_bf16 instruction",
675 [FeatureFlatGlobalInsts]
676>;
677
678def FeatureFlatAtomicFaddF32Inst
679  : SubtargetFeature<"flat-atomic-fadd-f32-inst",
680  "HasFlatAtomicFaddF32Inst",
681  "true",
682  "Has flat_atomic_add_f32 instruction"
683>;
684
685def FeatureSupportsSRAMECC : SubtargetFeature<"sramecc-support",
686  "SupportsSRAMECC",
687  "true",
688  "Hardware supports SRAMECC"
689>;
690
691def FeatureSRAMECC : SubtargetFeature<"sramecc",
692  "EnableSRAMECC",
693  "true",
694  "Enable SRAMECC"
695>;
696
697def FeatureNoSdstCMPX : SubtargetFeature<"no-sdst-cmpx",
698  "HasNoSdstCMPX",
699  "true",
700  "V_CMPX does not write VCC/SGPR in addition to EXEC"
701>;
702
703def FeatureVscnt : SubtargetFeature<"vscnt",
704  "HasVscnt",
705  "true",
706  "Has separate store vscnt counter"
707>;
708
709def FeatureGetWaveIdInst : SubtargetFeature<"get-wave-id-inst",
710  "HasGetWaveIdInst",
711  "true",
712  "Has s_get_waveid_in_workgroup instruction"
713>;
714
715def FeatureSMemTimeInst : SubtargetFeature<"s-memtime-inst",
716  "HasSMemTimeInst",
717  "true",
718  "Has s_memtime instruction"
719>;
720
721def FeatureShaderCyclesRegister : SubtargetFeature<"shader-cycles-register",
722  "HasShaderCyclesRegister",
723  "true",
724  "Has SHADER_CYCLES hardware register"
725>;
726
727def FeatureMadMacF32Insts : SubtargetFeature<"mad-mac-f32-insts",
728  "HasMadMacF32Insts",
729  "true",
730  "Has v_mad_f32/v_mac_f32/v_madak_f32/v_madmk_f32 instructions"
731>;
732
733def FeatureDsSrc2Insts : SubtargetFeature<"ds-src2-insts",
734  "HasDsSrc2Insts",
735  "true",
736  "Has ds_*_src2 instructions"
737>;
738
739def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
740  "HasVOP3Literal",
741  "true",
742  "Can use one literal in VOP3"
743>;
744
745def FeatureNoDataDepHazard : SubtargetFeature<"no-data-dep-hazard",
746  "HasNoDataDepHazard",
747  "true",
748  "Does not need SW waitstates"
749>;
750
751def FeatureGFX11FullVGPRs : SubtargetFeature<"gfx11-full-vgprs",
752  "HasGFX11FullVGPRs",
753  "true",
754  "GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10"
755>;
756
757
758def FeatureVOPD : SubtargetFeature<"vopd",
759  "HasVOPDInsts",
760  "true",
761  "Has VOPD dual issue wave32 instructions"
762>;
763
764def FeatureVALUTransUseHazard : SubtargetFeature<"valu-trans-use-hazard",
765  "HasVALUTransUseHazard",
766  "true",
767  "Hazard when TRANS instructions are closely followed by a use of the result"
768>;
769
770def FeatureForceStoreSC0SC1 : SubtargetFeature<"force-store-sc0-sc1",
771  "HasForceStoreSC0SC1",
772  "true",
773  "Has SC0 and SC1 on stores"
774>;
775
776//===------------------------------------------------------------===//
777// Subtarget Features (options and debugging)
778//===------------------------------------------------------------===//
779
780class FeatureMaxPrivateElementSize<int size> : SubtargetFeature<
781  "max-private-element-size-"#size,
782  "MaxPrivateElementSize",
783  !cast<string>(size),
784  "Maximum private access size may be "#size
785>;
786
787def FeatureMaxPrivateElementSize4 : FeatureMaxPrivateElementSize<4>;
788def FeatureMaxPrivateElementSize8 : FeatureMaxPrivateElementSize<8>;
789def FeatureMaxPrivateElementSize16 : FeatureMaxPrivateElementSize<16>;
790
791def FeatureDumpCode : SubtargetFeature <"DumpCode",
792  "DumpCode",
793  "true",
794  "Dump MachineInstrs in the CodeEmitter"
795>;
796
797def FeatureDumpCodeLower : SubtargetFeature <"dumpcode",
798  "DumpCode",
799  "true",
800  "Dump MachineInstrs in the CodeEmitter"
801>;
802
803// XXX - This should probably be removed once enabled by default
804def FeatureEnableLoadStoreOpt : SubtargetFeature <"load-store-opt",
805  "EnableLoadStoreOpt",
806  "true",
807  "Enable SI load/store optimizer pass"
808>;
809
810// Performance debugging feature. Allow using DS instruction immediate
811// offsets even if the base pointer can't be proven to be base. On SI,
812// base pointer values that won't give the same result as a 16-bit add
813// are not safe to fold, but this will override the conservative test
814// for the base pointer.
815def FeatureEnableUnsafeDSOffsetFolding : SubtargetFeature <
816  "unsafe-ds-offset-folding",
817  "EnableUnsafeDSOffsetFolding",
818  "true",
819  "Force using DS instruction immediate offsets on SI"
820>;
821
822def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler",
823  "EnableSIScheduler",
824  "true",
825  "Enable SI Machine Scheduler"
826>;
827
828def FeatureEnableDS128 : SubtargetFeature<"enable-ds128",
829  "EnableDS128",
830  "true",
831  "Use ds_{read|write}_b128"
832>;
833
834// Sparse texture support requires that all result registers are zeroed when
835// PRTStrictNull is set to true. This feature is turned on for all architectures
836// but is enabled as a feature in case there are situations where PRTStrictNull
837// is disabled by the driver.
838def FeatureEnablePRTStrictNull : SubtargetFeature<"enable-prt-strict-null",
839  "EnablePRTStrictNull",
840  "true",
841  "Enable zeroing of result registers for sparse texture fetches"
842>;
843
844// Unless +-flat-for-global is specified, turn on FlatForGlobal for
845// all OS-es on VI and newer hardware to avoid assertion failures due
846// to missing ADDR64 variants of MUBUF instructions.
847// FIXME: moveToVALU should be able to handle converting addr64 MUBUF
848// instructions.
849
850def FeatureFlatForGlobal : SubtargetFeature<"flat-for-global",
851  "FlatForGlobal",
852  "true",
853  "Force to generate flat instruction for global"
854>;
855
856def FeatureAutoWaitcntBeforeBarrier : SubtargetFeature <
857  "auto-waitcnt-before-barrier",
858  "AutoWaitcntBeforeBarrier",
859  "true",
860  "Hardware automatically inserts waitcnt before barrier"
861>;
862
863def FeatureBackOffBarrier : SubtargetFeature <"back-off-barrier",
864  "BackOffBarrier",
865  "true",
866  "Hardware supports backing off s_barrier if an exception occurs"
867>;
868
869def FeatureTrigReducedRange : SubtargetFeature<"trig-reduced-range",
870  "HasTrigReducedRange",
871  "true",
872  "Requires use of fract on arguments to trig instructions"
873>;
874
875// Alignment enforcement is controlled by a configuration register:
876// SH_MEM_CONFIG.alignment_mode
877def FeatureUnalignedAccessMode : SubtargetFeature<"unaligned-access-mode",
878  "UnalignedAccessMode",
879  "true",
880  "Enable unaligned global, local and region loads and stores if the hardware"
881  " supports it"
882>;
883
884def FeaturePackedTID : SubtargetFeature<"packed-tid",
885  "HasPackedTID",
886  "true",
887  "Workitem IDs are packed into v0 at kernel launch"
888>;
889
890def FeatureArchitectedFlatScratch : SubtargetFeature<"architected-flat-scratch",
891  "HasArchitectedFlatScratch",
892  "true",
893  "Flat Scratch register is a readonly SPI initialized architected register"
894>;
895
896def FeatureArchitectedSGPRs : SubtargetFeature<"architected-sgprs",
897  "HasArchitectedSGPRs",
898  "true",
899  "Enable the architected SGPRs"
900>;
901
902// Dummy feature used to disable assembler instructions.
903def FeatureDisable : SubtargetFeature<"",
904  "FeatureDisable","true",
905  "Dummy feature to disable assembler instructions"
906>;
907
908//===----------------------------------------------------------------------===//
909
910class GCNSubtargetFeatureGeneration <string Value,
911                                     string FeatureName,
912                                     list<SubtargetFeature> Implies> :
913        SubtargetFeatureGeneration <Value, FeatureName, "GCNSubtarget", Implies>;
914
915def FeatureSouthernIslands : GCNSubtargetFeatureGeneration<"SOUTHERN_ISLANDS",
916    "southern-islands",
917  [FeatureFP64, FeatureLocalMemorySize32768, FeatureMIMG_R128,
918  FeatureWavefrontSize64, FeatureSMemTimeInst, FeatureMadMacF32Insts,
919  FeatureDsSrc2Insts, FeatureLDSBankCount32, FeatureMovrel,
920  FeatureTrigReducedRange, FeatureExtendedImageInsts, FeatureImageInsts
921  ]
922>;
923
924def FeatureSeaIslands : GCNSubtargetFeatureGeneration<"SEA_ISLANDS",
925    "sea-islands",
926  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
927  FeatureWavefrontSize64, FeatureFlatAddressSpace,
928  FeatureCIInsts, FeatureMovrel, FeatureTrigReducedRange,
929  FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
930  FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureUnalignedBufferAccess,
931  FeatureImageInsts
932  ]
933>;
934
935def FeatureVolcanicIslands : GCNSubtargetFeatureGeneration<"VOLCANIC_ISLANDS",
936  "volcanic-islands",
937  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
938   FeatureWavefrontSize64, FeatureFlatAddressSpace,
939   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
940   FeatureSMemRealTime, FeatureVGPRIndexMode, FeatureMovrel,
941   FeatureScalarStores, FeatureInv2PiInlineImm,
942   FeatureSDWA, FeatureSDWAOutModsVOPC, FeatureSDWAMac, FeatureDPP,
943   FeatureIntClamp, FeatureTrigReducedRange, FeatureGFX8Insts,
944   FeatureGFX7GFX8GFX9Insts, FeatureSMemTimeInst, FeatureMadMacF32Insts,
945   FeatureDsSrc2Insts, FeatureExtendedImageInsts, FeatureFastDenormalF32,
946   FeatureUnalignedBufferAccess, FeatureImageInsts
947  ]
948>;
949
950def FeatureGFX9 : GCNSubtargetFeatureGeneration<"GFX9",
951  "gfx9",
952  [FeatureFP64, FeatureLocalMemorySize65536,
953   FeatureWavefrontSize64, FeatureFlatAddressSpace,
954   FeatureGCN3Encoding, FeatureCIInsts, Feature16BitInsts,
955   FeatureSMemRealTime, FeatureScalarStores, FeatureInv2PiInlineImm,
956   FeatureApertureRegs, FeatureGFX9Insts, FeatureVOP3P, FeatureVGPRIndexMode,
957   FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
958   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
959   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
960   FeatureAddNoCarryInsts, FeatureGFX8Insts, FeatureGFX7GFX8GFX9Insts,
961   FeatureScalarFlatScratchInsts, FeatureScalarAtomics, FeatureR128A16,
962   FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureSupportsXNACK,
963   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess,
964   FeatureNegativeScratchOffsetBug
965  ]
966>;
967
968def FeatureGFX10 : GCNSubtargetFeatureGeneration<"GFX10",
969  "gfx10",
970  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
971   FeatureFlatAddressSpace,
972   FeatureCIInsts, Feature16BitInsts,
973   FeatureSMemRealTime, FeatureInv2PiInlineImm,
974   FeatureApertureRegs, FeatureGFX9Insts, FeatureGFX10Insts, FeatureVOP3P,
975   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
976   FeatureSDWA, FeatureSDWAOmod, FeatureSDWAScalar, FeatureSDWASdst,
977   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
978   FeatureAddNoCarryInsts, FeatureFmaMixInsts, FeatureGFX8Insts,
979   FeatureNoSdstCMPX, FeatureVscnt,
980   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
981   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
982   FeatureA16, FeatureSMemTimeInst, FeatureFastDenormalF32, FeatureG16,
983   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess, FeatureImageInsts
984  ]
985>;
986
987def FeatureGFX11 : GCNSubtargetFeatureGeneration<"GFX11",
988  "gfx11",
989  [FeatureFP64, FeatureLocalMemorySize65536, FeatureMIMG_R128,
990   FeatureFlatAddressSpace, Feature16BitInsts,
991   FeatureInv2PiInlineImm, FeatureApertureRegs,
992   FeatureCIInsts, FeatureGFX8Insts, FeatureGFX9Insts, FeatureGFX10Insts,
993   FeatureGFX10_AEncoding, FeatureGFX10_BEncoding, FeatureGFX10_3Insts,
994   FeatureGFX11Insts, FeatureVOP3P, FeatureVOPD, FeatureTrue16BitInsts,
995   FeatureMovrel, FeatureFastFMAF32, FeatureDPP, FeatureIntClamp,
996   FeatureFlatInstOffsets, FeatureFlatGlobalInsts, FeatureFlatScratchInsts,
997   FeatureAddNoCarryInsts, FeatureFmaMixInsts,
998   FeatureNoSdstCMPX, FeatureVscnt,
999   FeatureVOP3Literal, FeatureDPP8, FeatureExtendedImageInsts,
1000   FeatureNoDataDepHazard, FeaturePkFmacF16Inst,
1001   FeatureA16, FeatureFastDenormalF32, FeatureG16,
1002   FeatureUnalignedBufferAccess, FeatureUnalignedDSAccess
1003  ]
1004>;
1005
1006//===----------------------------------------------------------------------===//
1007
1008class FeatureSet<list<SubtargetFeature> Features_> {
1009  list<SubtargetFeature> Features = Features_;
1010}
1011
1012def FeatureISAVersion6_0_0 : FeatureSet<[FeatureSouthernIslands,
1013   FeatureFastFMAF32,
1014   HalfRate64Ops,
1015   FeatureLDSBankCount32]>;
1016
1017def FeatureISAVersion6_0_1 : FeatureSet<
1018  [FeatureSouthernIslands,
1019   FeatureLDSBankCount32]>;
1020
1021def FeatureISAVersion6_0_2 : FeatureSet<
1022  [FeatureSouthernIslands,
1023   FeatureLDSBankCount32]>;
1024
1025def FeatureISAVersion7_0_0 : FeatureSet<
1026  [FeatureSeaIslands,
1027   FeatureLDSBankCount32]>;
1028
1029def FeatureISAVersion7_0_1 : FeatureSet<
1030  [FeatureSeaIslands,
1031   HalfRate64Ops,
1032   FeatureLDSBankCount32,
1033   FeatureFastFMAF32]>;
1034
1035def FeatureISAVersion7_0_2 : FeatureSet<
1036  [FeatureSeaIslands,
1037   FeatureLDSBankCount16,
1038   FeatureFastFMAF32]>;
1039
1040def FeatureISAVersion7_0_3 : FeatureSet<
1041  [FeatureSeaIslands,
1042   FeatureLDSBankCount16]>;
1043
1044def FeatureISAVersion7_0_4 : FeatureSet<
1045  [FeatureSeaIslands,
1046   FeatureLDSBankCount32]>;
1047
1048def FeatureISAVersion7_0_5 : FeatureSet<
1049  [FeatureSeaIslands,
1050   FeatureLDSBankCount16]>;
1051
1052def FeatureISAVersion8_0_Common : FeatureSet<
1053  [FeatureVolcanicIslands,
1054   FeatureLDSBankCount32,
1055   FeatureUnpackedD16VMem]>;
1056
1057def FeatureISAVersion8_0_1 : FeatureSet<
1058  !listconcat(FeatureISAVersion8_0_Common.Features,
1059    [FeatureFastFMAF32,
1060     HalfRate64Ops,
1061     FeatureSupportsXNACK])>;
1062
1063def FeatureISAVersion8_0_2 : FeatureSet<
1064  !listconcat(FeatureISAVersion8_0_Common.Features,
1065    [FeatureSGPRInitBug])>;
1066
1067def FeatureISAVersion8_0_3 : FeatureSet<
1068  !listconcat(FeatureISAVersion8_0_Common.Features,
1069    [])>;
1070
1071def FeatureISAVersion8_0_5 : FeatureSet<
1072  !listconcat(FeatureISAVersion8_0_Common.Features,
1073    [FeatureSGPRInitBug])>;
1074
1075def FeatureISAVersion8_1_0 : FeatureSet<
1076  [FeatureVolcanicIslands,
1077   FeatureLDSBankCount16,
1078   FeatureSupportsXNACK,
1079   FeatureImageStoreD16Bug,
1080   FeatureImageGather4D16Bug]>;
1081
1082def FeatureISAVersion9_0_Common : FeatureSet<
1083  [FeatureGFX9,
1084   FeatureLDSBankCount32,
1085   FeatureImageInsts,
1086   FeatureMadMacF32Insts]>;
1087
1088def FeatureISAVersion9_0_MI_Common : FeatureSet<
1089  !listconcat(FeatureISAVersion9_0_Common.Features,
1090    [FeatureFmaMixInsts,
1091     FeatureDLInsts,
1092     FeatureDot1Insts,
1093     FeatureDot2Insts,
1094     FeatureDot3Insts,
1095     FeatureDot4Insts,
1096     FeatureDot5Insts,
1097     FeatureDot6Insts,
1098     FeatureDot7Insts,
1099     FeatureDot10Insts,
1100     FeatureMAIInsts,
1101     FeaturePkFmacF16Inst,
1102     FeatureAtomicFaddNoRtnInsts,
1103     FeatureSupportsSRAMECC])>;
1104
1105def FeatureISAVersion9_0_0 : FeatureSet<
1106  !listconcat(FeatureISAVersion9_0_Common.Features,
1107    [FeatureMadMixInsts,
1108     FeatureDsSrc2Insts,
1109     FeatureExtendedImageInsts,
1110     FeatureImageGather4D16Bug])>;
1111
1112def FeatureISAVersion9_0_2 : FeatureSet<
1113  !listconcat(FeatureISAVersion9_0_Common.Features,
1114    [FeatureMadMixInsts,
1115     FeatureDsSrc2Insts,
1116     FeatureExtendedImageInsts,
1117     FeatureImageGather4D16Bug])>;
1118
1119def FeatureISAVersion9_0_4 : FeatureSet<
1120  !listconcat(FeatureISAVersion9_0_Common.Features,
1121    [FeatureDsSrc2Insts,
1122     FeatureExtendedImageInsts,
1123     FeatureFmaMixInsts,
1124     FeatureImageGather4D16Bug])>;
1125
1126def FeatureISAVersion9_0_6 : FeatureSet<
1127  !listconcat(FeatureISAVersion9_0_Common.Features,
1128    [HalfRate64Ops,
1129     FeatureFmaMixInsts,
1130     FeatureDsSrc2Insts,
1131     FeatureExtendedImageInsts,
1132     FeatureDLInsts,
1133     FeatureDot1Insts,
1134     FeatureDot2Insts,
1135     FeatureDot7Insts,
1136     FeatureDot10Insts,
1137     FeatureSupportsSRAMECC,
1138     FeatureImageGather4D16Bug])>;
1139
1140def FeatureISAVersion9_0_8 : FeatureSet<
1141  !listconcat(FeatureISAVersion9_0_MI_Common.Features,
1142    [HalfRate64Ops,
1143     FeatureDsSrc2Insts,
1144     FeatureExtendedImageInsts,
1145     FeatureAtomicBufferGlobalPkAddF16NoRtnInsts,
1146     FeatureMFMAInlineLiteralBug,
1147     FeatureImageGather4D16Bug])>;
1148
1149def FeatureISAVersion9_0_9 : FeatureSet<
1150  !listconcat(FeatureISAVersion9_0_Common.Features,
1151    [FeatureMadMixInsts,
1152     FeatureDsSrc2Insts,
1153     FeatureExtendedImageInsts,
1154     FeatureImageInsts,
1155     FeatureImageGather4D16Bug])>;
1156
1157def FeatureISAVersion9_0_A : FeatureSet<
1158  !listconcat(FeatureISAVersion9_0_MI_Common.Features,
1159    [FeatureGFX90AInsts,
1160     FeatureFmacF64Inst,
1161     Feature64BitDPP,
1162     FeaturePackedFP32Ops,
1163     FeatureAtomicFaddRtnInsts,
1164     FeatureAtomicBufferGlobalPkAddF16Insts,
1165     FeaturePackedTID,
1166     FullRate64Ops,
1167     FeatureBackOffBarrier])>;
1168
1169def FeatureISAVersion9_0_C : FeatureSet<
1170  !listconcat(FeatureISAVersion9_0_Common.Features,
1171    [FeatureMadMixInsts,
1172     FeatureDsSrc2Insts,
1173     FeatureExtendedImageInsts,
1174     FeatureImageGather4D16Bug])>;
1175
1176def FeatureISAVersion9_4_Common : FeatureSet<
1177  [FeatureGFX9,
1178   FeatureGFX90AInsts,
1179   FeatureGFX940Insts,
1180   FeatureFmaMixInsts,
1181   FeatureLDSBankCount32,
1182   FeatureDLInsts,
1183   FeatureFmacF64Inst,
1184   FeatureDot1Insts,
1185   FeatureDot2Insts,
1186   FeatureDot3Insts,
1187   FeatureDot4Insts,
1188   FeatureDot5Insts,
1189   FeatureDot6Insts,
1190   FeatureDot7Insts,
1191   FeatureDot10Insts,
1192   FeatureAtomicDsPkAdd16Insts,
1193   FeatureAtomicFlatPkAdd16Insts,
1194   Feature64BitDPP,
1195   FeaturePackedFP32Ops,
1196   FeatureMAIInsts,
1197   FeatureFP8Insts,
1198   FeaturePkFmacF16Inst,
1199   FeatureAtomicFaddRtnInsts,
1200   FeatureAtomicFaddNoRtnInsts,
1201   FeatureAtomicBufferGlobalPkAddF16Insts,
1202   FeatureAtomicGlobalPkAddBF16Inst,
1203   FeatureFlatAtomicFaddF32Inst,
1204   FeatureSupportsSRAMECC,
1205   FeaturePackedTID,
1206   FeatureArchitectedFlatScratch,
1207   FullRate64Ops,
1208   FeatureBackOffBarrier]>;
1209
1210def FeatureISAVersion9_4_0 : FeatureSet<
1211  !listconcat(FeatureISAVersion9_4_Common.Features,
1212    [FeatureForceStoreSC0SC1])>;
1213
1214def FeatureISAVersion9_4_1 : FeatureSet<
1215  !listconcat(FeatureISAVersion9_4_Common.Features,
1216    [FeatureForceStoreSC0SC1])>;
1217
1218def FeatureISAVersion9_4_2 : FeatureSet<
1219  !listconcat(FeatureISAVersion9_4_Common.Features,
1220    [])>;
1221
1222def FeatureISAVersion10_Common : FeatureSet<
1223  [FeatureGFX10,
1224   FeatureLDSBankCount32,
1225   FeatureDLInsts,
1226   FeatureNSAEncoding,
1227   FeatureWavefrontSize32,
1228   FeatureBackOffBarrier]>;
1229
1230def FeatureISAVersion10_1_Common : FeatureSet<
1231  !listconcat(FeatureISAVersion10_Common.Features,
1232    [FeatureScalarStores,
1233     FeatureScalarAtomics,
1234     FeatureScalarFlatScratchInsts,
1235     FeatureGetWaveIdInst,
1236     FeatureMadMacF32Insts,
1237     FeatureDsSrc2Insts,
1238     FeatureLdsMisalignedBug,
1239     FeatureSupportsXNACK,
1240     // gfx101x bugs
1241     FeatureVcmpxPermlaneHazard,
1242     FeatureVMEMtoScalarWriteHazard,
1243     FeatureSMEMtoVectorWriteHazard,
1244     FeatureInstFwdPrefetchBug,
1245     FeatureVcmpxExecWARHazard,
1246     FeatureLdsBranchVmemWARHazard,
1247     FeatureNSAtoVMEMBug,
1248     FeatureNSAClauseBug,
1249     FeatureOffset3fBug,
1250     FeatureFlatSegmentOffsetBug,
1251     FeatureNegativeUnalignedScratchOffsetBug])>;
1252
1253def FeatureISAVersion10_1_0 : FeatureSet<
1254  !listconcat(FeatureISAVersion10_1_Common.Features,
1255    [])>;
1256
1257def FeatureISAVersion10_1_1 : FeatureSet<
1258  !listconcat(FeatureISAVersion10_1_Common.Features,
1259    [FeatureDot1Insts,
1260     FeatureDot2Insts,
1261     FeatureDot5Insts,
1262     FeatureDot6Insts,
1263     FeatureDot7Insts,
1264     FeatureDot10Insts])>;
1265
1266def FeatureISAVersion10_1_2 : FeatureSet<
1267  !listconcat(FeatureISAVersion10_1_Common.Features,
1268    [FeatureDot1Insts,
1269     FeatureDot2Insts,
1270     FeatureDot5Insts,
1271     FeatureDot6Insts,
1272     FeatureDot7Insts,
1273     FeatureDot10Insts])>;
1274
1275def FeatureISAVersion10_1_3 : FeatureSet<
1276  !listconcat(FeatureISAVersion10_1_Common.Features,
1277    [FeatureGFX10_AEncoding])>;
1278
1279def FeatureISAVersion10_3_0 : FeatureSet<
1280  !listconcat(FeatureISAVersion10_Common.Features,
1281    [FeatureGFX10_AEncoding,
1282     FeatureGFX10_BEncoding,
1283     FeatureGFX10_3Insts,
1284     FeatureDot1Insts,
1285     FeatureDot2Insts,
1286     FeatureDot5Insts,
1287     FeatureDot6Insts,
1288     FeatureDot7Insts,
1289     FeatureDot10Insts,
1290     FeatureShaderCyclesRegister])>;
1291
1292def FeatureISAVersion11_Common : FeatureSet<
1293  [FeatureGFX11,
1294   FeatureLDSBankCount32,
1295   FeatureDLInsts,
1296   FeatureDot5Insts,
1297   FeatureDot7Insts,
1298   FeatureDot8Insts,
1299   FeatureDot9Insts,
1300   FeatureDot10Insts,
1301   FeatureNSAEncoding,
1302   FeaturePartialNSAEncoding,
1303   FeatureWavefrontSize32,
1304   FeatureShaderCyclesRegister,
1305   FeatureArchitectedFlatScratch,
1306   FeatureAtomicFaddRtnInsts,
1307   FeatureAtomicFaddNoRtnInsts,
1308   FeatureFlatAtomicFaddF32Inst,
1309   FeatureImageInsts,
1310   FeaturePackedTID,
1311   FeatureVcmpxPermlaneHazard,
1312   FeatureMADIntraFwdBug]>;
1313
1314def FeatureISAVersion11_0_Common : FeatureSet<
1315  !listconcat(FeatureISAVersion11_Common.Features,
1316    [FeatureVALUTransUseHazard])>;
1317
1318def FeatureISAVersion11_0_0 : FeatureSet<
1319  !listconcat(FeatureISAVersion11_0_Common.Features,
1320    [FeatureGFX11FullVGPRs,
1321     FeatureUserSGPRInit16Bug])>;
1322
1323def FeatureISAVersion11_0_1 : FeatureSet<
1324  !listconcat(FeatureISAVersion11_0_Common.Features,
1325    [FeatureGFX11FullVGPRs])>;
1326
1327def FeatureISAVersion11_0_2 : FeatureSet<
1328  !listconcat(FeatureISAVersion11_0_Common.Features,
1329    [FeatureUserSGPRInit16Bug])>;
1330
1331def FeatureISAVersion11_0_3 : FeatureSet<
1332  !listconcat(FeatureISAVersion11_0_Common.Features,
1333    [])>;
1334
1335def FeatureISAVersion11_5_0 : FeatureSet<
1336  !listconcat(FeatureISAVersion11_Common.Features,
1337    [])>;
1338
1339def FeatureISAVersion11_5_1 : FeatureSet<
1340  !listconcat(FeatureISAVersion11_Common.Features,
1341    [FeatureGFX11FullVGPRs])>;
1342
1343//===----------------------------------------------------------------------===//
1344
1345def AMDGPUInstrInfo : InstrInfo {
1346  let guessInstructionProperties = 1;
1347}
1348
1349def AMDGPUAsmParser : AsmParser {
1350  // Some of the R600 registers have the same name, so this crashes.
1351  // For example T0_XYZW and T0_XY both have the asm name T0.
1352  let ShouldEmitMatchRegisterName = 0;
1353
1354  // Call the custom operand parser for all operands.
1355  let OperandParserMethod = "parseCustomOperand";
1356  let CallCustomParserForAllOperands = true;
1357}
1358
1359def AMDGPUAsmWriter : AsmWriter {
1360  int PassSubtarget = 1;
1361}
1362
1363def AMDGPUAsmVariants {
1364  string Default = "Default";
1365  int Default_ID = 0;
1366  string VOP3 = "VOP3";
1367  int VOP3_ID = 1;
1368  string SDWA = "SDWA";
1369  int SDWA_ID = 2;
1370  string SDWA9 = "SDWA9";
1371  int SDWA9_ID = 3;
1372  string DPP = "DPP";
1373  int DPP_ID = 4;
1374  string VOP3_DPP = "VOP3_DPP";
1375  int VOP3_DPP_ID = 5;
1376  string Disable = "Disable";
1377  int Disable_ID = 6;
1378}
1379
1380def DefaultAMDGPUAsmParserVariant : AsmParserVariant {
1381  let Variant = AMDGPUAsmVariants.Default_ID;
1382  let Name = AMDGPUAsmVariants.Default;
1383}
1384
1385def VOP3AsmParserVariant : AsmParserVariant {
1386  let Variant = AMDGPUAsmVariants.VOP3_ID;
1387  let Name = AMDGPUAsmVariants.VOP3;
1388}
1389
1390def SDWAAsmParserVariant : AsmParserVariant {
1391  let Variant = AMDGPUAsmVariants.SDWA_ID;
1392  let Name = AMDGPUAsmVariants.SDWA;
1393}
1394
1395def SDWA9AsmParserVariant : AsmParserVariant {
1396  let Variant = AMDGPUAsmVariants.SDWA9_ID;
1397  let Name = AMDGPUAsmVariants.SDWA9;
1398}
1399
1400def DPPAsmParserVariant : AsmParserVariant {
1401  let Variant = AMDGPUAsmVariants.DPP_ID;
1402  let Name = AMDGPUAsmVariants.DPP;
1403}
1404
1405def VOP3_DPPAsmParserVariant : AsmParserVariant {
1406  let Variant = AMDGPUAsmVariants.VOP3_DPP_ID;
1407  let Name = AMDGPUAsmVariants.VOP3_DPP;
1408}
1409
1410def AMDGPU : Target {
1411  // Pull in Instruction Info:
1412  let InstructionSet = AMDGPUInstrInfo;
1413  let AssemblyParsers = [AMDGPUAsmParser];
1414  let AssemblyParserVariants = [DefaultAMDGPUAsmParserVariant,
1415                                VOP3AsmParserVariant,
1416                                SDWAAsmParserVariant,
1417                                SDWA9AsmParserVariant,
1418                                DPPAsmParserVariant,
1419                                VOP3_DPPAsmParserVariant];
1420  let AssemblyWriters = [AMDGPUAsmWriter];
1421  let AllowRegisterRenaming = 1;
1422}
1423
1424// Dummy Instruction itineraries for pseudo instructions
1425def ALU_NULL : FuncUnit;
1426def NullALU : InstrItinClass;
1427
1428//===----------------------------------------------------------------------===//
1429// Predicate helper class
1430//===----------------------------------------------------------------------===//
1431
1432def isGFX6 :
1433  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS">,
1434  AssemblerPredicate<(all_of FeatureSouthernIslands)>;
1435
1436def isGFX6GFX7 :
1437  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1438            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1439  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX10Insts))>;
1440
1441def isGFX6GFX7GFX10 :
1442  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1443            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1444            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1445  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), (not FeatureGFX11Insts))>;
1446
1447def isGFX6GFX7GFX10Plus :
1448  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1449            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1450            "Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1451  AssemblerPredicate<(all_of (not FeatureGCN3Encoding))>;
1452
1453def isGFX7Only :
1454  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS">,
1455  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX10Insts))>;
1456
1457def isGFX7GFX10 :
1458  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1459            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1460  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts, (not FeatureGFX11Insts))>;
1461
1462def isGFX7GFX10GFX11 :
1463  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1464            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 ||"
1465            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1466  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureCIInsts)>;
1467
1468def isGFX7GFX8GFX9 :
1469  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1470            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1471            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1472  AssemblerPredicate<(all_of FeatureGFX7GFX8GFX9Insts)>;
1473
1474def isGFX6GFX7GFX8GFX9 :
1475  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1476            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1477            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1478            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1479  AssemblerPredicate<(all_of (not FeatureGFX10Insts))>;
1480
1481def isGFX6GFX7GFX8GFX9NotGFX90A :
1482  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1483            "(Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1484            " Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1485            " Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1486            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1487  AssemblerPredicate<(all_of (not FeatureGFX10Insts), (not FeatureGFX90AInsts))>;
1488
1489def isGFX6GFX7GFX8GFX9GFX10 :
1490  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SOUTHERN_ISLANDS ||"
1491            "Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1492            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1493            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1494            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1495  AssemblerPredicate<(all_of (not FeatureGFX11Insts))>;
1496
1497def isGFX7GFX8GFX9GFX10 :
1498  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::SEA_ISLANDS ||"
1499            "Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1500            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1501            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1502  AssemblerPredicate<(all_of FeatureCIInsts, (not FeatureGFX11Insts))>;
1503
1504def isGFX7Plus :
1505  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::SEA_ISLANDS">,
1506  AssemblerPredicate<(all_of FeatureCIInsts)>;
1507
1508def isGFX8Plus :
1509  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1510  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1511
1512def isGFX8Only : Predicate<"Subtarget->getGeneration() =="
1513                           "AMDGPUSubtarget::VOLCANIC_ISLANDS">,
1514  AssemblerPredicate <(all_of FeatureVolcanicIslands)>;
1515
1516def isGFX9Plus :
1517  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1518  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1519
1520def isNotGFX9Plus :
1521  Predicate<"Subtarget->getGeneration() < AMDGPUSubtarget::GFX9">;
1522
1523def isGFX9Only : Predicate <
1524  "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1525  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts)>;
1526
1527def isGCN3ExcludingGFX90A :
1528  Predicate<"Subtarget->isGCN3Encoding() && !Subtarget->hasGFX90AInsts()">,
1529  AssemblerPredicate<(all_of FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1530
1531def isGFX90APlus :
1532  Predicate<"Subtarget->hasGFX90AInsts()">,
1533  AssemblerPredicate<(all_of FeatureGFX90AInsts)>;
1534
1535def isNotGFX90APlus :
1536  Predicate<"!Subtarget->hasGFX90AInsts()">,
1537  AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
1538
1539def isGFX8GFX9NotGFX90A :
1540  Predicate<"!Subtarget->hasGFX90AInsts() &&"
1541            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1542            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1543  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX90AInsts))>;
1544
1545def isGFX90AOnly :
1546  Predicate<"Subtarget->hasGFX90AInsts() && !Subtarget->hasGFX940Insts()">,
1547  AssemblerPredicate<(all_of FeatureGFX90AInsts, (not FeatureGFX940Insts))>;
1548
1549def isGFX908orGFX90A :
1550  Predicate<"Subtarget->hasMAIInsts() && !Subtarget->hasGFX940Insts()">,
1551  AssemblerPredicate<(all_of FeatureMAIInsts, (not FeatureGFX940Insts))>;
1552
1553def isGFX940Plus :
1554  Predicate<"Subtarget->hasGFX940Insts()">,
1555  AssemblerPredicate<(all_of FeatureGFX940Insts)>;
1556
1557def isGFX8GFX9NotGFX940 :
1558  Predicate<"!Subtarget->hasGFX940Insts() &&"
1559            "(Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1560            " Subtarget->getGeneration() == AMDGPUSubtarget::GFX9)">,
1561  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding, (not FeatureGFX940Insts))>;
1562
1563def isGFX8GFX9 :
1564  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1565            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9">,
1566  AssemblerPredicate<(all_of FeatureGFX8Insts, FeatureGCN3Encoding)>;
1567
1568def isGFX10Only :
1569  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1570  AssemblerPredicate<(all_of FeatureGFX10Insts, (not FeatureGFX11Insts))>;
1571
1572def isGFX10Plus :
1573  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX10">,
1574  AssemblerPredicate<(all_of FeatureGFX10Insts)>;
1575
1576def isGFX10Before1030 :
1577  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX10 &&"
1578            "!Subtarget->hasGFX10_3Insts()">,
1579  AssemblerPredicate<(all_of FeatureGFX10Insts,(not FeatureGFX10_3Insts))>;
1580
1581def isGFX9GFX10 :
1582  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1583            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1584  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureGFX11Insts))>;
1585
1586def isGFX8GFX9GFX10 :
1587  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::VOLCANIC_ISLANDS ||"
1588            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX9 ||"
1589            "Subtarget->getGeneration() == AMDGPUSubtarget::GFX10">,
1590  AssemblerPredicate<(all_of FeatureGFX8Insts, (not FeatureGFX11Insts))>;
1591
1592def isGFX11Only :
1593  Predicate<"Subtarget->getGeneration() == AMDGPUSubtarget::GFX11">,
1594  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1595
1596def isGFX11Plus :
1597  Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX11">,
1598  AssemblerPredicate<(all_of FeatureGFX11Insts)>;
1599
1600def HasFlatAddressSpace : Predicate<"Subtarget->hasFlatAddressSpace()">,
1601  AssemblerPredicate<(all_of FeatureFlatAddressSpace)>;
1602
1603def HasFlatGlobalInsts : Predicate<"Subtarget->hasFlatGlobalInsts()">,
1604  AssemblerPredicate<(all_of FeatureFlatGlobalInsts)>;
1605def HasFlatScratchInsts : Predicate<"Subtarget->hasFlatScratchInsts()">,
1606  AssemblerPredicate<(all_of FeatureFlatScratchInsts)>;
1607def HasScalarFlatScratchInsts : Predicate<"Subtarget->hasScalarFlatScratchInsts()">,
1608  AssemblerPredicate<(all_of FeatureScalarFlatScratchInsts)>;
1609def HasD16LoadStore : Predicate<"Subtarget->hasD16LoadStore()">,
1610  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1611
1612def HasFlatScratchSTMode : Predicate<"Subtarget->hasFlatScratchSTMode()">,
1613  AssemblerPredicate<(any_of FeatureGFX10_3Insts, FeatureGFX940Insts)>;
1614def HasFlatScratchSVSMode : Predicate<"Subtarget->hasFlatScratchSVSMode()">,
1615  AssemblerPredicate<(any_of FeatureGFX940Insts, FeatureGFX11Insts)>;
1616
1617def HasGFX10_AEncoding : Predicate<"Subtarget->hasGFX10_AEncoding()">,
1618  AssemblerPredicate<(all_of FeatureGFX10_AEncoding)>;
1619
1620def HasGFX10_BEncoding : Predicate<"Subtarget->hasGFX10_BEncoding()">,
1621  AssemblerPredicate<(all_of FeatureGFX10_BEncoding)>;
1622
1623def HasUnpackedD16VMem : Predicate<"Subtarget->hasUnpackedD16VMem()">,
1624  AssemblerPredicate<(all_of FeatureUnpackedD16VMem)>;
1625def HasPackedD16VMem : Predicate<"!Subtarget->hasUnpackedD16VMem()">,
1626  AssemblerPredicate<(all_of (not FeatureUnpackedD16VMem))>;
1627
1628def D16PreservesUnusedBits :
1629  Predicate<"Subtarget->d16PreservesUnusedBits()">,
1630  AssemblerPredicate<(all_of FeatureGFX9Insts, (not FeatureSRAMECC))>;
1631
1632def LDSRequiresM0Init : Predicate<"Subtarget->ldsRequiresM0Init()">;
1633def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
1634
1635def HasDSAddTid : Predicate<"Subtarget->getGeneration() >= AMDGPUSubtarget::GFX9">,
1636  AssemblerPredicate<(all_of FeatureGFX9Insts)>;
1637
1638def HasLDSFPAtomicAdd : Predicate<"Subtarget->hasLDSFPAtomicAdd()">,
1639  AssemblerPredicate<(all_of FeatureGFX8Insts)>;
1640
1641def HasAddNoCarryInsts : Predicate<"Subtarget->hasAddNoCarry()">,
1642  AssemblerPredicate<(all_of FeatureAddNoCarryInsts)>;
1643
1644def NotHasAddNoCarryInsts : Predicate<"!Subtarget->hasAddNoCarry()">;
1645
1646def Has16BitInsts : Predicate<"Subtarget->has16BitInsts()">,
1647  AssemblerPredicate<(all_of Feature16BitInsts)>;
1648
1649def HasTrue16BitInsts : Predicate<"Subtarget->hasTrue16BitInsts()">,
1650  AssemblerPredicate<(all_of FeatureTrue16BitInsts)>;
1651def NotHasTrue16BitInsts : Predicate<"!Subtarget->hasTrue16BitInsts()">;
1652
1653def HasVOP3PInsts : Predicate<"Subtarget->hasVOP3PInsts()">,
1654  AssemblerPredicate<(all_of FeatureVOP3P)>;
1655
1656def NotHasMed3_16 : Predicate<"!Subtarget->hasMed3_16()">;
1657
1658def HasMinMaxDenormModes : Predicate<"Subtarget->supportsMinMaxDenormModes()">;
1659def NotHasMinMaxDenormModes : Predicate<"!Subtarget->supportsMinMaxDenormModes()">;
1660
1661def HasFminFmaxLegacy : Predicate<"Subtarget->hasFminFmaxLegacy()">;
1662
1663def HasSDWA : Predicate<"Subtarget->hasSDWA()">,
1664  AssemblerPredicate<(all_of FeatureSDWA, FeatureVolcanicIslands)>;
1665
1666def HasSDWA9 :
1667  Predicate<"Subtarget->hasSDWA()">,
1668  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureGFX9Insts,FeatureSDWA)>;
1669
1670def HasSDWA10 :
1671  Predicate<"Subtarget->hasSDWA()">,
1672  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureSDWA)>;
1673
1674def HasDPP : Predicate<"Subtarget->hasDPP()">,
1675  AssemblerPredicate<(all_of FeatureGCN3Encoding, FeatureDPP)>;
1676
1677def HasDPP8 : Predicate<"Subtarget->hasDPP8()">,
1678  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP8)>;
1679
1680def Has64BitDPP : Predicate<"Subtarget->has64BitDPP()">,
1681  AssemblerPredicate<(all_of Feature64BitDPP)>;
1682
1683def HasPackedFP32Ops : Predicate<"Subtarget->hasPackedFP32Ops()">,
1684  AssemblerPredicate<(all_of FeaturePackedFP32Ops)>;
1685
1686def HasFmaakFmamkF32Insts :
1687  Predicate<"Subtarget->hasFmaakFmamkF32Insts()">,
1688  AssemblerPredicate<(any_of FeatureGFX10Insts, FeatureGFX940Insts)>;
1689
1690def HasImageInsts : Predicate<"Subtarget->hasImageInsts()">,
1691  AssemblerPredicate<(all_of FeatureImageInsts)>;
1692
1693def HasExtendedImageInsts : Predicate<"Subtarget->hasExtendedImageInsts()">,
1694  AssemblerPredicate<(all_of FeatureExtendedImageInsts)>;
1695
1696def HasR128A16 : Predicate<"Subtarget->hasR128A16()">,
1697  AssemblerPredicate<(all_of FeatureR128A16)>;
1698
1699def HasA16 : Predicate<"Subtarget->hasA16()">,
1700  AssemblerPredicate<(all_of FeatureA16)>;
1701
1702def HasG16 : Predicate<"Subtarget->hasG16()">,
1703  AssemblerPredicate<(all_of FeatureG16)>;
1704
1705def HasDPP16 : Predicate<"Subtarget->hasDPP()">,
1706  AssemblerPredicate<(all_of (not FeatureGCN3Encoding), FeatureGFX10Insts, FeatureDPP)>;
1707
1708def HasIntClamp : Predicate<"Subtarget->hasIntClamp()">,
1709  AssemblerPredicate<(all_of FeatureIntClamp)>;
1710
1711def HasMadMixInsts : Predicate<"Subtarget->hasMadMixInsts()">,
1712  AssemblerPredicate<(all_of FeatureMadMixInsts)>;
1713
1714def HasScalarStores : Predicate<"Subtarget->hasScalarStores()">,
1715  AssemblerPredicate<(all_of FeatureScalarStores)>;
1716
1717def HasScalarAtomics : Predicate<"Subtarget->hasScalarAtomics()">,
1718  AssemblerPredicate<(all_of FeatureScalarAtomics)>;
1719
1720def HasNoSdstCMPX : Predicate<"Subtarget->hasNoSdstCMPX()">,
1721  AssemblerPredicate<(all_of FeatureNoSdstCMPX)>;
1722
1723def HasSdstCMPX : Predicate<"!Subtarget->hasNoSdstCMPX()">,
1724  AssemblerPredicate<(all_of (not FeatureNoSdstCMPX))>;
1725
1726def has16BankLDS : Predicate<"Subtarget->getLDSBankCount() == 16">;
1727def has32BankLDS : Predicate<"Subtarget->getLDSBankCount() == 32">;
1728def HasVGPRIndexMode : Predicate<"Subtarget->hasVGPRIndexMode()">,
1729                      AssemblerPredicate<(all_of FeatureVGPRIndexMode)>;
1730def HasMovrel : Predicate<"Subtarget->hasMovrel()">,
1731                AssemblerPredicate<(all_of FeatureMovrel)>;
1732
1733def HasFmaMixInsts : Predicate<"Subtarget->hasFmaMixInsts()">,
1734  AssemblerPredicate<(all_of FeatureFmaMixInsts)>;
1735
1736def HasDLInsts : Predicate<"Subtarget->hasDLInsts()">,
1737  AssemblerPredicate<(all_of FeatureDLInsts)>;
1738
1739def HasFmacF64Inst : Predicate<"Subtarget->hasFmacF64Inst()">,
1740  AssemblerPredicate<(all_of FeatureFmacF64Inst)>;
1741
1742def HasDot1Insts : Predicate<"Subtarget->hasDot1Insts()">,
1743  AssemblerPredicate<(all_of FeatureDot1Insts)>;
1744
1745def HasDot2Insts : Predicate<"Subtarget->hasDot2Insts()">,
1746  AssemblerPredicate<(all_of FeatureDot2Insts)>;
1747
1748def HasDot3Insts : Predicate<"Subtarget->hasDot3Insts()">,
1749  AssemblerPredicate<(all_of FeatureDot3Insts)>;
1750
1751def HasDot4Insts : Predicate<"Subtarget->hasDot4Insts()">,
1752  AssemblerPredicate<(all_of FeatureDot4Insts)>;
1753
1754def HasDot5Insts : Predicate<"Subtarget->hasDot5Insts()">,
1755  AssemblerPredicate<(all_of FeatureDot5Insts)>;
1756
1757def HasDot6Insts : Predicate<"Subtarget->hasDot6Insts()">,
1758  AssemblerPredicate<(all_of FeatureDot6Insts)>;
1759
1760def HasDot7Insts : Predicate<"Subtarget->hasDot7Insts()">,
1761  AssemblerPredicate<(all_of FeatureDot7Insts)>;
1762
1763def HasDot8Insts : Predicate<"Subtarget->hasDot8Insts()">,
1764  AssemblerPredicate<(all_of FeatureDot8Insts)>;
1765
1766def HasDot9Insts : Predicate<"Subtarget->hasDot9Insts()">,
1767  AssemblerPredicate<(all_of FeatureDot9Insts)>;
1768
1769def HasDot10Insts : Predicate<"Subtarget->hasDot10Insts()">,
1770  AssemblerPredicate<(all_of FeatureDot10Insts)>;
1771
1772def HasGetWaveIdInst : Predicate<"Subtarget->hasGetWaveIdInst()">,
1773  AssemblerPredicate<(all_of FeatureGetWaveIdInst)>;
1774
1775def HasMAIInsts : Predicate<"Subtarget->hasMAIInsts()">,
1776  AssemblerPredicate<(all_of FeatureMAIInsts)>;
1777
1778def HasSMemRealTime : Predicate<"Subtarget->hasSMemRealTime()">,
1779  AssemblerPredicate<(all_of FeatureSMemRealTime)>;
1780
1781def HasSMemTimeInst : Predicate<"Subtarget->hasSMemTimeInst()">,
1782  AssemblerPredicate<(all_of FeatureSMemTimeInst)>;
1783
1784def HasShaderCyclesRegister : Predicate<"Subtarget->hasShaderCyclesRegister()">,
1785  AssemblerPredicate<(all_of FeatureShaderCyclesRegister)>;
1786
1787def HasFP8Insts : Predicate<"Subtarget->hasFP8Insts()">,
1788  AssemblerPredicate<(all_of FeatureFP8Insts)>;
1789
1790def HasPkFmacF16Inst : Predicate<"Subtarget->hasPkFmacF16Inst()">,
1791  AssemblerPredicate<(all_of FeaturePkFmacF16Inst)>;
1792
1793def HasMadMacF32Insts : Predicate<"Subtarget->hasMadMacF32Insts()">,
1794  AssemblerPredicate<(all_of FeatureMadMacF32Insts)>;
1795
1796def HasFmaLegacy32 : Predicate<"Subtarget->hasGFX10_3Insts()">,
1797  AssemblerPredicate<(any_of FeatureGFX10_3Insts)>;
1798
1799def HasAtomicDsPkAdd16Insts : Predicate<"Subtarget->hasAtomicDsPkAdd16Insts()">,
1800  AssemblerPredicate<(any_of FeatureAtomicDsPkAdd16Insts)>;
1801
1802def HasAtomicFlatPkAdd16Insts : Predicate<"Subtarget->hasAtomicFlatPkAdd16Insts()">,
1803  AssemblerPredicate<(any_of FeatureAtomicFlatPkAdd16Insts)>;
1804
1805def HasAtomicFaddRtnInsts : Predicate<"Subtarget->hasAtomicFaddRtnInsts()">,
1806  AssemblerPredicate<(all_of FeatureAtomicFaddRtnInsts)>;
1807def HasAtomicFaddNoRtnInsts : Predicate<"Subtarget->hasAtomicFaddNoRtnInsts()">,
1808  AssemblerPredicate<(all_of FeatureAtomicFaddNoRtnInsts)>;
1809def HasAtomicBufferGlobalPkAddF16NoRtnInsts
1810  : Predicate<"Subtarget->hasAtomicBufferGlobalPkAddF16NoRtnInsts() || Subtarget->hasAtomicBufferGlobalPkAddF16Insts()">,
1811  AssemblerPredicate<(any_of FeatureAtomicBufferGlobalPkAddF16NoRtnInsts, FeatureAtomicBufferGlobalPkAddF16Insts)>;
1812def HasAtomicBufferGlobalPkAddF16Insts
1813  : Predicate<"Subtarget->hasAtomicBufferGlobalPkAddF16Insts()">,
1814  AssemblerPredicate<(all_of FeatureAtomicBufferGlobalPkAddF16Insts)>;
1815def HasAtomicGlobalPkAddBF16Inst
1816  : Predicate<"Subtarget->hasAtomicGlobalPkAddBF16Inst()">,
1817  AssemblerPredicate<(all_of FeatureAtomicGlobalPkAddBF16Inst)>;
1818def HasFlatAtomicFaddF32Inst
1819  : Predicate<"Subtarget->hasFlatAtomicFaddF32Inst()">,
1820  AssemblerPredicate<(all_of FeatureFlatAtomicFaddF32Inst)>;
1821
1822def HasDsSrc2Insts : Predicate<"!Subtarget->hasDsSrc2Insts()">,
1823  AssemblerPredicate<(all_of FeatureDsSrc2Insts)>;
1824
1825def EnableLateCFGStructurize : Predicate<
1826  "EnableLateStructurizeCFG">;
1827
1828def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
1829
1830def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
1831
1832def HasUnalignedAccessMode : Predicate<"Subtarget->hasUnalignedAccessMode()">,
1833  AssemblerPredicate<(all_of FeatureUnalignedAccessMode)>;
1834
1835def HasMADIntraFwdBug : Predicate<"Subtarget->hasMADIntraFwdBug()">;
1836
1837def HasNotMADIntraFwdBug : Predicate<"!Subtarget->hasMADIntraFwdBug()">;
1838
1839// Include AMDGPU TD files
1840include "SISchedule.td"
1841include "GCNProcessors.td"
1842include "AMDGPUInstrInfo.td"
1843include "SIRegisterInfo.td"
1844include "AMDGPURegisterBanks.td"
1845include "AMDGPUInstructions.td"
1846include "SIInstrInfo.td"
1847include "AMDGPUCallingConv.td"
1848include "AMDGPUSearchableTables.td"
1849