1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file provides AArch64 specific target descriptions. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 14 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H 15 16 #include "llvm/Support/DataTypes.h" 17 18 #include <memory> 19 20 namespace llvm { 21 class formatted_raw_ostream; 22 class MCAsmBackend; 23 class MCCodeEmitter; 24 class MCContext; 25 class MCInstrInfo; 26 class MCInstPrinter; 27 class MCRegisterInfo; 28 class MCObjectTargetWriter; 29 class MCStreamer; 30 class MCSubtargetInfo; 31 class MCTargetOptions; 32 class MCTargetStreamer; 33 class Target; 34 35 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII, 36 const MCRegisterInfo &MRI, 37 MCContext &Ctx); 38 MCAsmBackend *createAArch64leAsmBackend(const Target &T, 39 const MCSubtargetInfo &STI, 40 const MCRegisterInfo &MRI, 41 const MCTargetOptions &Options); 42 MCAsmBackend *createAArch64beAsmBackend(const Target &T, 43 const MCSubtargetInfo &STI, 44 const MCRegisterInfo &MRI, 45 const MCTargetOptions &Options); 46 47 std::unique_ptr<MCObjectTargetWriter> 48 createAArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32); 49 50 std::unique_ptr<MCObjectTargetWriter> 51 createAArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype, 52 bool IsILP32); 53 54 std::unique_ptr<MCObjectTargetWriter> createAArch64WinCOFFObjectWriter(); 55 56 MCTargetStreamer *createAArch64AsmTargetStreamer(MCStreamer &S, 57 formatted_raw_ostream &OS, 58 MCInstPrinter *InstPrint, 59 bool isVerboseAsm); 60 61 namespace AArch64_MC { 62 void initLLVMToCVRegMapping(MCRegisterInfo *MRI); 63 } 64 65 } // End llvm namespace 66 67 // Defines symbolic names for AArch64 registers. This defines a mapping from 68 // register name to register number. 69 // 70 #define GET_REGINFO_ENUM 71 #include "AArch64GenRegisterInfo.inc" 72 73 // Defines symbolic names for the AArch64 instructions. 74 // 75 #define GET_INSTRINFO_ENUM 76 #define GET_INSTRINFO_MC_HELPER_DECLS 77 #include "AArch64GenInstrInfo.inc" 78 79 #define GET_SUBTARGETINFO_ENUM 80 #include "AArch64GenSubtargetInfo.inc" 81 82 #endif 83