xref: /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229)
1 //===-- AArch64FixupKinds.h - AArch64 Specific Fixup Entries ----*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H
10 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64FIXUPKINDS_H
11 
12 #include "llvm/MC/MCFixup.h"
13 
14 namespace llvm {
15 namespace AArch64 {
16 
17 enum Fixups {
18   // A 21-bit pc-relative immediate inserted into an ADR instruction.
19   fixup_aarch64_pcrel_adr_imm21 = FirstTargetFixupKind,
20 
21   // A 21-bit pc-relative immediate inserted into an ADRP instruction.
22   fixup_aarch64_pcrel_adrp_imm21,
23 
24   // 12-bit fixup for add/sub instructions. No alignment adjustment. All value
25   // bits are encoded.
26   fixup_aarch64_add_imm12,
27 
28   // unsigned 12-bit fixups for load and store instructions.
29   fixup_aarch64_ldst_imm12_scale1,
30   fixup_aarch64_ldst_imm12_scale2,
31   fixup_aarch64_ldst_imm12_scale4,
32   fixup_aarch64_ldst_imm12_scale8,
33   fixup_aarch64_ldst_imm12_scale16,
34 
35   // The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
36   // fixup_aarch64_pcrel_adrhi, except this is used by pc-relative loads and
37   // generates relocations directly when necessary.
38   fixup_aarch64_ldr_pcrel_imm19,
39 
40   // FIXME: comment
41   fixup_aarch64_movw,
42 
43   // The high 14 bits of a 21-bit pc-relative immediate.
44   fixup_aarch64_pcrel_branch14,
45 
46   // The high 19 bits of a 21-bit pc-relative immediate. Same encoding as
47   // fixup_aarch64_pcrel_adrhi, except this is use by b.cc and generates
48   // relocations directly when necessary.
49   fixup_aarch64_pcrel_branch19,
50 
51   // The high 26 bits of a 28-bit pc-relative immediate.
52   fixup_aarch64_pcrel_branch26,
53 
54   // The high 26 bits of a 28-bit pc-relative immediate. Distinguished from
55   // branch26 only on ELF.
56   fixup_aarch64_pcrel_call26,
57 
58   // zero-space placeholder for the ELF R_AARCH64_TLSDESC_CALL relocation.
59   fixup_aarch64_tlsdesc_call,
60 
61   // Marker
62   LastTargetFixupKind,
63   NumTargetFixupKinds = LastTargetFixupKind - FirstTargetFixupKind
64 };
65 
66 } // end namespace AArch64
67 } // end namespace llvm
68 
69 #endif
70