1 //===- AArch64CallLowering.h - Call lowering --------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 /// 9 /// \file 10 /// This file describes how to lower LLVM calls to machine code calls. 11 /// 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H 15 #define LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H 16 17 #include "llvm/ADT/ArrayRef.h" 18 #include "llvm/CodeGen/GlobalISel/CallLowering.h" 19 #include "llvm/IR/CallingConv.h" 20 #include <cstdint> 21 #include <functional> 22 23 namespace llvm { 24 25 class AArch64TargetLowering; 26 class CCValAssign; 27 class DataLayout; 28 class MachineIRBuilder; 29 class MachineRegisterInfo; 30 class Type; 31 32 class AArch64CallLowering: public CallLowering { 33 public: 34 AArch64CallLowering(const AArch64TargetLowering &TLI); 35 36 bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, 37 ArrayRef<Register> VRegs, 38 Register SwiftErrorVReg) const override; 39 40 bool fallBackToDAGISel(const Function &F) const override; 41 42 bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, 43 ArrayRef<ArrayRef<Register>> VRegs) const override; 44 45 bool lowerCall(MachineIRBuilder &MIRBuilder, 46 CallLoweringInfo &Info) const override; 47 48 /// Returns true if the call can be lowered as a tail call. 49 bool 50 isEligibleForTailCallOptimization(MachineIRBuilder &MIRBuilder, 51 CallLoweringInfo &Info, 52 SmallVectorImpl<ArgInfo> &InArgs, 53 SmallVectorImpl<ArgInfo> &OutArgs) const; 54 55 bool supportSwiftError() const override { return true; } 56 57 private: 58 using RegHandler = std::function<void(MachineIRBuilder &, Type *, unsigned, 59 CCValAssign &)>; 60 61 using MemHandler = 62 std::function<void(MachineIRBuilder &, int, CCValAssign &)>; 63 64 void splitToValueTypes(const ArgInfo &OrigArgInfo, 65 SmallVectorImpl<ArgInfo> &SplitArgs, 66 const DataLayout &DL, MachineRegisterInfo &MRI, 67 CallingConv::ID CallConv) const; 68 69 bool lowerTailCall(MachineIRBuilder &MIRBuilder, CallLoweringInfo &Info, 70 SmallVectorImpl<ArgInfo> &OutArgs) const; 71 72 bool 73 doCallerAndCalleePassArgsTheSameWay(CallLoweringInfo &Info, 74 MachineFunction &MF, 75 SmallVectorImpl<ArgInfo> &InArgs) const; 76 77 bool 78 areCalleeOutgoingArgsTailCallable(CallLoweringInfo &Info, MachineFunction &MF, 79 SmallVectorImpl<ArgInfo> &OutArgs) const; 80 }; 81 82 } // end namespace llvm 83 84 #endif // LLVM_LIB_TARGET_AARCH64_AARCH64CALLLOWERING_H 85