10b57cec5SDimitry Andric //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file declares the AArch64 specific subclass of TargetMachine. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H 140b57cec5SDimitry Andric #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric #include "AArch64InstrInfo.h" 170b57cec5SDimitry Andric #include "AArch64Subtarget.h" 180b57cec5SDimitry Andric #include "llvm/IR/DataLayout.h" 190b57cec5SDimitry Andric #include "llvm/Target/TargetMachine.h" 20bdd1243dSDimitry Andric #include <optional> 210b57cec5SDimitry Andric 220b57cec5SDimitry Andric namespace llvm { 230b57cec5SDimitry Andric 240b57cec5SDimitry Andric class AArch64TargetMachine : public LLVMTargetMachine { 250b57cec5SDimitry Andric protected: 260b57cec5SDimitry Andric std::unique_ptr<TargetLoweringObjectFile> TLOF; 270b57cec5SDimitry Andric mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap; 280b57cec5SDimitry Andric 290b57cec5SDimitry Andric public: 300b57cec5SDimitry Andric AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, 310b57cec5SDimitry Andric StringRef FS, const TargetOptions &Options, 32bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 335f757f3fSDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, 34bdd1243dSDimitry Andric bool JIT, bool IsLittleEndian); 350b57cec5SDimitry Andric 360b57cec5SDimitry Andric ~AArch64TargetMachine() override; 370b57cec5SDimitry Andric const AArch64Subtarget *getSubtargetImpl(const Function &F) const override; 380b57cec5SDimitry Andric // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget, 390b57cec5SDimitry Andric // subtargets are per-function entities based on the target-specific 400b57cec5SDimitry Andric // attributes of each function. 410b57cec5SDimitry Andric const AArch64Subtarget *getSubtargetImpl() const = delete; 420b57cec5SDimitry Andric 430b57cec5SDimitry Andric // Pass Pipeline Configuration 440b57cec5SDimitry Andric TargetPassConfig *createPassConfig(PassManagerBase &PM) override; 450b57cec5SDimitry Andric 46*0fca6ea1SDimitry Andric void registerPassBuilderCallbacks(PassBuilder &PB) override; 471db9f3b2SDimitry Andric 4881ad6265SDimitry Andric TargetTransformInfo getTargetTransformInfo(const Function &F) const override; 490b57cec5SDimitry Andric getObjFileLowering()500b57cec5SDimitry Andric TargetLoweringObjectFile* getObjFileLowering() const override { 510b57cec5SDimitry Andric return TLOF.get(); 520b57cec5SDimitry Andric } 530b57cec5SDimitry Andric 54bdd1243dSDimitry Andric MachineFunctionInfo * 55bdd1243dSDimitry Andric createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, 56bdd1243dSDimitry Andric const TargetSubtargetInfo *STI) const override; 57bdd1243dSDimitry Andric 585ffd83dbSDimitry Andric yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; 595ffd83dbSDimitry Andric yaml::MachineFunctionInfo * 605ffd83dbSDimitry Andric convertFuncInfoToYAML(const MachineFunction &MF) const override; 615ffd83dbSDimitry Andric bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, 625ffd83dbSDimitry Andric PerFunctionMIParsingState &PFS, 635ffd83dbSDimitry Andric SMDiagnostic &Error, 645ffd83dbSDimitry Andric SMRange &SourceRange) const override; 655ffd83dbSDimitry Andric 66e8d8bef9SDimitry Andric /// Returns true if a cast between SrcAS and DestAS is a noop. isNoopAddrSpaceCast(unsigned SrcAS,unsigned DestAS)67e8d8bef9SDimitry Andric bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { 68e8d8bef9SDimitry Andric // Addrspacecasts are always noops. 69e8d8bef9SDimitry Andric return true; 70e8d8bef9SDimitry Andric } 71e8d8bef9SDimitry Andric 720b57cec5SDimitry Andric private: 730b57cec5SDimitry Andric bool isLittle; 740b57cec5SDimitry Andric }; 750b57cec5SDimitry Andric 760b57cec5SDimitry Andric // AArch64 little endian target machine. 770b57cec5SDimitry Andric // 780b57cec5SDimitry Andric class AArch64leTargetMachine : public AArch64TargetMachine { 790b57cec5SDimitry Andric virtual void anchor(); 80bdd1243dSDimitry Andric 810b57cec5SDimitry Andric public: 820b57cec5SDimitry Andric AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 830b57cec5SDimitry Andric StringRef FS, const TargetOptions &Options, 84bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 855f757f3fSDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, 865f757f3fSDimitry Andric bool JIT); 870b57cec5SDimitry Andric }; 880b57cec5SDimitry Andric 890b57cec5SDimitry Andric // AArch64 big endian target machine. 900b57cec5SDimitry Andric // 910b57cec5SDimitry Andric class AArch64beTargetMachine : public AArch64TargetMachine { 920b57cec5SDimitry Andric virtual void anchor(); 93bdd1243dSDimitry Andric 940b57cec5SDimitry Andric public: 950b57cec5SDimitry Andric AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, 960b57cec5SDimitry Andric StringRef FS, const TargetOptions &Options, 97bdd1243dSDimitry Andric std::optional<Reloc::Model> RM, 985f757f3fSDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, 995f757f3fSDimitry Andric bool JIT); 1000b57cec5SDimitry Andric }; 1010b57cec5SDimitry Andric 1020b57cec5SDimitry Andric } // end namespace llvm 1030b57cec5SDimitry Andric 1040b57cec5SDimitry Andric #endif 105