1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // Part of the ELFObjectFile class implementation.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "llvm/Object/ELFObjectFile.h"
14 #include "llvm/BinaryFormat/ELF.h"
15 #include "llvm/MC/MCInstrAnalysis.h"
16 #include "llvm/MC/TargetRegistry.h"
17 #include "llvm/Object/ELF.h"
18 #include "llvm/Object/ELFTypes.h"
19 #include "llvm/Object/Error.h"
20 #include "llvm/Support/ARMAttributeParser.h"
21 #include "llvm/Support/ARMBuildAttributes.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/HexagonAttributeParser.h"
24 #include "llvm/Support/RISCVAttributeParser.h"
25 #include "llvm/Support/RISCVAttributes.h"
26 #include "llvm/TargetParser/RISCVISAInfo.h"
27 #include "llvm/TargetParser/SubtargetFeature.h"
28 #include "llvm/TargetParser/Triple.h"
29 #include <algorithm>
30 #include <cstddef>
31 #include <cstdint>
32 #include <memory>
33 #include <optional>
34 #include <string>
35 #include <utility>
36
37 using namespace llvm;
38 using namespace object;
39
40 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = {
41 {"None", "NOTYPE", ELF::STT_NOTYPE},
42 {"Object", "OBJECT", ELF::STT_OBJECT},
43 {"Function", "FUNC", ELF::STT_FUNC},
44 {"Section", "SECTION", ELF::STT_SECTION},
45 {"File", "FILE", ELF::STT_FILE},
46 {"Common", "COMMON", ELF::STT_COMMON},
47 {"TLS", "TLS", ELF::STT_TLS},
48 {"Unknown", "<unknown>: 7", 7},
49 {"Unknown", "<unknown>: 8", 8},
50 {"Unknown", "<unknown>: 9", 9},
51 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC},
52 {"OS Specific", "<OS specific>: 11", 11},
53 {"OS Specific", "<OS specific>: 12", 12},
54 {"Proc Specific", "<processor specific>: 13", 13},
55 {"Proc Specific", "<processor specific>: 14", 14},
56 {"Proc Specific", "<processor specific>: 15", 15}
57 };
58
ELFObjectFileBase(unsigned int Type,MemoryBufferRef Source)59 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source)
60 : ObjectFile(Type, Source) {}
61
62 template <class ELFT>
63 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>>
createPtr(MemoryBufferRef Object,bool InitContent)64 createPtr(MemoryBufferRef Object, bool InitContent) {
65 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent);
66 if (Error E = Ret.takeError())
67 return std::move(E);
68 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret));
69 }
70
71 Expected<std::unique_ptr<ObjectFile>>
createELFObjectFile(MemoryBufferRef Obj,bool InitContent)72 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) {
73 std::pair<unsigned char, unsigned char> Ident =
74 getElfArchType(Obj.getBuffer());
75 std::size_t MaxAlignment =
76 1ULL << llvm::countr_zero(
77 reinterpret_cast<uintptr_t>(Obj.getBufferStart()));
78
79 if (MaxAlignment < 2)
80 return createError("Insufficient alignment");
81
82 if (Ident.first == ELF::ELFCLASS32) {
83 if (Ident.second == ELF::ELFDATA2LSB)
84 return createPtr<ELF32LE>(Obj, InitContent);
85 else if (Ident.second == ELF::ELFDATA2MSB)
86 return createPtr<ELF32BE>(Obj, InitContent);
87 else
88 return createError("Invalid ELF data");
89 } else if (Ident.first == ELF::ELFCLASS64) {
90 if (Ident.second == ELF::ELFDATA2LSB)
91 return createPtr<ELF64LE>(Obj, InitContent);
92 else if (Ident.second == ELF::ELFDATA2MSB)
93 return createPtr<ELF64BE>(Obj, InitContent);
94 else
95 return createError("Invalid ELF data");
96 }
97 return createError("Invalid ELF class");
98 }
99
getMIPSFeatures() const100 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const {
101 SubtargetFeatures Features;
102 unsigned PlatformFlags = getPlatformFlags();
103
104 switch (PlatformFlags & ELF::EF_MIPS_ARCH) {
105 case ELF::EF_MIPS_ARCH_1:
106 break;
107 case ELF::EF_MIPS_ARCH_2:
108 Features.AddFeature("mips2");
109 break;
110 case ELF::EF_MIPS_ARCH_3:
111 Features.AddFeature("mips3");
112 break;
113 case ELF::EF_MIPS_ARCH_4:
114 Features.AddFeature("mips4");
115 break;
116 case ELF::EF_MIPS_ARCH_5:
117 Features.AddFeature("mips5");
118 break;
119 case ELF::EF_MIPS_ARCH_32:
120 Features.AddFeature("mips32");
121 break;
122 case ELF::EF_MIPS_ARCH_64:
123 Features.AddFeature("mips64");
124 break;
125 case ELF::EF_MIPS_ARCH_32R2:
126 Features.AddFeature("mips32r2");
127 break;
128 case ELF::EF_MIPS_ARCH_64R2:
129 Features.AddFeature("mips64r2");
130 break;
131 case ELF::EF_MIPS_ARCH_32R6:
132 Features.AddFeature("mips32r6");
133 break;
134 case ELF::EF_MIPS_ARCH_64R6:
135 Features.AddFeature("mips64r6");
136 break;
137 default:
138 llvm_unreachable("Unknown EF_MIPS_ARCH value");
139 }
140
141 switch (PlatformFlags & ELF::EF_MIPS_MACH) {
142 case ELF::EF_MIPS_MACH_NONE:
143 // No feature associated with this value.
144 break;
145 case ELF::EF_MIPS_MACH_OCTEON:
146 Features.AddFeature("cnmips");
147 break;
148 default:
149 llvm_unreachable("Unknown EF_MIPS_ARCH value");
150 }
151
152 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16)
153 Features.AddFeature("mips16");
154 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS)
155 Features.AddFeature("micromips");
156
157 return Features;
158 }
159
getARMFeatures() const160 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const {
161 SubtargetFeatures Features;
162 ARMAttributeParser Attributes;
163 if (Error E = getBuildAttributes(Attributes)) {
164 consumeError(std::move(E));
165 return SubtargetFeatures();
166 }
167
168 // both ARMv7-M and R have to support thumb hardware div
169 bool isV7 = false;
170 std::optional<unsigned> Attr =
171 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
172 if (Attr)
173 isV7 = *Attr == ARMBuildAttrs::v7;
174
175 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
176 if (Attr) {
177 switch (*Attr) {
178 case ARMBuildAttrs::ApplicationProfile:
179 Features.AddFeature("aclass");
180 break;
181 case ARMBuildAttrs::RealTimeProfile:
182 Features.AddFeature("rclass");
183 if (isV7)
184 Features.AddFeature("hwdiv");
185 break;
186 case ARMBuildAttrs::MicroControllerProfile:
187 Features.AddFeature("mclass");
188 if (isV7)
189 Features.AddFeature("hwdiv");
190 break;
191 }
192 }
193
194 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use);
195 if (Attr) {
196 switch (*Attr) {
197 default:
198 break;
199 case ARMBuildAttrs::Not_Allowed:
200 Features.AddFeature("thumb", false);
201 Features.AddFeature("thumb2", false);
202 break;
203 case ARMBuildAttrs::AllowThumb32:
204 Features.AddFeature("thumb2");
205 break;
206 }
207 }
208
209 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch);
210 if (Attr) {
211 switch (*Attr) {
212 default:
213 break;
214 case ARMBuildAttrs::Not_Allowed:
215 Features.AddFeature("vfp2sp", false);
216 Features.AddFeature("vfp3d16sp", false);
217 Features.AddFeature("vfp4d16sp", false);
218 break;
219 case ARMBuildAttrs::AllowFPv2:
220 Features.AddFeature("vfp2");
221 break;
222 case ARMBuildAttrs::AllowFPv3A:
223 case ARMBuildAttrs::AllowFPv3B:
224 Features.AddFeature("vfp3");
225 break;
226 case ARMBuildAttrs::AllowFPv4A:
227 case ARMBuildAttrs::AllowFPv4B:
228 Features.AddFeature("vfp4");
229 break;
230 }
231 }
232
233 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch);
234 if (Attr) {
235 switch (*Attr) {
236 default:
237 break;
238 case ARMBuildAttrs::Not_Allowed:
239 Features.AddFeature("neon", false);
240 Features.AddFeature("fp16", false);
241 break;
242 case ARMBuildAttrs::AllowNeon:
243 Features.AddFeature("neon");
244 break;
245 case ARMBuildAttrs::AllowNeon2:
246 Features.AddFeature("neon");
247 Features.AddFeature("fp16");
248 break;
249 }
250 }
251
252 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch);
253 if (Attr) {
254 switch (*Attr) {
255 default:
256 break;
257 case ARMBuildAttrs::Not_Allowed:
258 Features.AddFeature("mve", false);
259 Features.AddFeature("mve.fp", false);
260 break;
261 case ARMBuildAttrs::AllowMVEInteger:
262 Features.AddFeature("mve.fp", false);
263 Features.AddFeature("mve");
264 break;
265 case ARMBuildAttrs::AllowMVEIntegerAndFloat:
266 Features.AddFeature("mve.fp");
267 break;
268 }
269 }
270
271 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use);
272 if (Attr) {
273 switch (*Attr) {
274 default:
275 break;
276 case ARMBuildAttrs::DisallowDIV:
277 Features.AddFeature("hwdiv", false);
278 Features.AddFeature("hwdiv-arm", false);
279 break;
280 case ARMBuildAttrs::AllowDIVExt:
281 Features.AddFeature("hwdiv");
282 Features.AddFeature("hwdiv-arm");
283 break;
284 }
285 }
286
287 return Features;
288 }
289
hexagonAttrToFeatureString(unsigned Attr)290 static std::optional<std::string> hexagonAttrToFeatureString(unsigned Attr) {
291 switch (Attr) {
292 case 5:
293 return "v5";
294 case 55:
295 return "v55";
296 case 60:
297 return "v60";
298 case 62:
299 return "v62";
300 case 65:
301 return "v65";
302 case 67:
303 return "v67";
304 case 68:
305 return "v68";
306 case 69:
307 return "v69";
308 case 71:
309 return "v71";
310 case 73:
311 return "v73";
312 case 75:
313 return "v75";
314 default:
315 return {};
316 }
317 }
318
getHexagonFeatures() const319 SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const {
320 SubtargetFeatures Features;
321 HexagonAttributeParser Parser;
322 if (Error E = getBuildAttributes(Parser)) {
323 // Return no attributes if none can be read.
324 // This behavior is important for backwards compatibility.
325 consumeError(std::move(E));
326 return Features;
327 }
328 std::optional<unsigned> Attr;
329
330 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH))) {
331 if (std::optional<std::string> FeatureString =
332 hexagonAttrToFeatureString(*Attr))
333 Features.AddFeature(*FeatureString);
334 }
335
336 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH))) {
337 std::optional<std::string> FeatureString =
338 hexagonAttrToFeatureString(*Attr);
339 // There is no corresponding hvx arch for v5 and v55.
340 if (FeatureString && *Attr >= 60)
341 Features.AddFeature("hvx" + *FeatureString);
342 }
343
344 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP)))
345 if (*Attr)
346 Features.AddFeature("hvx-ieee-fp");
347
348 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT)))
349 if (*Attr)
350 Features.AddFeature("hvx-qfloat");
351
352 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG)))
353 if (*Attr)
354 Features.AddFeature("zreg");
355
356 if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO)))
357 if (*Attr)
358 Features.AddFeature("audio");
359
360 if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC)))
361 if (*Attr)
362 Features.AddFeature("cabac");
363
364 return Features;
365 }
366
getRISCVFeatures() const367 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const {
368 SubtargetFeatures Features;
369 unsigned PlatformFlags = getPlatformFlags();
370
371 if (PlatformFlags & ELF::EF_RISCV_RVC) {
372 Features.AddFeature("zca");
373 }
374
375 RISCVAttributeParser Attributes;
376 if (Error E = getBuildAttributes(Attributes)) {
377 return std::move(E);
378 }
379
380 std::optional<StringRef> Attr =
381 Attributes.getAttributeString(RISCVAttrs::ARCH);
382 if (Attr) {
383 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr);
384 if (!ParseResult)
385 return ParseResult.takeError();
386 auto &ISAInfo = *ParseResult;
387
388 if (ISAInfo->getXLen() == 32)
389 Features.AddFeature("64bit", false);
390 else if (ISAInfo->getXLen() == 64)
391 Features.AddFeature("64bit");
392 else
393 llvm_unreachable("XLEN should be 32 or 64.");
394
395 Features.addFeaturesVector(ISAInfo->toFeatures());
396 }
397
398 return Features;
399 }
400
getLoongArchFeatures() const401 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const {
402 SubtargetFeatures Features;
403
404 switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) {
405 case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT:
406 break;
407 case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT:
408 Features.AddFeature("d");
409 // D implies F according to LoongArch ISA spec.
410 [[fallthrough]];
411 case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT:
412 Features.AddFeature("f");
413 break;
414 }
415
416 return Features;
417 }
418
getFeatures() const419 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const {
420 switch (getEMachine()) {
421 case ELF::EM_MIPS:
422 return getMIPSFeatures();
423 case ELF::EM_ARM:
424 return getARMFeatures();
425 case ELF::EM_RISCV:
426 return getRISCVFeatures();
427 case ELF::EM_LOONGARCH:
428 return getLoongArchFeatures();
429 case ELF::EM_HEXAGON:
430 return getHexagonFeatures();
431 default:
432 return SubtargetFeatures();
433 }
434 }
435
tryGetCPUName() const436 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const {
437 switch (getEMachine()) {
438 case ELF::EM_AMDGPU:
439 return getAMDGPUCPUName();
440 case ELF::EM_CUDA:
441 return getNVPTXCPUName();
442 case ELF::EM_PPC:
443 case ELF::EM_PPC64:
444 return StringRef("future");
445 case ELF::EM_BPF:
446 return StringRef("v4");
447 default:
448 return std::nullopt;
449 }
450 }
451
getAMDGPUCPUName() const452 StringRef ELFObjectFileBase::getAMDGPUCPUName() const {
453 assert(getEMachine() == ELF::EM_AMDGPU);
454 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH;
455
456 switch (CPU) {
457 // Radeon HD 2000/3000 Series (R600).
458 case ELF::EF_AMDGPU_MACH_R600_R600:
459 return "r600";
460 case ELF::EF_AMDGPU_MACH_R600_R630:
461 return "r630";
462 case ELF::EF_AMDGPU_MACH_R600_RS880:
463 return "rs880";
464 case ELF::EF_AMDGPU_MACH_R600_RV670:
465 return "rv670";
466
467 // Radeon HD 4000 Series (R700).
468 case ELF::EF_AMDGPU_MACH_R600_RV710:
469 return "rv710";
470 case ELF::EF_AMDGPU_MACH_R600_RV730:
471 return "rv730";
472 case ELF::EF_AMDGPU_MACH_R600_RV770:
473 return "rv770";
474
475 // Radeon HD 5000 Series (Evergreen).
476 case ELF::EF_AMDGPU_MACH_R600_CEDAR:
477 return "cedar";
478 case ELF::EF_AMDGPU_MACH_R600_CYPRESS:
479 return "cypress";
480 case ELF::EF_AMDGPU_MACH_R600_JUNIPER:
481 return "juniper";
482 case ELF::EF_AMDGPU_MACH_R600_REDWOOD:
483 return "redwood";
484 case ELF::EF_AMDGPU_MACH_R600_SUMO:
485 return "sumo";
486
487 // Radeon HD 6000 Series (Northern Islands).
488 case ELF::EF_AMDGPU_MACH_R600_BARTS:
489 return "barts";
490 case ELF::EF_AMDGPU_MACH_R600_CAICOS:
491 return "caicos";
492 case ELF::EF_AMDGPU_MACH_R600_CAYMAN:
493 return "cayman";
494 case ELF::EF_AMDGPU_MACH_R600_TURKS:
495 return "turks";
496
497 // AMDGCN GFX6.
498 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600:
499 return "gfx600";
500 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601:
501 return "gfx601";
502 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602:
503 return "gfx602";
504
505 // AMDGCN GFX7.
506 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700:
507 return "gfx700";
508 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701:
509 return "gfx701";
510 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702:
511 return "gfx702";
512 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703:
513 return "gfx703";
514 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704:
515 return "gfx704";
516 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705:
517 return "gfx705";
518
519 // AMDGCN GFX8.
520 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801:
521 return "gfx801";
522 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802:
523 return "gfx802";
524 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803:
525 return "gfx803";
526 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805:
527 return "gfx805";
528 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810:
529 return "gfx810";
530
531 // AMDGCN GFX9.
532 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900:
533 return "gfx900";
534 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902:
535 return "gfx902";
536 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904:
537 return "gfx904";
538 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906:
539 return "gfx906";
540 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908:
541 return "gfx908";
542 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909:
543 return "gfx909";
544 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A:
545 return "gfx90a";
546 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C:
547 return "gfx90c";
548 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942:
549 return "gfx942";
550 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX950:
551 return "gfx950";
552
553 // AMDGCN GFX10.
554 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010:
555 return "gfx1010";
556 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011:
557 return "gfx1011";
558 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012:
559 return "gfx1012";
560 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013:
561 return "gfx1013";
562 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030:
563 return "gfx1030";
564 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031:
565 return "gfx1031";
566 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032:
567 return "gfx1032";
568 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033:
569 return "gfx1033";
570 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034:
571 return "gfx1034";
572 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035:
573 return "gfx1035";
574 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036:
575 return "gfx1036";
576
577 // AMDGCN GFX11.
578 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100:
579 return "gfx1100";
580 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101:
581 return "gfx1101";
582 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102:
583 return "gfx1102";
584 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103:
585 return "gfx1103";
586 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150:
587 return "gfx1150";
588 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151:
589 return "gfx1151";
590 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152:
591 return "gfx1152";
592 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153:
593 return "gfx1153";
594
595 // AMDGCN GFX12.
596 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200:
597 return "gfx1200";
598 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201:
599 return "gfx1201";
600 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1250:
601 return "gfx1250";
602
603 // Generic AMDGCN targets
604 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC:
605 return "gfx9-generic";
606 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC:
607 return "gfx9-4-generic";
608 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC:
609 return "gfx10-1-generic";
610 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC:
611 return "gfx10-3-generic";
612 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC:
613 return "gfx11-generic";
614 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC:
615 return "gfx12-generic";
616 default:
617 llvm_unreachable("Unknown EF_AMDGPU_MACH value");
618 }
619 }
620
getNVPTXCPUName() const621 StringRef ELFObjectFileBase::getNVPTXCPUName() const {
622 assert(getEMachine() == ELF::EM_CUDA);
623 unsigned SM = getEIdentABIVersion() == ELF::ELFABIVERSION_CUDA_V1
624 ? getPlatformFlags() & ELF::EF_CUDA_SM
625 : (getPlatformFlags() & ELF::EF_CUDA_SM_MASK) >>
626 ELF::EF_CUDA_SM_OFFSET;
627
628 switch (SM) {
629 // Fermi architecture.
630 case ELF::EF_CUDA_SM20:
631 return "sm_20";
632 case ELF::EF_CUDA_SM21:
633 return "sm_21";
634
635 // Kepler architecture.
636 case ELF::EF_CUDA_SM30:
637 return "sm_30";
638 case ELF::EF_CUDA_SM32:
639 return "sm_32";
640 case ELF::EF_CUDA_SM35:
641 return "sm_35";
642 case ELF::EF_CUDA_SM37:
643 return "sm_37";
644
645 // Maxwell architecture.
646 case ELF::EF_CUDA_SM50:
647 return "sm_50";
648 case ELF::EF_CUDA_SM52:
649 return "sm_52";
650 case ELF::EF_CUDA_SM53:
651 return "sm_53";
652
653 // Pascal architecture.
654 case ELF::EF_CUDA_SM60:
655 return "sm_60";
656 case ELF::EF_CUDA_SM61:
657 return "sm_61";
658 case ELF::EF_CUDA_SM62:
659 return "sm_62";
660
661 // Volta architecture.
662 case ELF::EF_CUDA_SM70:
663 return "sm_70";
664 case ELF::EF_CUDA_SM72:
665 return "sm_72";
666
667 // Turing architecture.
668 case ELF::EF_CUDA_SM75:
669 return "sm_75";
670
671 // Ampere architecture.
672 case ELF::EF_CUDA_SM80:
673 return "sm_80";
674 case ELF::EF_CUDA_SM86:
675 return "sm_86";
676 case ELF::EF_CUDA_SM87:
677 return "sm_87";
678 case ELF::EF_CUDA_SM88:
679 return "sm_88";
680
681 // Ada architecture.
682 case ELF::EF_CUDA_SM89:
683 return "sm_89";
684
685 // Hopper architecture.
686 case ELF::EF_CUDA_SM90:
687 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS_V1 ? "sm_90a"
688 : "sm_90";
689
690 // Blackwell architecture.
691 case ELF::EF_CUDA_SM100:
692 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_100a"
693 : "sm_100";
694 case ELF::EF_CUDA_SM101:
695 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_101a"
696 : "sm_101";
697 case ELF::EF_CUDA_SM103:
698 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_103a"
699 : "sm_103";
700 case ELF::EF_CUDA_SM110:
701 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_110a"
702 : "sm_110";
703
704 // Blackwell architecture.
705 case ELF::EF_CUDA_SM120:
706 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_120a"
707 : "sm_120";
708 case ELF::EF_CUDA_SM121:
709 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_121a"
710 : "sm_121";
711 default:
712 llvm_unreachable("Unknown EF_CUDA_SM value");
713 }
714 }
715
716 // FIXME Encode from a tablegen description or target parser.
setARMSubArch(Triple & TheTriple) const717 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const {
718 if (TheTriple.getSubArch() != Triple::NoSubArch)
719 return;
720
721 ARMAttributeParser Attributes;
722 if (Error E = getBuildAttributes(Attributes)) {
723 // TODO Propagate Error.
724 consumeError(std::move(E));
725 return;
726 }
727
728 std::string Triple;
729 // Default to ARM, but use the triple if it's been set.
730 if (TheTriple.isThumb())
731 Triple = "thumb";
732 else
733 Triple = "arm";
734
735 std::optional<unsigned> Attr =
736 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch);
737 if (Attr) {
738 switch (*Attr) {
739 case ARMBuildAttrs::v4:
740 Triple += "v4";
741 break;
742 case ARMBuildAttrs::v4T:
743 Triple += "v4t";
744 break;
745 case ARMBuildAttrs::v5T:
746 Triple += "v5t";
747 break;
748 case ARMBuildAttrs::v5TE:
749 Triple += "v5te";
750 break;
751 case ARMBuildAttrs::v5TEJ:
752 Triple += "v5tej";
753 break;
754 case ARMBuildAttrs::v6:
755 Triple += "v6";
756 break;
757 case ARMBuildAttrs::v6KZ:
758 Triple += "v6kz";
759 break;
760 case ARMBuildAttrs::v6T2:
761 Triple += "v6t2";
762 break;
763 case ARMBuildAttrs::v6K:
764 Triple += "v6k";
765 break;
766 case ARMBuildAttrs::v7: {
767 std::optional<unsigned> ArchProfileAttr =
768 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile);
769 if (ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile)
770 Triple += "v7m";
771 else
772 Triple += "v7";
773 break;
774 }
775 case ARMBuildAttrs::v6_M:
776 Triple += "v6m";
777 break;
778 case ARMBuildAttrs::v6S_M:
779 Triple += "v6sm";
780 break;
781 case ARMBuildAttrs::v7E_M:
782 Triple += "v7em";
783 break;
784 case ARMBuildAttrs::v8_A:
785 Triple += "v8a";
786 break;
787 case ARMBuildAttrs::v8_R:
788 Triple += "v8r";
789 break;
790 case ARMBuildAttrs::v8_M_Base:
791 Triple += "v8m.base";
792 break;
793 case ARMBuildAttrs::v8_M_Main:
794 Triple += "v8m.main";
795 break;
796 case ARMBuildAttrs::v8_1_M_Main:
797 Triple += "v8.1m.main";
798 break;
799 case ARMBuildAttrs::v9_A:
800 Triple += "v9a";
801 break;
802 }
803 }
804 if (!isLittleEndian())
805 Triple += "eb";
806
807 TheTriple.setArchName(Triple);
808 }
809
810 std::vector<ELFPltEntry>
getPltEntries(const MCSubtargetInfo & STI) const811 ELFObjectFileBase::getPltEntries(const MCSubtargetInfo &STI) const {
812 std::string Err;
813 const auto Triple = makeTriple();
814 const auto *T = TargetRegistry::lookupTarget(Triple, Err);
815 if (!T)
816 return {};
817 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0;
818 switch (Triple.getArch()) {
819 case Triple::x86:
820 JumpSlotReloc = ELF::R_386_JUMP_SLOT;
821 GlobDatReloc = ELF::R_386_GLOB_DAT;
822 break;
823 case Triple::x86_64:
824 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT;
825 GlobDatReloc = ELF::R_X86_64_GLOB_DAT;
826 break;
827 case Triple::aarch64:
828 case Triple::aarch64_be:
829 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT;
830 break;
831 case Triple::arm:
832 case Triple::armeb:
833 case Triple::thumb:
834 case Triple::thumbeb:
835 JumpSlotReloc = ELF::R_ARM_JUMP_SLOT;
836 break;
837 case Triple::hexagon:
838 JumpSlotReloc = ELF::R_HEX_JMP_SLOT;
839 GlobDatReloc = ELF::R_HEX_GLOB_DAT;
840 break;
841 default:
842 return {};
843 }
844 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo());
845 std::unique_ptr<const MCInstrAnalysis> MIA(
846 T->createMCInstrAnalysis(MII.get()));
847 if (!MIA)
848 return {};
849 std::vector<std::pair<uint64_t, uint64_t>> PltEntries;
850 std::optional<SectionRef> RelaPlt, RelaDyn;
851 uint64_t GotBaseVA = 0;
852 for (const SectionRef &Section : sections()) {
853 Expected<StringRef> NameOrErr = Section.getName();
854 if (!NameOrErr) {
855 consumeError(NameOrErr.takeError());
856 continue;
857 }
858 StringRef Name = *NameOrErr;
859
860 if (Name == ".rela.plt" || Name == ".rel.plt") {
861 RelaPlt = Section;
862 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") {
863 RelaDyn = Section;
864 } else if (Name == ".got.plt") {
865 GotBaseVA = Section.getAddress();
866 } else if (Name == ".plt" || Name == ".plt.got") {
867 Expected<StringRef> PltContents = Section.getContents();
868 if (!PltContents) {
869 consumeError(PltContents.takeError());
870 return {};
871 }
872 llvm::append_range(
873 PltEntries,
874 MIA->findPltEntries(Section.getAddress(),
875 arrayRefFromStringRef(*PltContents), STI));
876 }
877 }
878
879 // Build a map from GOT entry virtual address to PLT entry virtual address.
880 DenseMap<uint64_t, uint64_t> GotToPlt;
881 for (auto [Plt, GotPlt] : PltEntries) {
882 uint64_t GotPltEntry = GotPlt;
883 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add
884 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address.
885 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit.
886 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386)
887 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA;
888 GotToPlt.insert(std::make_pair(GotPltEntry, Plt));
889 }
890
891 // Find the relocations in the dynamic relocation table that point to
892 // locations in the GOT for which we know the corresponding PLT entry.
893 std::vector<ELFPltEntry> Result;
894 auto handleRels = [&](iterator_range<relocation_iterator> Rels,
895 uint32_t RelType, StringRef PltSec) {
896 for (const auto &R : Rels) {
897 if (R.getType() != RelType)
898 continue;
899 auto PltEntryIter = GotToPlt.find(R.getOffset());
900 if (PltEntryIter != GotToPlt.end()) {
901 symbol_iterator Sym = R.getSymbol();
902 if (Sym == symbol_end())
903 Result.push_back(
904 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second});
905 else
906 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(),
907 PltEntryIter->second});
908 }
909 }
910 };
911
912 if (RelaPlt)
913 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt");
914
915 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's
916 // x86 port places the PLT entry in the .plt.got section.
917 if (RelaDyn)
918 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got");
919
920 return Result;
921 }
922
923 template <class ELFT>
readBBAddrMapImpl(const ELFFile<ELFT> & EF,std::optional<unsigned> TextSectionIndex,std::vector<PGOAnalysisMap> * PGOAnalyses)924 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl(
925 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex,
926 std::vector<PGOAnalysisMap> *PGOAnalyses) {
927 using Elf_Shdr = typename ELFT::Shdr;
928 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL;
929 std::vector<BBAddrMap> BBAddrMaps;
930 if (PGOAnalyses)
931 PGOAnalyses->clear();
932
933 const auto &Sections = cantFail(EF.sections());
934 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> {
935 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP)
936 return false;
937 if (!TextSectionIndex)
938 return true;
939 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link);
940 if (!TextSecOrErr)
941 return createError("unable to get the linked-to section for " +
942 describe(EF, Sec) + ": " +
943 toString(TextSecOrErr.takeError()));
944 assert(*TextSecOrErr >= Sections.begin() &&
945 "Text section pointer outside of bounds");
946 if (*TextSectionIndex !=
947 (unsigned)std::distance(Sections.begin(), *TextSecOrErr))
948 return false;
949 return true;
950 };
951
952 Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr =
953 EF.getSectionAndRelocations(IsMatch);
954 if (!SectionRelocMapOrErr)
955 return SectionRelocMapOrErr.takeError();
956
957 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) {
958 if (IsRelocatable && !RelocSec)
959 return createError("unable to get relocation section for " +
960 describe(EF, *Sec));
961 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr =
962 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses);
963 if (!BBAddrMapOrErr) {
964 if (PGOAnalyses)
965 PGOAnalyses->clear();
966 return createError("unable to read " + describe(EF, *Sec) + ": " +
967 toString(BBAddrMapOrErr.takeError()));
968 }
969 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(),
970 std::back_inserter(BBAddrMaps));
971 }
972 if (PGOAnalyses)
973 assert(PGOAnalyses->size() == BBAddrMaps.size() &&
974 "The same number of BBAddrMaps and PGOAnalysisMaps should be "
975 "returned when PGO information is requested");
976 return BBAddrMaps;
977 }
978
979 template <class ELFT>
980 static Expected<std::vector<VersionEntry>>
readDynsymVersionsImpl(const ELFFile<ELFT> & EF,ELFObjectFileBase::elf_symbol_iterator_range Symbols)981 readDynsymVersionsImpl(const ELFFile<ELFT> &EF,
982 ELFObjectFileBase::elf_symbol_iterator_range Symbols) {
983 using Elf_Shdr = typename ELFT::Shdr;
984 const Elf_Shdr *VerSec = nullptr;
985 const Elf_Shdr *VerNeedSec = nullptr;
986 const Elf_Shdr *VerDefSec = nullptr;
987 // The user should ensure sections() can't fail here.
988 for (const Elf_Shdr &Sec : cantFail(EF.sections())) {
989 if (Sec.sh_type == ELF::SHT_GNU_versym)
990 VerSec = &Sec;
991 else if (Sec.sh_type == ELF::SHT_GNU_verdef)
992 VerDefSec = &Sec;
993 else if (Sec.sh_type == ELF::SHT_GNU_verneed)
994 VerNeedSec = &Sec;
995 }
996 if (!VerSec)
997 return std::vector<VersionEntry>();
998
999 Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr =
1000 EF.loadVersionMap(VerNeedSec, VerDefSec);
1001 if (!MapOrErr)
1002 return MapOrErr.takeError();
1003
1004 std::vector<VersionEntry> Ret;
1005 size_t I = 0;
1006 for (const ELFSymbolRef &Sym : Symbols) {
1007 ++I;
1008 Expected<const typename ELFT::Versym *> VerEntryOrErr =
1009 EF.template getEntry<typename ELFT::Versym>(*VerSec, I);
1010 if (!VerEntryOrErr)
1011 return createError("unable to read an entry with index " + Twine(I) +
1012 " from " + describe(EF, *VerSec) + ": " +
1013 toString(VerEntryOrErr.takeError()));
1014
1015 Expected<uint32_t> FlagsOrErr = Sym.getFlags();
1016 if (!FlagsOrErr)
1017 return createError("unable to read flags for symbol with index " +
1018 Twine(I) + ": " + toString(FlagsOrErr.takeError()));
1019
1020 bool IsDefault;
1021 Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex(
1022 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr,
1023 (*FlagsOrErr) & SymbolRef::SF_Undefined);
1024 if (!VerOrErr)
1025 return createError("unable to get a version for entry " + Twine(I) +
1026 " of " + describe(EF, *VerSec) + ": " +
1027 toString(VerOrErr.takeError()));
1028
1029 Ret.push_back({(*VerOrErr).str(), IsDefault});
1030 }
1031
1032 return Ret;
1033 }
1034
1035 Expected<std::vector<VersionEntry>>
readDynsymVersions() const1036 ELFObjectFileBase::readDynsymVersions() const {
1037 elf_symbol_iterator_range Symbols = getDynamicSymbolIterators();
1038 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
1039 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
1040 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
1041 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
1042 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
1043 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols);
1044 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
1045 Symbols);
1046 }
1047
readBBAddrMap(std::optional<unsigned> TextSectionIndex,std::vector<PGOAnalysisMap> * PGOAnalyses) const1048 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap(
1049 std::optional<unsigned> TextSectionIndex,
1050 std::vector<PGOAnalysisMap> *PGOAnalyses) const {
1051 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
1052 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
1053 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
1054 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
1055 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
1056 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses);
1057 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(),
1058 TextSectionIndex, PGOAnalyses);
1059 }
1060
getCrelDecodeProblem(SectionRef Sec) const1061 StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const {
1062 auto Data = Sec.getRawDataRefImpl();
1063 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this))
1064 return Obj->getCrelDecodeProblem(Data);
1065 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this))
1066 return Obj->getCrelDecodeProblem(Data);
1067 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this))
1068 return Obj->getCrelDecodeProblem(Data);
1069 return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data);
1070 }
1071