xref: /freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp (revision 480093f4440d54b30b3025afeac24b48f2ba7a2e)
10b57cec5SDimitry Andric //===----- JITTargetMachineBuilder.cpp - Build TargetMachines for JIT -----===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric 
90b57cec5SDimitry Andric #include "llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h"
100b57cec5SDimitry Andric 
118bcb0991SDimitry Andric #include "llvm/Support/Host.h"
120b57cec5SDimitry Andric #include "llvm/Support/TargetRegistry.h"
130b57cec5SDimitry Andric 
140b57cec5SDimitry Andric namespace llvm {
150b57cec5SDimitry Andric namespace orc {
160b57cec5SDimitry Andric 
170b57cec5SDimitry Andric JITTargetMachineBuilder::JITTargetMachineBuilder(Triple TT)
180b57cec5SDimitry Andric     : TT(std::move(TT)) {
190b57cec5SDimitry Andric   Options.EmulatedTLS = true;
200b57cec5SDimitry Andric   Options.ExplicitEmulatedTLS = true;
210b57cec5SDimitry Andric }
220b57cec5SDimitry Andric 
230b57cec5SDimitry Andric Expected<JITTargetMachineBuilder> JITTargetMachineBuilder::detectHost() {
240b57cec5SDimitry Andric   // FIXME: getProcessTriple is bogus. It returns the host LLVM was compiled on,
250b57cec5SDimitry Andric   //        rather than a valid triple for the current process.
268bcb0991SDimitry Andric   JITTargetMachineBuilder TMBuilder((Triple(sys::getProcessTriple())));
278bcb0991SDimitry Andric 
288bcb0991SDimitry Andric   // Retrieve host CPU name and sub-target features and add them to builder.
298bcb0991SDimitry Andric   // Relocation model, code model and codegen opt level are kept to default
308bcb0991SDimitry Andric   // values.
318bcb0991SDimitry Andric   llvm::StringMap<bool> FeatureMap;
328bcb0991SDimitry Andric   llvm::sys::getHostCPUFeatures(FeatureMap);
338bcb0991SDimitry Andric   for (auto &Feature : FeatureMap)
34*480093f4SDimitry Andric     TMBuilder.getFeatures().AddFeature(Feature.first(), Feature.second);
358bcb0991SDimitry Andric 
368bcb0991SDimitry Andric   TMBuilder.setCPU(llvm::sys::getHostCPUName());
378bcb0991SDimitry Andric 
388bcb0991SDimitry Andric   return TMBuilder;
390b57cec5SDimitry Andric }
400b57cec5SDimitry Andric 
410b57cec5SDimitry Andric Expected<std::unique_ptr<TargetMachine>>
420b57cec5SDimitry Andric JITTargetMachineBuilder::createTargetMachine() {
430b57cec5SDimitry Andric 
440b57cec5SDimitry Andric   std::string ErrMsg;
450b57cec5SDimitry Andric   auto *TheTarget = TargetRegistry::lookupTarget(TT.getTriple(), ErrMsg);
460b57cec5SDimitry Andric   if (!TheTarget)
470b57cec5SDimitry Andric     return make_error<StringError>(std::move(ErrMsg), inconvertibleErrorCode());
480b57cec5SDimitry Andric 
490b57cec5SDimitry Andric   auto *TM =
500b57cec5SDimitry Andric       TheTarget->createTargetMachine(TT.getTriple(), CPU, Features.getString(),
510b57cec5SDimitry Andric                                      Options, RM, CM, OptLevel, /*JIT*/ true);
520b57cec5SDimitry Andric   if (!TM)
530b57cec5SDimitry Andric     return make_error<StringError>("Could not allocate target machine",
540b57cec5SDimitry Andric                                    inconvertibleErrorCode());
550b57cec5SDimitry Andric 
560b57cec5SDimitry Andric   return std::unique_ptr<TargetMachine>(TM);
570b57cec5SDimitry Andric }
580b57cec5SDimitry Andric 
590b57cec5SDimitry Andric JITTargetMachineBuilder &JITTargetMachineBuilder::addFeatures(
600b57cec5SDimitry Andric     const std::vector<std::string> &FeatureVec) {
610b57cec5SDimitry Andric   for (const auto &F : FeatureVec)
620b57cec5SDimitry Andric     Features.AddFeature(F);
630b57cec5SDimitry Andric   return *this;
640b57cec5SDimitry Andric }
650b57cec5SDimitry Andric 
660b57cec5SDimitry Andric } // End namespace orc.
670b57cec5SDimitry Andric } // End namespace llvm.
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