1 //===-- DWARFExpression.cpp -----------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/DebugInfo/DWARF/DWARFExpression.h" 10 #include "llvm/ADT/SmallString.h" 11 #include "llvm/DebugInfo/DWARF/DWARFUnit.h" 12 #include "llvm/Support/Format.h" 13 #include <cassert> 14 #include <cstdint> 15 #include <vector> 16 17 using namespace llvm; 18 using namespace dwarf; 19 20 namespace llvm { 21 22 typedef DWARFExpression::Operation Op; 23 typedef Op::Description Desc; 24 25 static std::vector<Desc> getOpDescriptions() { 26 std::vector<Desc> Descriptions; 27 Descriptions.resize(0xff); 28 Descriptions[DW_OP_addr] = Desc(Op::Dwarf2, Op::SizeAddr); 29 Descriptions[DW_OP_deref] = Desc(Op::Dwarf2); 30 Descriptions[DW_OP_const1u] = Desc(Op::Dwarf2, Op::Size1); 31 Descriptions[DW_OP_const1s] = Desc(Op::Dwarf2, Op::SignedSize1); 32 Descriptions[DW_OP_const2u] = Desc(Op::Dwarf2, Op::Size2); 33 Descriptions[DW_OP_const2s] = Desc(Op::Dwarf2, Op::SignedSize2); 34 Descriptions[DW_OP_const4u] = Desc(Op::Dwarf2, Op::Size4); 35 Descriptions[DW_OP_const4s] = Desc(Op::Dwarf2, Op::SignedSize4); 36 Descriptions[DW_OP_const8u] = Desc(Op::Dwarf2, Op::Size8); 37 Descriptions[DW_OP_const8s] = Desc(Op::Dwarf2, Op::SignedSize8); 38 Descriptions[DW_OP_constu] = Desc(Op::Dwarf2, Op::SizeLEB); 39 Descriptions[DW_OP_consts] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 40 Descriptions[DW_OP_dup] = Desc(Op::Dwarf2); 41 Descriptions[DW_OP_drop] = Desc(Op::Dwarf2); 42 Descriptions[DW_OP_over] = Desc(Op::Dwarf2); 43 Descriptions[DW_OP_pick] = Desc(Op::Dwarf2, Op::Size1); 44 Descriptions[DW_OP_swap] = Desc(Op::Dwarf2); 45 Descriptions[DW_OP_rot] = Desc(Op::Dwarf2); 46 Descriptions[DW_OP_xderef] = Desc(Op::Dwarf2); 47 Descriptions[DW_OP_abs] = Desc(Op::Dwarf2); 48 Descriptions[DW_OP_and] = Desc(Op::Dwarf2); 49 Descriptions[DW_OP_div] = Desc(Op::Dwarf2); 50 Descriptions[DW_OP_minus] = Desc(Op::Dwarf2); 51 Descriptions[DW_OP_mod] = Desc(Op::Dwarf2); 52 Descriptions[DW_OP_mul] = Desc(Op::Dwarf2); 53 Descriptions[DW_OP_neg] = Desc(Op::Dwarf2); 54 Descriptions[DW_OP_not] = Desc(Op::Dwarf2); 55 Descriptions[DW_OP_or] = Desc(Op::Dwarf2); 56 Descriptions[DW_OP_plus] = Desc(Op::Dwarf2); 57 Descriptions[DW_OP_plus_uconst] = Desc(Op::Dwarf2, Op::SizeLEB); 58 Descriptions[DW_OP_shl] = Desc(Op::Dwarf2); 59 Descriptions[DW_OP_shr] = Desc(Op::Dwarf2); 60 Descriptions[DW_OP_shra] = Desc(Op::Dwarf2); 61 Descriptions[DW_OP_xor] = Desc(Op::Dwarf2); 62 Descriptions[DW_OP_skip] = Desc(Op::Dwarf2, Op::SignedSize2); 63 Descriptions[DW_OP_bra] = Desc(Op::Dwarf2, Op::SignedSize2); 64 Descriptions[DW_OP_eq] = Desc(Op::Dwarf2); 65 Descriptions[DW_OP_ge] = Desc(Op::Dwarf2); 66 Descriptions[DW_OP_gt] = Desc(Op::Dwarf2); 67 Descriptions[DW_OP_le] = Desc(Op::Dwarf2); 68 Descriptions[DW_OP_lt] = Desc(Op::Dwarf2); 69 Descriptions[DW_OP_ne] = Desc(Op::Dwarf2); 70 for (uint16_t LA = DW_OP_lit0; LA <= DW_OP_lit31; ++LA) 71 Descriptions[LA] = Desc(Op::Dwarf2); 72 for (uint16_t LA = DW_OP_reg0; LA <= DW_OP_reg31; ++LA) 73 Descriptions[LA] = Desc(Op::Dwarf2); 74 for (uint16_t LA = DW_OP_breg0; LA <= DW_OP_breg31; ++LA) 75 Descriptions[LA] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 76 Descriptions[DW_OP_regx] = Desc(Op::Dwarf2, Op::SizeLEB); 77 Descriptions[DW_OP_fbreg] = Desc(Op::Dwarf2, Op::SignedSizeLEB); 78 Descriptions[DW_OP_bregx] = Desc(Op::Dwarf2, Op::SizeLEB, Op::SignedSizeLEB); 79 Descriptions[DW_OP_piece] = Desc(Op::Dwarf2, Op::SizeLEB); 80 Descriptions[DW_OP_deref_size] = Desc(Op::Dwarf2, Op::Size1); 81 Descriptions[DW_OP_xderef_size] = Desc(Op::Dwarf2, Op::Size1); 82 Descriptions[DW_OP_nop] = Desc(Op::Dwarf2); 83 Descriptions[DW_OP_push_object_address] = Desc(Op::Dwarf3); 84 Descriptions[DW_OP_call2] = Desc(Op::Dwarf3, Op::Size2); 85 Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4); 86 Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr); 87 Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3); 88 Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3); 89 Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB); 90 Descriptions[DW_OP_implicit_value] = 91 Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock); 92 Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3); 93 Descriptions[DW_OP_WASM_location] = 94 Desc(Op::Dwarf4, Op::SizeLEB, Op::WasmLocationArg); 95 Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3); 96 Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB); 97 Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB); 98 Descriptions[DW_OP_GNU_entry_value] = Desc(Op::Dwarf4, Op::SizeLEB); 99 Descriptions[DW_OP_addrx] = Desc(Op::Dwarf5, Op::SizeLEB); 100 Descriptions[DW_OP_constx] = Desc(Op::Dwarf5, Op::SizeLEB); 101 Descriptions[DW_OP_convert] = Desc(Op::Dwarf5, Op::BaseTypeRef); 102 Descriptions[DW_OP_entry_value] = Desc(Op::Dwarf5, Op::SizeLEB); 103 Descriptions[DW_OP_regval_type] = 104 Desc(Op::Dwarf5, Op::SizeLEB, Op::BaseTypeRef); 105 // This Description acts as a marker that getSubOpDesc must be called 106 // to fetch the final Description for the operation. Each such final 107 // Description must share the same first SizeSubOpLEB operand. 108 Descriptions[DW_OP_LLVM_user] = Desc(Op::Dwarf5, Op::SizeSubOpLEB); 109 return Descriptions; 110 } 111 112 static Desc getDescImpl(ArrayRef<Desc> Descriptions, unsigned Opcode) { 113 // Handle possible corrupted or unsupported operation. 114 if (Opcode >= Descriptions.size()) 115 return {}; 116 return Descriptions[Opcode]; 117 } 118 119 static Desc getOpDesc(unsigned Opcode) { 120 static std::vector<Desc> Descriptions = getOpDescriptions(); 121 return getDescImpl(Descriptions, Opcode); 122 } 123 124 static std::vector<Desc> getSubOpDescriptions() { 125 static constexpr unsigned LlvmUserDescriptionsSize = 1 126 #define HANDLE_DW_OP_LLVM_USEROP(ID, NAME) +1 127 #include "llvm/BinaryFormat/Dwarf.def" 128 ; 129 std::vector<Desc> Descriptions; 130 Descriptions.resize(LlvmUserDescriptionsSize); 131 Descriptions[DW_OP_LLVM_nop] = Desc(Op::Dwarf5, Op::SizeSubOpLEB); 132 return Descriptions; 133 } 134 135 static Desc getSubOpDesc(unsigned Opcode, unsigned SubOpcode) { 136 assert(Opcode == DW_OP_LLVM_user); 137 static std::vector<Desc> Descriptions = getSubOpDescriptions(); 138 return getDescImpl(Descriptions, SubOpcode); 139 } 140 141 bool DWARFExpression::Operation::extract(DataExtractor Data, 142 uint8_t AddressSize, uint64_t Offset, 143 std::optional<DwarfFormat> Format) { 144 EndOffset = Offset; 145 Opcode = Data.getU8(&Offset); 146 147 Desc = getOpDesc(Opcode); 148 if (Desc.Version == Operation::DwarfNA) 149 return false; 150 151 Operands.resize(Desc.Op.size()); 152 OperandEndOffsets.resize(Desc.Op.size()); 153 for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) { 154 unsigned Size = Desc.Op[Operand]; 155 unsigned Signed = Size & Operation::SignBit; 156 157 switch (Size & ~Operation::SignBit) { 158 case Operation::SizeSubOpLEB: 159 assert(Operand == 0 && "SubOp operand must be the first operand"); 160 Operands[Operand] = Data.getULEB128(&Offset); 161 Desc = getSubOpDesc(Opcode, Operands[Operand]); 162 if (Desc.Version == Operation::DwarfNA) 163 return false; 164 assert(Desc.Op[Operand] == Operation::SizeSubOpLEB && 165 "SizeSubOpLEB Description must begin with SizeSubOpLEB operand"); 166 break; 167 case Operation::Size1: 168 Operands[Operand] = Data.getU8(&Offset); 169 if (Signed) 170 Operands[Operand] = (int8_t)Operands[Operand]; 171 break; 172 case Operation::Size2: 173 Operands[Operand] = Data.getU16(&Offset); 174 if (Signed) 175 Operands[Operand] = (int16_t)Operands[Operand]; 176 break; 177 case Operation::Size4: 178 Operands[Operand] = Data.getU32(&Offset); 179 if (Signed) 180 Operands[Operand] = (int32_t)Operands[Operand]; 181 break; 182 case Operation::Size8: 183 Operands[Operand] = Data.getU64(&Offset); 184 break; 185 case Operation::SizeAddr: 186 Operands[Operand] = Data.getUnsigned(&Offset, AddressSize); 187 break; 188 case Operation::SizeRefAddr: 189 if (!Format) 190 return false; 191 Operands[Operand] = 192 Data.getUnsigned(&Offset, dwarf::getDwarfOffsetByteSize(*Format)); 193 break; 194 case Operation::SizeLEB: 195 if (Signed) 196 Operands[Operand] = Data.getSLEB128(&Offset); 197 else 198 Operands[Operand] = Data.getULEB128(&Offset); 199 break; 200 case Operation::BaseTypeRef: 201 Operands[Operand] = Data.getULEB128(&Offset); 202 break; 203 case Operation::WasmLocationArg: 204 assert(Operand == 1); 205 switch (Operands[0]) { 206 case 0: 207 case 1: 208 case 2: 209 case 4: 210 Operands[Operand] = Data.getULEB128(&Offset); 211 break; 212 case 3: // global as uint32 213 Operands[Operand] = Data.getU32(&Offset); 214 break; 215 default: 216 return false; // Unknown Wasm location 217 } 218 break; 219 case Operation::SizeBlock: 220 // We need a size, so this cannot be the first operand 221 if (Operand == 0) 222 return false; 223 // Store the offset of the block as the value. 224 Operands[Operand] = Offset; 225 Offset += Operands[Operand - 1]; 226 break; 227 default: 228 llvm_unreachable("Unknown DWARFExpression Op size"); 229 } 230 231 OperandEndOffsets[Operand] = Offset; 232 } 233 234 EndOffset = Offset; 235 return true; 236 } 237 238 static void prettyPrintBaseTypeRef(DWARFUnit *U, raw_ostream &OS, 239 DIDumpOptions DumpOpts, 240 ArrayRef<uint64_t> Operands, 241 unsigned Operand) { 242 assert(Operand < Operands.size() && "operand out of bounds"); 243 auto Die = U->getDIEForOffset(U->getOffset() + Operands[Operand]); 244 if (Die && Die.getTag() == dwarf::DW_TAG_base_type) { 245 OS << " ("; 246 if (DumpOpts.Verbose) 247 OS << format("0x%08" PRIx64 " -> ", Operands[Operand]); 248 OS << format("0x%08" PRIx64 ")", U->getOffset() + Operands[Operand]); 249 if (auto Name = dwarf::toString(Die.find(dwarf::DW_AT_name))) 250 OS << " \"" << *Name << "\""; 251 } else { 252 OS << format(" <invalid base_type ref: 0x%" PRIx64 ">", 253 Operands[Operand]); 254 } 255 } 256 257 bool DWARFExpression::prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS, 258 DIDumpOptions DumpOpts, 259 uint8_t Opcode, 260 ArrayRef<uint64_t> Operands) { 261 if (!DumpOpts.GetNameForDWARFReg) 262 return false; 263 264 uint64_t DwarfRegNum; 265 unsigned OpNum = 0; 266 267 if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx || 268 Opcode == DW_OP_regval_type) 269 DwarfRegNum = Operands[OpNum++]; 270 else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx) 271 DwarfRegNum = Opcode - DW_OP_breg0; 272 else 273 DwarfRegNum = Opcode - DW_OP_reg0; 274 275 auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH); 276 if (!RegName.empty()) { 277 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || 278 Opcode == DW_OP_bregx) 279 OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]); 280 else 281 OS << ' ' << RegName.data(); 282 283 if (Opcode == DW_OP_regval_type) 284 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1); 285 return true; 286 } 287 288 return false; 289 } 290 291 std::optional<unsigned> DWARFExpression::Operation::getSubCode() const { 292 if (!Desc.Op.size() || Desc.Op[0] != Operation::SizeSubOpLEB) 293 return std::nullopt; 294 return Operands[0]; 295 } 296 297 bool DWARFExpression::Operation::print(raw_ostream &OS, DIDumpOptions DumpOpts, 298 const DWARFExpression *Expr, 299 DWARFUnit *U) const { 300 if (Error) { 301 OS << "<decoding error>"; 302 return false; 303 } 304 305 StringRef Name = OperationEncodingString(Opcode); 306 assert(!Name.empty() && "DW_OP has no name!"); 307 OS << Name; 308 309 if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) || 310 (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) || 311 Opcode == DW_OP_bregx || Opcode == DW_OP_regx || 312 Opcode == DW_OP_regval_type) 313 if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands)) 314 return true; 315 316 for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) { 317 unsigned Size = Desc.Op[Operand]; 318 unsigned Signed = Size & Operation::SignBit; 319 320 if (Size == Operation::SizeSubOpLEB) { 321 StringRef SubName = SubOperationEncodingString(Opcode, Operands[Operand]); 322 assert(!SubName.empty() && "DW_OP SubOp has no name!"); 323 OS << " " << SubName; 324 } else if (Size == Operation::BaseTypeRef && U) { 325 // For DW_OP_convert the operand may be 0 to indicate that conversion to 326 // the generic type should be done. The same holds for DW_OP_reinterpret, 327 // which is currently not supported. 328 if (Opcode == DW_OP_convert && Operands[Operand] == 0) 329 OS << " 0x0"; 330 else 331 prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand); 332 } else if (Size == Operation::WasmLocationArg) { 333 assert(Operand == 1); 334 switch (Operands[0]) { 335 case 0: 336 case 1: 337 case 2: 338 case 3: // global as uint32 339 case 4: 340 OS << format(" 0x%" PRIx64, Operands[Operand]); 341 break; 342 default: assert(false); 343 } 344 } else if (Size == Operation::SizeBlock) { 345 uint64_t Offset = Operands[Operand]; 346 for (unsigned i = 0; i < Operands[Operand - 1]; ++i) 347 OS << format(" 0x%02x", Expr->Data.getU8(&Offset)); 348 } else { 349 if (Signed) 350 OS << format(" %+" PRId64, (int64_t)Operands[Operand]); 351 else if (Opcode != DW_OP_entry_value && 352 Opcode != DW_OP_GNU_entry_value) 353 OS << format(" 0x%" PRIx64, Operands[Operand]); 354 } 355 } 356 return true; 357 } 358 359 void DWARFExpression::print(raw_ostream &OS, DIDumpOptions DumpOpts, 360 DWARFUnit *U, bool IsEH) const { 361 uint32_t EntryValExprSize = 0; 362 uint64_t EntryValStartOffset = 0; 363 if (Data.getData().empty()) 364 OS << "<empty>"; 365 366 for (auto &Op : *this) { 367 DumpOpts.IsEH = IsEH; 368 if (!Op.print(OS, DumpOpts, this, U)) { 369 uint64_t FailOffset = Op.getEndOffset(); 370 while (FailOffset < Data.getData().size()) 371 OS << format(" %02x", Data.getU8(&FailOffset)); 372 return; 373 } 374 375 if (Op.getCode() == DW_OP_entry_value || 376 Op.getCode() == DW_OP_GNU_entry_value) { 377 OS << "("; 378 EntryValExprSize = Op.getRawOperand(0); 379 EntryValStartOffset = Op.getEndOffset(); 380 continue; 381 } 382 383 if (EntryValExprSize) { 384 EntryValExprSize -= Op.getEndOffset() - EntryValStartOffset; 385 if (EntryValExprSize == 0) 386 OS << ")"; 387 } 388 389 if (Op.getEndOffset() < Data.getData().size()) 390 OS << ", "; 391 } 392 } 393 394 bool DWARFExpression::Operation::verify(const Operation &Op, DWARFUnit *U) { 395 for (unsigned Operand = 0; Operand < Op.Desc.Op.size(); ++Operand) { 396 unsigned Size = Op.Desc.Op[Operand]; 397 398 if (Size == Operation::BaseTypeRef) { 399 // For DW_OP_convert the operand may be 0 to indicate that conversion to 400 // the generic type should be done, so don't look up a base type in that 401 // case. The same holds for DW_OP_reinterpret, which is currently not 402 // supported. 403 if (Op.Opcode == DW_OP_convert && Op.Operands[Operand] == 0) 404 continue; 405 auto Die = U->getDIEForOffset(U->getOffset() + Op.Operands[Operand]); 406 if (!Die || Die.getTag() != dwarf::DW_TAG_base_type) 407 return false; 408 } 409 } 410 411 return true; 412 } 413 414 bool DWARFExpression::verify(DWARFUnit *U) { 415 for (auto &Op : *this) 416 if (!Operation::verify(Op, U)) 417 return false; 418 419 return true; 420 } 421 422 /// A user-facing string representation of a DWARF expression. This might be an 423 /// Address expression, in which case it will be implicitly dereferenced, or a 424 /// Value expression. 425 struct PrintedExpr { 426 enum ExprKind { 427 Address, 428 Value, 429 }; 430 ExprKind Kind; 431 SmallString<16> String; 432 433 PrintedExpr(ExprKind K = Address) : Kind(K) {} 434 }; 435 436 static bool printCompactDWARFExpr( 437 raw_ostream &OS, DWARFExpression::iterator I, 438 const DWARFExpression::iterator E, 439 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg = 440 nullptr) { 441 SmallVector<PrintedExpr, 4> Stack; 442 443 while (I != E) { 444 const DWARFExpression::Operation &Op = *I; 445 uint8_t Opcode = Op.getCode(); 446 switch (Opcode) { 447 case dwarf::DW_OP_regx: { 448 // DW_OP_regx: A register, with the register num given as an operand. 449 // Printed as the plain register name. 450 uint64_t DwarfRegNum = Op.getRawOperand(0); 451 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); 452 if (RegName.empty()) 453 return false; 454 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String); 455 S << RegName; 456 break; 457 } 458 case dwarf::DW_OP_bregx: { 459 int DwarfRegNum = Op.getRawOperand(0); 460 int64_t Offset = Op.getRawOperand(1); 461 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); 462 if (RegName.empty()) 463 return false; 464 raw_svector_ostream S(Stack.emplace_back().String); 465 S << RegName; 466 if (Offset) 467 S << format("%+" PRId64, Offset); 468 break; 469 } 470 case dwarf::DW_OP_entry_value: 471 case dwarf::DW_OP_GNU_entry_value: { 472 // DW_OP_entry_value contains a sub-expression which must be rendered 473 // separately. 474 uint64_t SubExprLength = Op.getRawOperand(0); 475 DWARFExpression::iterator SubExprEnd = I.skipBytes(SubExprLength); 476 ++I; 477 raw_svector_ostream S(Stack.emplace_back().String); 478 S << "entry("; 479 printCompactDWARFExpr(S, I, SubExprEnd, GetNameForDWARFReg); 480 S << ")"; 481 I = SubExprEnd; 482 continue; 483 } 484 case dwarf::DW_OP_stack_value: { 485 // The top stack entry should be treated as the actual value of tne 486 // variable, rather than the address of the variable in memory. 487 assert(!Stack.empty()); 488 Stack.back().Kind = PrintedExpr::Value; 489 break; 490 } 491 case dwarf::DW_OP_nop: { 492 break; 493 } 494 case dwarf::DW_OP_LLVM_user: { 495 assert(Op.getSubCode() && *Op.getSubCode() == dwarf::DW_OP_LLVM_nop); 496 break; 497 } 498 default: 499 if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) { 500 // DW_OP_reg<N>: A register, with the register num implied by the 501 // opcode. Printed as the plain register name. 502 uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0; 503 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); 504 if (RegName.empty()) 505 return false; 506 raw_svector_ostream S(Stack.emplace_back(PrintedExpr::Value).String); 507 S << RegName; 508 } else if (Opcode >= dwarf::DW_OP_breg0 && 509 Opcode <= dwarf::DW_OP_breg31) { 510 int DwarfRegNum = Opcode - dwarf::DW_OP_breg0; 511 int64_t Offset = Op.getRawOperand(0); 512 auto RegName = GetNameForDWARFReg(DwarfRegNum, false); 513 if (RegName.empty()) 514 return false; 515 raw_svector_ostream S(Stack.emplace_back().String); 516 S << RegName; 517 if (Offset) 518 S << format("%+" PRId64, Offset); 519 } else { 520 // If we hit an unknown operand, we don't know its effect on the stack, 521 // so bail out on the whole expression. 522 OS << "<unknown op " << dwarf::OperationEncodingString(Opcode) << " (" 523 << (int)Opcode << ")>"; 524 return false; 525 } 526 break; 527 } 528 ++I; 529 } 530 531 if (Stack.size() != 1) { 532 OS << "<stack of size " << Stack.size() << ", expected 1>"; 533 return false; 534 } 535 536 if (Stack.front().Kind == PrintedExpr::Address) 537 OS << "[" << Stack.front().String << "]"; 538 else 539 OS << Stack.front().String; 540 541 return true; 542 } 543 544 bool DWARFExpression::printCompact( 545 raw_ostream &OS, 546 std::function<StringRef(uint64_t RegNum, bool IsEH)> GetNameForDWARFReg) { 547 return printCompactDWARFExpr(OS, begin(), end(), GetNameForDWARFReg); 548 } 549 550 bool DWARFExpression::operator==(const DWARFExpression &RHS) const { 551 if (AddressSize != RHS.AddressSize || Format != RHS.Format) 552 return false; 553 return Data.getData() == RHS.Data.getData(); 554 } 555 556 } // namespace llvm 557