1 //===- SpillPlacement.h - Optimal Spill Code Placement ---------*- C++ -*--===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This analysis computes the optimal spill code placement between basic blocks. 10 // 11 // The runOnMachineFunction() method only precomputes some profiling information 12 // about the CFG. The real work is done by prepare(), addConstraints(), and 13 // finish() which are called by the register allocator. 14 // 15 // Given a variable that is live across multiple basic blocks, and given 16 // constraints on the basic blocks where the variable is live, determine which 17 // edge bundles should have the variable in a register and which edge bundles 18 // should have the variable in a stack slot. 19 // 20 // The returned bit vector can be used to place optimal spill code at basic 21 // block entries and exits. Spill code placement inside a basic block is not 22 // considered. 23 // 24 //===----------------------------------------------------------------------===// 25 26 #ifndef LLVM_LIB_CODEGEN_SPILLPLACEMENT_H 27 #define LLVM_LIB_CODEGEN_SPILLPLACEMENT_H 28 29 #include "llvm/ADT/ArrayRef.h" 30 #include "llvm/ADT/SmallVector.h" 31 #include "llvm/ADT/SparseSet.h" 32 #include "llvm/CodeGen/MachineFunctionPass.h" 33 #include "llvm/Support/BlockFrequency.h" 34 35 namespace llvm { 36 37 class BitVector; 38 class EdgeBundles; 39 class MachineBlockFrequencyInfo; 40 class MachineFunction; 41 class MachineLoopInfo; 42 43 class SpillPlacement : public MachineFunctionPass { 44 struct Node; 45 const MachineFunction *MF; 46 const EdgeBundles *bundles; 47 const MachineLoopInfo *loops; 48 const MachineBlockFrequencyInfo *MBFI; 49 Node *nodes = nullptr; 50 51 // Nodes that are active in the current computation. Owned by the prepare() 52 // caller. 53 BitVector *ActiveNodes; 54 55 // Nodes with active links. Populated by scanActiveBundles. 56 SmallVector<unsigned, 8> Linked; 57 58 // Nodes that went positive during the last call to scanActiveBundles or 59 // iterate. 60 SmallVector<unsigned, 8> RecentPositive; 61 62 // Block frequencies are computed once. Indexed by block number. 63 SmallVector<BlockFrequency, 8> BlockFrequencies; 64 65 /// Decision threshold. A node gets the output value 0 if the weighted sum of 66 /// its inputs falls in the open interval (-Threshold;Threshold). 67 BlockFrequency Threshold; 68 69 /// List of nodes that need to be updated in ::iterate. 70 SparseSet<unsigned> TodoList; 71 72 public: 73 static char ID; // Pass identification, replacement for typeid. 74 75 SpillPlacement() : MachineFunctionPass(ID) {} 76 ~SpillPlacement() override { releaseMemory(); } 77 78 /// BorderConstraint - A basic block has separate constraints for entry and 79 /// exit. 80 enum BorderConstraint { 81 DontCare, ///< Block doesn't care / variable not live. 82 PrefReg, ///< Block entry/exit prefers a register. 83 PrefSpill, ///< Block entry/exit prefers a stack slot. 84 PrefBoth, ///< Block entry prefers both register and stack. 85 MustSpill ///< A register is impossible, variable must be spilled. 86 }; 87 88 /// BlockConstraint - Entry and exit constraints for a basic block. 89 struct BlockConstraint { 90 unsigned Number; ///< Basic block number (from MBB::getNumber()). 91 BorderConstraint Entry : 8; ///< Constraint on block entry. 92 BorderConstraint Exit : 8; ///< Constraint on block exit. 93 94 /// True when this block changes the value of the live range. This means 95 /// the block has a non-PHI def. When this is false, a live-in value on 96 /// the stack can be live-out on the stack without inserting a spill. 97 bool ChangesValue; 98 99 void print(raw_ostream &OS) const; 100 void dump() const; 101 }; 102 103 /// prepare - Reset state and prepare for a new spill placement computation. 104 /// @param RegBundles Bit vector to receive the edge bundles where the 105 /// variable should be kept in a register. Each bit 106 /// corresponds to an edge bundle, a set bit means the 107 /// variable should be kept in a register through the 108 /// bundle. A clear bit means the variable should be 109 /// spilled. This vector is retained. 110 void prepare(BitVector &RegBundles); 111 112 /// addConstraints - Add constraints and biases. This method may be called 113 /// more than once to accumulate constraints. 114 /// @param LiveBlocks Constraints for blocks that have the variable live in or 115 /// live out. 116 void addConstraints(ArrayRef<BlockConstraint> LiveBlocks); 117 118 /// addPrefSpill - Add PrefSpill constraints to all blocks listed. This is 119 /// equivalent to calling addConstraint with identical BlockConstraints with 120 /// Entry = Exit = PrefSpill, and ChangesValue = false. 121 /// 122 /// @param Blocks Array of block numbers that prefer to spill in and out. 123 /// @param Strong When true, double the negative bias for these blocks. 124 void addPrefSpill(ArrayRef<unsigned> Blocks, bool Strong); 125 126 /// addLinks - Add transparent blocks with the given numbers. 127 void addLinks(ArrayRef<unsigned> Links); 128 129 /// scanActiveBundles - Perform an initial scan of all bundles activated by 130 /// addConstraints and addLinks, updating their state. Add all the bundles 131 /// that now prefer a register to RecentPositive. 132 /// Prepare internal data structures for iterate. 133 /// Return true is there are any positive nodes. 134 bool scanActiveBundles(); 135 136 /// iterate - Update the network iteratively until convergence, or new bundles 137 /// are found. 138 void iterate(); 139 140 /// getRecentPositive - Return an array of bundles that became positive during 141 /// the previous call to scanActiveBundles or iterate. 142 ArrayRef<unsigned> getRecentPositive() { return RecentPositive; } 143 144 /// finish - Compute the optimal spill code placement given the 145 /// constraints. No MustSpill constraints will be violated, and the smallest 146 /// possible number of PrefX constraints will be violated, weighted by 147 /// expected execution frequencies. 148 /// The selected bundles are returned in the bitvector passed to prepare(). 149 /// @return True if a perfect solution was found, allowing the variable to be 150 /// in a register through all relevant bundles. 151 bool finish(); 152 153 /// getBlockFrequency - Return the estimated block execution frequency per 154 /// function invocation. 155 BlockFrequency getBlockFrequency(unsigned Number) const { 156 return BlockFrequencies[Number]; 157 } 158 159 private: 160 bool runOnMachineFunction(MachineFunction &mf) override; 161 void getAnalysisUsage(AnalysisUsage &AU) const override; 162 void releaseMemory() override; 163 164 void activate(unsigned n); 165 void setThreshold(const BlockFrequency &Entry); 166 167 bool update(unsigned n); 168 }; 169 170 } // end namespace llvm 171 172 #endif // LLVM_LIB_CODEGEN_SPILLPLACEMENT_H 173