1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/ADT/APFloat.h" 14 #include "llvm/ADT/APInt.h" 15 #include "llvm/ADT/None.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/SelectionDAG.h" 23 #include "llvm/CodeGen/SelectionDAGNodes.h" 24 #include "llvm/CodeGen/TargetInstrInfo.h" 25 #include "llvm/CodeGen/TargetLowering.h" 26 #include "llvm/CodeGen/TargetRegisterInfo.h" 27 #include "llvm/CodeGen/TargetSubtargetInfo.h" 28 #include "llvm/CodeGen/ValueTypes.h" 29 #include "llvm/Config/llvm-config.h" 30 #include "llvm/IR/BasicBlock.h" 31 #include "llvm/IR/Constants.h" 32 #include "llvm/IR/DebugInfoMetadata.h" 33 #include "llvm/IR/DebugLoc.h" 34 #include "llvm/IR/Function.h" 35 #include "llvm/IR/Intrinsics.h" 36 #include "llvm/IR/ModuleSlotTracker.h" 37 #include "llvm/IR/Value.h" 38 #include "llvm/Support/Casting.h" 39 #include "llvm/Support/CommandLine.h" 40 #include "llvm/Support/Compiler.h" 41 #include "llvm/Support/Debug.h" 42 #include "llvm/Support/ErrorHandling.h" 43 #include "llvm/Support/MachineValueType.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include "SDNodeDbgValue.h" 49 #include <cstdint> 50 #include <iterator> 51 52 using namespace llvm; 53 54 static cl::opt<bool> 55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 56 cl::desc("Display more information when dumping selection " 57 "DAG nodes.")); 58 59 std::string SDNode::getOperationName(const SelectionDAG *G) const { 60 switch (getOpcode()) { 61 default: 62 if (getOpcode() < ISD::BUILTIN_OP_END) 63 return "<<Unknown DAG Node>>"; 64 if (isMachineOpcode()) { 65 if (G) 66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 67 if (getMachineOpcode() < TII->getNumOpcodes()) 68 return std::string(TII->getName(getMachineOpcode())); 69 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 70 } 71 if (G) { 72 const TargetLowering &TLI = G->getTargetLoweringInfo(); 73 const char *Name = TLI.getTargetNodeName(getOpcode()); 74 if (Name) return Name; 75 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 76 } 77 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 78 79 #ifndef NDEBUG 80 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 81 #endif 82 case ISD::PREFETCH: return "Prefetch"; 83 case ISD::ATOMIC_FENCE: return "AtomicFence"; 84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 99 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 100 case ISD::ATOMIC_STORE: return "AtomicStore"; 101 case ISD::PCMARKER: return "PCMarker"; 102 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 103 case ISD::SRCVALUE: return "SrcValue"; 104 case ISD::MDNODE_SDNODE: return "MDNode"; 105 case ISD::EntryToken: return "EntryToken"; 106 case ISD::TokenFactor: return "TokenFactor"; 107 case ISD::AssertSext: return "AssertSext"; 108 case ISD::AssertZext: return "AssertZext"; 109 case ISD::AssertAlign: return "AssertAlign"; 110 111 case ISD::BasicBlock: return "BasicBlock"; 112 case ISD::VALUETYPE: return "ValueType"; 113 case ISD::Register: return "Register"; 114 case ISD::RegisterMask: return "RegisterMask"; 115 case ISD::Constant: 116 if (cast<ConstantSDNode>(this)->isOpaque()) 117 return "OpaqueConstant"; 118 return "Constant"; 119 case ISD::ConstantFP: return "ConstantFP"; 120 case ISD::GlobalAddress: return "GlobalAddress"; 121 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 122 case ISD::FrameIndex: return "FrameIndex"; 123 case ISD::JumpTable: return "JumpTable"; 124 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 125 case ISD::RETURNADDR: return "RETURNADDR"; 126 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 127 case ISD::FRAMEADDR: return "FRAMEADDR"; 128 case ISD::SPONENTRY: return "SPONENTRY"; 129 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 130 case ISD::READ_REGISTER: return "READ_REGISTER"; 131 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 132 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 133 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 134 case ISD::EH_RETURN: return "EH_RETURN"; 135 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 136 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 137 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 138 case ISD::ConstantPool: return "ConstantPool"; 139 case ISD::TargetIndex: return "TargetIndex"; 140 case ISD::ExternalSymbol: return "ExternalSymbol"; 141 case ISD::BlockAddress: return "BlockAddress"; 142 case ISD::INTRINSIC_WO_CHAIN: 143 case ISD::INTRINSIC_VOID: 144 case ISD::INTRINSIC_W_CHAIN: { 145 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 146 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 147 if (IID < Intrinsic::num_intrinsics) 148 return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); 149 if (!G) 150 return "Unknown intrinsic"; 151 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 152 return TII->getName(IID); 153 llvm_unreachable("Invalid intrinsic ID"); 154 } 155 156 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 157 case ISD::TargetConstant: 158 if (cast<ConstantSDNode>(this)->isOpaque()) 159 return "OpaqueTargetConstant"; 160 return "TargetConstant"; 161 case ISD::TargetConstantFP: return "TargetConstantFP"; 162 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 163 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 164 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 165 case ISD::TargetJumpTable: return "TargetJumpTable"; 166 case ISD::TargetConstantPool: return "TargetConstantPool"; 167 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 168 case ISD::MCSymbol: return "MCSymbol"; 169 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 170 171 case ISD::CopyToReg: return "CopyToReg"; 172 case ISD::CopyFromReg: return "CopyFromReg"; 173 case ISD::UNDEF: return "undef"; 174 case ISD::VSCALE: return "vscale"; 175 case ISD::MERGE_VALUES: return "merge_values"; 176 case ISD::INLINEASM: return "inlineasm"; 177 case ISD::INLINEASM_BR: return "inlineasm_br"; 178 case ISD::EH_LABEL: return "eh_label"; 179 case ISD::ANNOTATION_LABEL: return "annotation_label"; 180 case ISD::HANDLENODE: return "handlenode"; 181 182 // Unary operators 183 case ISD::FABS: return "fabs"; 184 case ISD::FMINNUM: return "fminnum"; 185 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 186 case ISD::FMAXNUM: return "fmaxnum"; 187 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 188 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 189 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 190 case ISD::FMINIMUM: return "fminimum"; 191 case ISD::STRICT_FMINIMUM: return "strict_fminimum"; 192 case ISD::FMAXIMUM: return "fmaximum"; 193 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum"; 194 case ISD::FNEG: return "fneg"; 195 case ISD::FSQRT: return "fsqrt"; 196 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 197 case ISD::FCBRT: return "fcbrt"; 198 case ISD::FSIN: return "fsin"; 199 case ISD::STRICT_FSIN: return "strict_fsin"; 200 case ISD::FCOS: return "fcos"; 201 case ISD::STRICT_FCOS: return "strict_fcos"; 202 case ISD::FSINCOS: return "fsincos"; 203 case ISD::FTRUNC: return "ftrunc"; 204 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 205 case ISD::FFLOOR: return "ffloor"; 206 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 207 case ISD::FCEIL: return "fceil"; 208 case ISD::STRICT_FCEIL: return "strict_fceil"; 209 case ISD::FRINT: return "frint"; 210 case ISD::STRICT_FRINT: return "strict_frint"; 211 case ISD::FNEARBYINT: return "fnearbyint"; 212 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 213 case ISD::FROUND: return "fround"; 214 case ISD::STRICT_FROUND: return "strict_fround"; 215 case ISD::FROUNDEVEN: return "froundeven"; 216 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven"; 217 case ISD::FEXP: return "fexp"; 218 case ISD::STRICT_FEXP: return "strict_fexp"; 219 case ISD::FEXP2: return "fexp2"; 220 case ISD::STRICT_FEXP2: return "strict_fexp2"; 221 case ISD::FLOG: return "flog"; 222 case ISD::STRICT_FLOG: return "strict_flog"; 223 case ISD::FLOG2: return "flog2"; 224 case ISD::STRICT_FLOG2: return "strict_flog2"; 225 case ISD::FLOG10: return "flog10"; 226 case ISD::STRICT_FLOG10: return "strict_flog10"; 227 228 // Binary operators 229 case ISD::ADD: return "add"; 230 case ISD::SUB: return "sub"; 231 case ISD::MUL: return "mul"; 232 case ISD::MULHU: return "mulhu"; 233 case ISD::MULHS: return "mulhs"; 234 case ISD::ABDS: return "abds"; 235 case ISD::ABDU: return "abdu"; 236 case ISD::SDIV: return "sdiv"; 237 case ISD::UDIV: return "udiv"; 238 case ISD::SREM: return "srem"; 239 case ISD::UREM: return "urem"; 240 case ISD::SMUL_LOHI: return "smul_lohi"; 241 case ISD::UMUL_LOHI: return "umul_lohi"; 242 case ISD::SDIVREM: return "sdivrem"; 243 case ISD::UDIVREM: return "udivrem"; 244 case ISD::AND: return "and"; 245 case ISD::OR: return "or"; 246 case ISD::XOR: return "xor"; 247 case ISD::SHL: return "shl"; 248 case ISD::SRA: return "sra"; 249 case ISD::SRL: return "srl"; 250 case ISD::ROTL: return "rotl"; 251 case ISD::ROTR: return "rotr"; 252 case ISD::FSHL: return "fshl"; 253 case ISD::FSHR: return "fshr"; 254 case ISD::FADD: return "fadd"; 255 case ISD::STRICT_FADD: return "strict_fadd"; 256 case ISD::FSUB: return "fsub"; 257 case ISD::STRICT_FSUB: return "strict_fsub"; 258 case ISD::FMUL: return "fmul"; 259 case ISD::STRICT_FMUL: return "strict_fmul"; 260 case ISD::FDIV: return "fdiv"; 261 case ISD::STRICT_FDIV: return "strict_fdiv"; 262 case ISD::FMA: return "fma"; 263 case ISD::STRICT_FMA: return "strict_fma"; 264 case ISD::FMAD: return "fmad"; 265 case ISD::FREM: return "frem"; 266 case ISD::STRICT_FREM: return "strict_frem"; 267 case ISD::FCOPYSIGN: return "fcopysign"; 268 case ISD::FGETSIGN: return "fgetsign"; 269 case ISD::FCANONICALIZE: return "fcanonicalize"; 270 case ISD::FPOW: return "fpow"; 271 case ISD::STRICT_FPOW: return "strict_fpow"; 272 case ISD::SMIN: return "smin"; 273 case ISD::SMAX: return "smax"; 274 case ISD::UMIN: return "umin"; 275 case ISD::UMAX: return "umax"; 276 277 case ISD::FPOWI: return "fpowi"; 278 case ISD::STRICT_FPOWI: return "strict_fpowi"; 279 case ISD::SETCC: return "setcc"; 280 case ISD::SETCCCARRY: return "setcccarry"; 281 case ISD::STRICT_FSETCC: return "strict_fsetcc"; 282 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; 283 case ISD::SELECT: return "select"; 284 case ISD::VSELECT: return "vselect"; 285 case ISD::SELECT_CC: return "select_cc"; 286 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 287 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 288 case ISD::CONCAT_VECTORS: return "concat_vectors"; 289 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 290 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 291 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 292 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 293 case ISD::VECTOR_SPLICE: return "vector_splice"; 294 case ISD::SPLAT_VECTOR: return "splat_vector"; 295 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts"; 296 case ISD::VECTOR_REVERSE: return "vector_reverse"; 297 case ISD::STEP_VECTOR: return "step_vector"; 298 case ISD::CARRY_FALSE: return "carry_false"; 299 case ISD::ADDC: return "addc"; 300 case ISD::ADDE: return "adde"; 301 case ISD::ADDCARRY: return "addcarry"; 302 case ISD::SADDO_CARRY: return "saddo_carry"; 303 case ISD::SADDO: return "saddo"; 304 case ISD::UADDO: return "uaddo"; 305 case ISD::SSUBO: return "ssubo"; 306 case ISD::USUBO: return "usubo"; 307 case ISD::SMULO: return "smulo"; 308 case ISD::UMULO: return "umulo"; 309 case ISD::SUBC: return "subc"; 310 case ISD::SUBE: return "sube"; 311 case ISD::SUBCARRY: return "subcarry"; 312 case ISD::SSUBO_CARRY: return "ssubo_carry"; 313 case ISD::SHL_PARTS: return "shl_parts"; 314 case ISD::SRA_PARTS: return "sra_parts"; 315 case ISD::SRL_PARTS: return "srl_parts"; 316 317 case ISD::SADDSAT: return "saddsat"; 318 case ISD::UADDSAT: return "uaddsat"; 319 case ISD::SSUBSAT: return "ssubsat"; 320 case ISD::USUBSAT: return "usubsat"; 321 case ISD::SSHLSAT: return "sshlsat"; 322 case ISD::USHLSAT: return "ushlsat"; 323 324 case ISD::SMULFIX: return "smulfix"; 325 case ISD::SMULFIXSAT: return "smulfixsat"; 326 case ISD::UMULFIX: return "umulfix"; 327 case ISD::UMULFIXSAT: return "umulfixsat"; 328 329 case ISD::SDIVFIX: return "sdivfix"; 330 case ISD::SDIVFIXSAT: return "sdivfixsat"; 331 case ISD::UDIVFIX: return "udivfix"; 332 case ISD::UDIVFIXSAT: return "udivfixsat"; 333 334 // Conversion operators. 335 case ISD::SIGN_EXTEND: return "sign_extend"; 336 case ISD::ZERO_EXTEND: return "zero_extend"; 337 case ISD::ANY_EXTEND: return "any_extend"; 338 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 339 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 340 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 341 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 342 case ISD::TRUNCATE: return "truncate"; 343 case ISD::FP_ROUND: return "fp_round"; 344 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 345 case ISD::FP_EXTEND: return "fp_extend"; 346 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 347 348 case ISD::SINT_TO_FP: return "sint_to_fp"; 349 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; 350 case ISD::UINT_TO_FP: return "uint_to_fp"; 351 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp"; 352 case ISD::FP_TO_SINT: return "fp_to_sint"; 353 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 354 case ISD::FP_TO_UINT: return "fp_to_uint"; 355 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 356 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat"; 357 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; 358 case ISD::BITCAST: return "bitcast"; 359 case ISD::ADDRSPACECAST: return "addrspacecast"; 360 case ISD::FP16_TO_FP: return "fp16_to_fp"; 361 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp"; 362 case ISD::FP_TO_FP16: return "fp_to_fp16"; 363 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16"; 364 case ISD::LROUND: return "lround"; 365 case ISD::STRICT_LROUND: return "strict_lround"; 366 case ISD::LLROUND: return "llround"; 367 case ISD::STRICT_LLROUND: return "strict_llround"; 368 case ISD::LRINT: return "lrint"; 369 case ISD::STRICT_LRINT: return "strict_lrint"; 370 case ISD::LLRINT: return "llrint"; 371 case ISD::STRICT_LLRINT: return "strict_llrint"; 372 373 // Control flow instructions 374 case ISD::BR: return "br"; 375 case ISD::BRIND: return "brind"; 376 case ISD::BR_JT: return "br_jt"; 377 case ISD::BRCOND: return "brcond"; 378 case ISD::BR_CC: return "br_cc"; 379 case ISD::CALLSEQ_START: return "callseq_start"; 380 case ISD::CALLSEQ_END: return "callseq_end"; 381 382 // EH instructions 383 case ISD::CATCHRET: return "catchret"; 384 case ISD::CLEANUPRET: return "cleanupret"; 385 386 // Other operators 387 case ISD::LOAD: return "load"; 388 case ISD::STORE: return "store"; 389 case ISD::MLOAD: return "masked_load"; 390 case ISD::MSTORE: return "masked_store"; 391 case ISD::MGATHER: return "masked_gather"; 392 case ISD::MSCATTER: return "masked_scatter"; 393 case ISD::VAARG: return "vaarg"; 394 case ISD::VACOPY: return "vacopy"; 395 case ISD::VAEND: return "vaend"; 396 case ISD::VASTART: return "vastart"; 397 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 398 case ISD::EXTRACT_ELEMENT: return "extract_element"; 399 case ISD::BUILD_PAIR: return "build_pair"; 400 case ISD::STACKSAVE: return "stacksave"; 401 case ISD::STACKRESTORE: return "stackrestore"; 402 case ISD::TRAP: return "trap"; 403 case ISD::DEBUGTRAP: return "debugtrap"; 404 case ISD::UBSANTRAP: return "ubsantrap"; 405 case ISD::LIFETIME_START: return "lifetime.start"; 406 case ISD::LIFETIME_END: return "lifetime.end"; 407 case ISD::PSEUDO_PROBE: 408 return "pseudoprobe"; 409 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 410 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 411 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 412 case ISD::FREEZE: return "freeze"; 413 case ISD::PREALLOCATED_SETUP: 414 return "call_setup"; 415 case ISD::PREALLOCATED_ARG: 416 return "call_alloc"; 417 418 // Floating point environment manipulation 419 case ISD::FLT_ROUNDS_: return "flt_rounds"; 420 case ISD::SET_ROUNDING: return "set_rounding"; 421 422 // Bit manipulation 423 case ISD::ABS: return "abs"; 424 case ISD::BITREVERSE: return "bitreverse"; 425 case ISD::BSWAP: return "bswap"; 426 case ISD::CTPOP: return "ctpop"; 427 case ISD::CTTZ: return "cttz"; 428 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 429 case ISD::CTLZ: return "ctlz"; 430 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 431 case ISD::PARITY: return "parity"; 432 433 // Trampolines 434 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 435 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 436 437 case ISD::CONDCODE: 438 switch (cast<CondCodeSDNode>(this)->get()) { 439 default: llvm_unreachable("Unknown setcc condition!"); 440 case ISD::SETOEQ: return "setoeq"; 441 case ISD::SETOGT: return "setogt"; 442 case ISD::SETOGE: return "setoge"; 443 case ISD::SETOLT: return "setolt"; 444 case ISD::SETOLE: return "setole"; 445 case ISD::SETONE: return "setone"; 446 447 case ISD::SETO: return "seto"; 448 case ISD::SETUO: return "setuo"; 449 case ISD::SETUEQ: return "setueq"; 450 case ISD::SETUGT: return "setugt"; 451 case ISD::SETUGE: return "setuge"; 452 case ISD::SETULT: return "setult"; 453 case ISD::SETULE: return "setule"; 454 case ISD::SETUNE: return "setune"; 455 456 case ISD::SETEQ: return "seteq"; 457 case ISD::SETGT: return "setgt"; 458 case ISD::SETGE: return "setge"; 459 case ISD::SETLT: return "setlt"; 460 case ISD::SETLE: return "setle"; 461 case ISD::SETNE: return "setne"; 462 463 case ISD::SETTRUE: return "settrue"; 464 case ISD::SETTRUE2: return "settrue2"; 465 case ISD::SETFALSE: return "setfalse"; 466 case ISD::SETFALSE2: return "setfalse2"; 467 } 468 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 469 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; 470 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 471 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul"; 472 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 473 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 474 case ISD::VECREDUCE_AND: return "vecreduce_and"; 475 case ISD::VECREDUCE_OR: return "vecreduce_or"; 476 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 477 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 478 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 479 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 480 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 481 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 482 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 483 484 // Vector Predication 485 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \ 486 case ISD::SDID: \ 487 return #NAME; 488 #include "llvm/IR/VPIntrinsics.def" 489 } 490 } 491 492 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 493 switch (AM) { 494 default: return ""; 495 case ISD::PRE_INC: return "<pre-inc>"; 496 case ISD::PRE_DEC: return "<pre-dec>"; 497 case ISD::POST_INC: return "<post-inc>"; 498 case ISD::POST_DEC: return "<post-dec>"; 499 } 500 } 501 502 static Printable PrintNodeId(const SDNode &Node) { 503 return Printable([&Node](raw_ostream &OS) { 504 #ifndef NDEBUG 505 OS << 't' << Node.PersistentId; 506 #else 507 OS << (const void*)&Node; 508 #endif 509 }); 510 } 511 512 // Print the MMO with more information from the SelectionDAG. 513 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 514 const MachineFunction *MF, const Module *M, 515 const MachineFrameInfo *MFI, 516 const TargetInstrInfo *TII, LLVMContext &Ctx) { 517 ModuleSlotTracker MST(M); 518 if (MF) 519 MST.incorporateFunction(MF->getFunction()); 520 SmallVector<StringRef, 0> SSNs; 521 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 522 } 523 524 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 525 const SelectionDAG *G) { 526 if (G) { 527 const MachineFunction *MF = &G->getMachineFunction(); 528 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 529 &MF->getFrameInfo(), 530 G->getSubtarget().getInstrInfo(), *G->getContext()); 531 } 532 533 LLVMContext Ctx; 534 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 535 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 536 } 537 538 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 539 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 540 541 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 542 print(dbgs(), G); 543 dbgs() << '\n'; 544 } 545 #endif 546 547 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 548 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 549 if (i) OS << ","; 550 if (getValueType(i) == MVT::Other) 551 OS << "ch"; 552 else 553 OS << getValueType(i).getEVTString(); 554 } 555 } 556 557 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 558 if (getFlags().hasNoUnsignedWrap()) 559 OS << " nuw"; 560 561 if (getFlags().hasNoSignedWrap()) 562 OS << " nsw"; 563 564 if (getFlags().hasExact()) 565 OS << " exact"; 566 567 if (getFlags().hasNoNaNs()) 568 OS << " nnan"; 569 570 if (getFlags().hasNoInfs()) 571 OS << " ninf"; 572 573 if (getFlags().hasNoSignedZeros()) 574 OS << " nsz"; 575 576 if (getFlags().hasAllowReciprocal()) 577 OS << " arcp"; 578 579 if (getFlags().hasAllowContract()) 580 OS << " contract"; 581 582 if (getFlags().hasApproximateFuncs()) 583 OS << " afn"; 584 585 if (getFlags().hasAllowReassociation()) 586 OS << " reassoc"; 587 588 if (getFlags().hasNoFPExcept()) 589 OS << " nofpexcept"; 590 591 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 592 if (!MN->memoperands_empty()) { 593 OS << "<"; 594 OS << "Mem:"; 595 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 596 e = MN->memoperands_end(); i != e; ++i) { 597 printMemOperand(OS, **i, G); 598 if (std::next(i) != e) 599 OS << " "; 600 } 601 OS << ">"; 602 } 603 } else if (const ShuffleVectorSDNode *SVN = 604 dyn_cast<ShuffleVectorSDNode>(this)) { 605 OS << "<"; 606 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 607 int Idx = SVN->getMaskElt(i); 608 if (i) OS << ","; 609 if (Idx < 0) 610 OS << "u"; 611 else 612 OS << Idx; 613 } 614 OS << ">"; 615 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 616 OS << '<' << CSDN->getAPIntValue() << '>'; 617 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 618 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 619 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 620 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 621 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 622 else { 623 OS << "<APFloat("; 624 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 625 OS << ")>"; 626 } 627 } else if (const GlobalAddressSDNode *GADN = 628 dyn_cast<GlobalAddressSDNode>(this)) { 629 int64_t offset = GADN->getOffset(); 630 OS << '<'; 631 GADN->getGlobal()->printAsOperand(OS); 632 OS << '>'; 633 if (offset > 0) 634 OS << " + " << offset; 635 else 636 OS << " " << offset; 637 if (unsigned int TF = GADN->getTargetFlags()) 638 OS << " [TF=" << TF << ']'; 639 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 640 OS << "<" << FIDN->getIndex() << ">"; 641 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 642 OS << "<" << JTDN->getIndex() << ">"; 643 if (unsigned int TF = JTDN->getTargetFlags()) 644 OS << " [TF=" << TF << ']'; 645 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 646 int offset = CP->getOffset(); 647 if (CP->isMachineConstantPoolEntry()) 648 OS << "<" << *CP->getMachineCPVal() << ">"; 649 else 650 OS << "<" << *CP->getConstVal() << ">"; 651 if (offset > 0) 652 OS << " + " << offset; 653 else 654 OS << " " << offset; 655 if (unsigned int TF = CP->getTargetFlags()) 656 OS << " [TF=" << TF << ']'; 657 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 658 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 659 if (unsigned TF = TI->getTargetFlags()) 660 OS << " [TF=" << TF << ']'; 661 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 662 OS << "<"; 663 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 664 if (LBB) 665 OS << LBB->getName() << " "; 666 OS << (const void*)BBDN->getBasicBlock() << ">"; 667 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 668 OS << ' ' << printReg(R->getReg(), 669 G ? G->getSubtarget().getRegisterInfo() : nullptr); 670 } else if (const ExternalSymbolSDNode *ES = 671 dyn_cast<ExternalSymbolSDNode>(this)) { 672 OS << "'" << ES->getSymbol() << "'"; 673 if (unsigned int TF = ES->getTargetFlags()) 674 OS << " [TF=" << TF << ']'; 675 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 676 if (M->getValue()) 677 OS << "<" << M->getValue() << ">"; 678 else 679 OS << "<null>"; 680 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 681 if (MD->getMD()) 682 OS << "<" << MD->getMD() << ">"; 683 else 684 OS << "<null>"; 685 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 686 OS << ":" << N->getVT().getEVTString(); 687 } 688 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 689 OS << "<"; 690 691 printMemOperand(OS, *LD->getMemOperand(), G); 692 693 bool doExt = true; 694 switch (LD->getExtensionType()) { 695 default: doExt = false; break; 696 case ISD::EXTLOAD: OS << ", anyext"; break; 697 case ISD::SEXTLOAD: OS << ", sext"; break; 698 case ISD::ZEXTLOAD: OS << ", zext"; break; 699 } 700 if (doExt) 701 OS << " from " << LD->getMemoryVT().getEVTString(); 702 703 const char *AM = getIndexedModeName(LD->getAddressingMode()); 704 if (*AM) 705 OS << ", " << AM; 706 707 OS << ">"; 708 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 709 OS << "<"; 710 printMemOperand(OS, *ST->getMemOperand(), G); 711 712 if (ST->isTruncatingStore()) 713 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 714 715 const char *AM = getIndexedModeName(ST->getAddressingMode()); 716 if (*AM) 717 OS << ", " << AM; 718 719 OS << ">"; 720 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 721 OS << "<"; 722 723 printMemOperand(OS, *MLd->getMemOperand(), G); 724 725 bool doExt = true; 726 switch (MLd->getExtensionType()) { 727 default: doExt = false; break; 728 case ISD::EXTLOAD: OS << ", anyext"; break; 729 case ISD::SEXTLOAD: OS << ", sext"; break; 730 case ISD::ZEXTLOAD: OS << ", zext"; break; 731 } 732 if (doExt) 733 OS << " from " << MLd->getMemoryVT().getEVTString(); 734 735 const char *AM = getIndexedModeName(MLd->getAddressingMode()); 736 if (*AM) 737 OS << ", " << AM; 738 739 if (MLd->isExpandingLoad()) 740 OS << ", expanding"; 741 742 OS << ">"; 743 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 744 OS << "<"; 745 printMemOperand(OS, *MSt->getMemOperand(), G); 746 747 if (MSt->isTruncatingStore()) 748 OS << ", trunc to " << MSt->getMemoryVT().getEVTString(); 749 750 const char *AM = getIndexedModeName(MSt->getAddressingMode()); 751 if (*AM) 752 OS << ", " << AM; 753 754 if (MSt->isCompressingStore()) 755 OS << ", compressing"; 756 757 OS << ">"; 758 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) { 759 OS << "<"; 760 printMemOperand(OS, *MGather->getMemOperand(), G); 761 762 bool doExt = true; 763 switch (MGather->getExtensionType()) { 764 default: doExt = false; break; 765 case ISD::EXTLOAD: OS << ", anyext"; break; 766 case ISD::SEXTLOAD: OS << ", sext"; break; 767 case ISD::ZEXTLOAD: OS << ", zext"; break; 768 } 769 if (doExt) 770 OS << " from " << MGather->getMemoryVT().getEVTString(); 771 772 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned"; 773 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; 774 OS << ", " << Signed << " " << Scaled << " offset"; 775 776 OS << ">"; 777 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) { 778 OS << "<"; 779 printMemOperand(OS, *MScatter->getMemOperand(), G); 780 781 if (MScatter->isTruncatingStore()) 782 OS << ", trunc to " << MScatter->getMemoryVT().getEVTString(); 783 784 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned"; 785 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; 786 OS << ", " << Signed << " " << Scaled << " offset"; 787 788 OS << ">"; 789 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { 790 OS << "<"; 791 printMemOperand(OS, *M->getMemOperand(), G); 792 OS << ">"; 793 } else if (const BlockAddressSDNode *BA = 794 dyn_cast<BlockAddressSDNode>(this)) { 795 int64_t offset = BA->getOffset(); 796 OS << "<"; 797 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 798 OS << ", "; 799 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 800 OS << ">"; 801 if (offset > 0) 802 OS << " + " << offset; 803 else 804 OS << " " << offset; 805 if (unsigned int TF = BA->getTargetFlags()) 806 OS << " [TF=" << TF << ']'; 807 } else if (const AddrSpaceCastSDNode *ASC = 808 dyn_cast<AddrSpaceCastSDNode>(this)) { 809 OS << '[' 810 << ASC->getSrcAddressSpace() 811 << " -> " 812 << ASC->getDestAddressSpace() 813 << ']'; 814 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 815 if (LN->hasOffset()) 816 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 817 } 818 819 if (VerboseDAGDumping) { 820 if (unsigned Order = getIROrder()) 821 OS << " [ORD=" << Order << ']'; 822 823 if (getNodeId() != -1) 824 OS << " [ID=" << getNodeId() << ']'; 825 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 826 OS << " # D:" << isDivergent(); 827 828 if (G && !G->GetDbgValues(this).empty()) { 829 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 830 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 831 if (!Dbg->isInvalidated()) 832 Dbg->print(OS); 833 } else if (getHasDebugValue()) 834 OS << " [NoOfDbgValues>0]"; 835 } 836 } 837 838 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 839 OS << " DbgVal(Order=" << getOrder() << ')'; 840 if (isInvalidated()) 841 OS << "(Invalidated)"; 842 if (isEmitted()) 843 OS << "(Emitted)"; 844 OS << "("; 845 bool Comma = false; 846 for (const SDDbgOperand &Op : getLocationOps()) { 847 if (Comma) 848 OS << ", "; 849 switch (Op.getKind()) { 850 case SDDbgOperand::SDNODE: 851 if (Op.getSDNode()) 852 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); 853 else 854 OS << "SDNODE"; 855 break; 856 case SDDbgOperand::CONST: 857 OS << "CONST"; 858 break; 859 case SDDbgOperand::FRAMEIX: 860 OS << "FRAMEIX=" << Op.getFrameIx(); 861 break; 862 case SDDbgOperand::VREG: 863 OS << "VREG=" << Op.getVReg(); 864 break; 865 } 866 Comma = true; 867 } 868 OS << ")"; 869 if (isIndirect()) OS << "(Indirect)"; 870 if (isVariadic()) 871 OS << "(Variadic)"; 872 OS << ":\"" << Var->getName() << '"'; 873 #ifndef NDEBUG 874 if (Expr->getNumElements()) 875 Expr->dump(); 876 #endif 877 } 878 879 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 880 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 881 if (isInvalidated()) 882 return; 883 print(dbgs()); 884 dbgs() << "\n"; 885 } 886 #endif 887 888 /// Return true if this node is so simple that we should just print it inline 889 /// if it appears as an operand. 890 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 891 // Avoid lots of cluttering when inline printing nodes with associated 892 // DbgValues in verbose mode. 893 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 894 return false; 895 if (Node.getOpcode() == ISD::EntryToken) 896 return false; 897 return Node.getNumOperands() == 0; 898 } 899 900 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 901 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 902 for (const SDValue &Op : N->op_values()) { 903 if (shouldPrintInline(*Op.getNode(), G)) 904 continue; 905 if (Op.getNode()->hasOneUse()) 906 DumpNodes(Op.getNode(), indent+2, G); 907 } 908 909 dbgs().indent(indent); 910 N->dump(G); 911 } 912 913 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 914 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 915 916 for (const SDNode &N : allnodes()) { 917 if (!N.hasOneUse() && &N != getRoot().getNode() && 918 (!shouldPrintInline(N, this) || N.use_empty())) 919 DumpNodes(&N, 2, this); 920 } 921 922 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 923 dbgs() << "\n"; 924 925 if (VerboseDAGDumping) { 926 if (DbgBegin() != DbgEnd()) 927 dbgs() << "SDDbgValues:\n"; 928 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 929 Dbg->dump(); 930 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 931 dbgs() << "Byval SDDbgValues:\n"; 932 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 933 Dbg->dump(); 934 } 935 dbgs() << "\n"; 936 } 937 #endif 938 939 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 940 OS << PrintNodeId(*this) << ": "; 941 print_types(OS, G); 942 OS << " = " << getOperationName(G); 943 print_details(OS, G); 944 } 945 946 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 947 const SDValue Value) { 948 if (!Value.getNode()) { 949 OS << "<null>"; 950 return false; 951 } 952 953 if (shouldPrintInline(*Value.getNode(), G)) { 954 OS << Value->getOperationName(G) << ':'; 955 Value->print_types(OS, G); 956 Value->print_details(OS, G); 957 return true; 958 } 959 960 OS << PrintNodeId(*Value.getNode()); 961 if (unsigned RN = Value.getResNo()) 962 OS << ':' << RN; 963 return false; 964 } 965 966 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 967 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 968 969 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 970 const SelectionDAG *G, VisitedSDNodeSet &once) { 971 if (!once.insert(N).second) // If we've been here before, return now. 972 return; 973 974 // Dump the current SDNode, but don't end the line yet. 975 OS.indent(indent); 976 N->printr(OS, G); 977 978 // Having printed this SDNode, walk the children: 979 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 980 if (i) OS << ","; 981 OS << " "; 982 983 const SDValue Op = N->getOperand(i); 984 bool printedInline = printOperand(OS, G, Op); 985 if (printedInline) 986 once.insert(Op.getNode()); 987 } 988 989 OS << "\n"; 990 991 // Dump children that have grandchildren on their own line(s). 992 for (const SDValue &Op : N->op_values()) 993 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 994 } 995 996 LLVM_DUMP_METHOD void SDNode::dumpr() const { 997 VisitedSDNodeSet once; 998 DumpNodesr(dbgs(), this, 0, nullptr, once); 999 } 1000 1001 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 1002 VisitedSDNodeSet once; 1003 DumpNodesr(dbgs(), this, 0, G, once); 1004 } 1005 #endif 1006 1007 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 1008 const SelectionDAG *G, unsigned depth, 1009 unsigned indent) { 1010 if (depth == 0) 1011 return; 1012 1013 OS.indent(indent); 1014 1015 N->print(OS, G); 1016 1017 for (const SDValue &Op : N->op_values()) { 1018 // Don't follow chain operands. 1019 if (Op.getValueType() == MVT::Other) 1020 continue; 1021 OS << '\n'; 1022 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2); 1023 } 1024 } 1025 1026 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 1027 unsigned depth) const { 1028 printrWithDepthHelper(OS, this, G, depth, 0); 1029 } 1030 1031 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 1032 // Don't print impossibly deep things. 1033 printrWithDepth(OS, G, 10); 1034 } 1035 1036 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1037 LLVM_DUMP_METHOD 1038 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 1039 printrWithDepth(dbgs(), G, depth); 1040 } 1041 1042 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 1043 // Don't print impossibly deep things. 1044 dumprWithDepth(G, 10); 1045 } 1046 #endif 1047 1048 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 1049 printr(OS, G); 1050 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1051 if (i) OS << ", "; else OS << " "; 1052 printOperand(OS, G, getOperand(i)); 1053 } 1054 if (DebugLoc DL = getDebugLoc()) { 1055 OS << ", "; 1056 DL.print(OS); 1057 } 1058 } 1059