1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/ADT/APFloat.h" 14 #include "llvm/ADT/APInt.h" 15 #include "llvm/ADT/None.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/SelectionDAG.h" 23 #include "llvm/CodeGen/SelectionDAGNodes.h" 24 #include "llvm/CodeGen/TargetInstrInfo.h" 25 #include "llvm/CodeGen/TargetLowering.h" 26 #include "llvm/CodeGen/TargetRegisterInfo.h" 27 #include "llvm/CodeGen/TargetSubtargetInfo.h" 28 #include "llvm/CodeGen/ValueTypes.h" 29 #include "llvm/Config/llvm-config.h" 30 #include "llvm/IR/BasicBlock.h" 31 #include "llvm/IR/Constants.h" 32 #include "llvm/IR/DebugInfoMetadata.h" 33 #include "llvm/IR/DebugLoc.h" 34 #include "llvm/IR/Function.h" 35 #include "llvm/IR/Intrinsics.h" 36 #include "llvm/IR/ModuleSlotTracker.h" 37 #include "llvm/IR/Value.h" 38 #include "llvm/Support/Casting.h" 39 #include "llvm/Support/CommandLine.h" 40 #include "llvm/Support/Compiler.h" 41 #include "llvm/Support/Debug.h" 42 #include "llvm/Support/ErrorHandling.h" 43 #include "llvm/Support/MachineValueType.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include "SDNodeDbgValue.h" 49 #include <cstdint> 50 #include <iterator> 51 52 using namespace llvm; 53 54 static cl::opt<bool> 55 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 56 cl::desc("Display more information when dumping selection " 57 "DAG nodes.")); 58 59 std::string SDNode::getOperationName(const SelectionDAG *G) const { 60 switch (getOpcode()) { 61 default: 62 if (getOpcode() < ISD::BUILTIN_OP_END) 63 return "<<Unknown DAG Node>>"; 64 if (isMachineOpcode()) { 65 if (G) 66 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 67 if (getMachineOpcode() < TII->getNumOpcodes()) 68 return TII->getName(getMachineOpcode()); 69 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 70 } 71 if (G) { 72 const TargetLowering &TLI = G->getTargetLoweringInfo(); 73 const char *Name = TLI.getTargetNodeName(getOpcode()); 74 if (Name) return Name; 75 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 76 } 77 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 78 79 #ifndef NDEBUG 80 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 81 #endif 82 case ISD::PREFETCH: return "Prefetch"; 83 case ISD::ATOMIC_FENCE: return "AtomicFence"; 84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 99 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 100 case ISD::ATOMIC_STORE: return "AtomicStore"; 101 case ISD::PCMARKER: return "PCMarker"; 102 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 103 case ISD::SRCVALUE: return "SrcValue"; 104 case ISD::MDNODE_SDNODE: return "MDNode"; 105 case ISD::EntryToken: return "EntryToken"; 106 case ISD::TokenFactor: return "TokenFactor"; 107 case ISD::AssertSext: return "AssertSext"; 108 case ISD::AssertZext: return "AssertZext"; 109 110 case ISD::BasicBlock: return "BasicBlock"; 111 case ISD::VALUETYPE: return "ValueType"; 112 case ISD::Register: return "Register"; 113 case ISD::RegisterMask: return "RegisterMask"; 114 case ISD::Constant: 115 if (cast<ConstantSDNode>(this)->isOpaque()) 116 return "OpaqueConstant"; 117 return "Constant"; 118 case ISD::ConstantFP: return "ConstantFP"; 119 case ISD::GlobalAddress: return "GlobalAddress"; 120 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 121 case ISD::FrameIndex: return "FrameIndex"; 122 case ISD::JumpTable: return "JumpTable"; 123 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 124 case ISD::RETURNADDR: return "RETURNADDR"; 125 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 126 case ISD::FRAMEADDR: return "FRAMEADDR"; 127 case ISD::SPONENTRY: return "SPONENTRY"; 128 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 129 case ISD::READ_REGISTER: return "READ_REGISTER"; 130 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 131 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 132 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 133 case ISD::EH_RETURN: return "EH_RETURN"; 134 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 135 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 136 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 137 case ISD::ConstantPool: return "ConstantPool"; 138 case ISD::TargetIndex: return "TargetIndex"; 139 case ISD::ExternalSymbol: return "ExternalSymbol"; 140 case ISD::BlockAddress: return "BlockAddress"; 141 case ISD::INTRINSIC_WO_CHAIN: 142 case ISD::INTRINSIC_VOID: 143 case ISD::INTRINSIC_W_CHAIN: { 144 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 145 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 146 if (IID < Intrinsic::num_intrinsics) 147 return Intrinsic::getName((Intrinsic::ID)IID, None); 148 else if (!G) 149 return "Unknown intrinsic"; 150 else if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 151 return TII->getName(IID); 152 llvm_unreachable("Invalid intrinsic ID"); 153 } 154 155 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 156 case ISD::TargetConstant: 157 if (cast<ConstantSDNode>(this)->isOpaque()) 158 return "OpaqueTargetConstant"; 159 return "TargetConstant"; 160 case ISD::TargetConstantFP: return "TargetConstantFP"; 161 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 162 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 163 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 164 case ISD::TargetJumpTable: return "TargetJumpTable"; 165 case ISD::TargetConstantPool: return "TargetConstantPool"; 166 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 167 case ISD::MCSymbol: return "MCSymbol"; 168 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 169 170 case ISD::CopyToReg: return "CopyToReg"; 171 case ISD::CopyFromReg: return "CopyFromReg"; 172 case ISD::UNDEF: return "undef"; 173 case ISD::MERGE_VALUES: return "merge_values"; 174 case ISD::INLINEASM: return "inlineasm"; 175 case ISD::INLINEASM_BR: return "inlineasm_br"; 176 case ISD::EH_LABEL: return "eh_label"; 177 case ISD::ANNOTATION_LABEL: return "annotation_label"; 178 case ISD::HANDLENODE: return "handlenode"; 179 180 // Unary operators 181 case ISD::FABS: return "fabs"; 182 case ISD::FMINNUM: return "fminnum"; 183 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 184 case ISD::FMAXNUM: return "fmaxnum"; 185 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 186 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 187 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 188 case ISD::FMINIMUM: return "fminimum"; 189 case ISD::FMAXIMUM: return "fmaximum"; 190 case ISD::FNEG: return "fneg"; 191 case ISD::FSQRT: return "fsqrt"; 192 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 193 case ISD::FCBRT: return "fcbrt"; 194 case ISD::FSIN: return "fsin"; 195 case ISD::STRICT_FSIN: return "strict_fsin"; 196 case ISD::FCOS: return "fcos"; 197 case ISD::STRICT_FCOS: return "strict_fcos"; 198 case ISD::FSINCOS: return "fsincos"; 199 case ISD::FTRUNC: return "ftrunc"; 200 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 201 case ISD::FFLOOR: return "ffloor"; 202 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 203 case ISD::FCEIL: return "fceil"; 204 case ISD::STRICT_FCEIL: return "strict_fceil"; 205 case ISD::FRINT: return "frint"; 206 case ISD::STRICT_FRINT: return "strict_frint"; 207 case ISD::FNEARBYINT: return "fnearbyint"; 208 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 209 case ISD::FROUND: return "fround"; 210 case ISD::STRICT_FROUND: return "strict_fround"; 211 case ISD::FEXP: return "fexp"; 212 case ISD::STRICT_FEXP: return "strict_fexp"; 213 case ISD::FEXP2: return "fexp2"; 214 case ISD::STRICT_FEXP2: return "strict_fexp2"; 215 case ISD::FLOG: return "flog"; 216 case ISD::STRICT_FLOG: return "strict_flog"; 217 case ISD::FLOG2: return "flog2"; 218 case ISD::STRICT_FLOG2: return "strict_flog2"; 219 case ISD::FLOG10: return "flog10"; 220 case ISD::STRICT_FLOG10: return "strict_flog10"; 221 222 // Binary operators 223 case ISD::ADD: return "add"; 224 case ISD::SUB: return "sub"; 225 case ISD::MUL: return "mul"; 226 case ISD::MULHU: return "mulhu"; 227 case ISD::MULHS: return "mulhs"; 228 case ISD::SDIV: return "sdiv"; 229 case ISD::UDIV: return "udiv"; 230 case ISD::SREM: return "srem"; 231 case ISD::UREM: return "urem"; 232 case ISD::SMUL_LOHI: return "smul_lohi"; 233 case ISD::UMUL_LOHI: return "umul_lohi"; 234 case ISD::SDIVREM: return "sdivrem"; 235 case ISD::UDIVREM: return "udivrem"; 236 case ISD::AND: return "and"; 237 case ISD::OR: return "or"; 238 case ISD::XOR: return "xor"; 239 case ISD::SHL: return "shl"; 240 case ISD::SRA: return "sra"; 241 case ISD::SRL: return "srl"; 242 case ISD::ROTL: return "rotl"; 243 case ISD::ROTR: return "rotr"; 244 case ISD::FSHL: return "fshl"; 245 case ISD::FSHR: return "fshr"; 246 case ISD::FADD: return "fadd"; 247 case ISD::STRICT_FADD: return "strict_fadd"; 248 case ISD::FSUB: return "fsub"; 249 case ISD::STRICT_FSUB: return "strict_fsub"; 250 case ISD::FMUL: return "fmul"; 251 case ISD::STRICT_FMUL: return "strict_fmul"; 252 case ISD::FDIV: return "fdiv"; 253 case ISD::STRICT_FDIV: return "strict_fdiv"; 254 case ISD::FMA: return "fma"; 255 case ISD::STRICT_FMA: return "strict_fma"; 256 case ISD::FMAD: return "fmad"; 257 case ISD::FREM: return "frem"; 258 case ISD::STRICT_FREM: return "strict_frem"; 259 case ISD::FCOPYSIGN: return "fcopysign"; 260 case ISD::FGETSIGN: return "fgetsign"; 261 case ISD::FCANONICALIZE: return "fcanonicalize"; 262 case ISD::FPOW: return "fpow"; 263 case ISD::STRICT_FPOW: return "strict_fpow"; 264 case ISD::SMIN: return "smin"; 265 case ISD::SMAX: return "smax"; 266 case ISD::UMIN: return "umin"; 267 case ISD::UMAX: return "umax"; 268 269 case ISD::FPOWI: return "fpowi"; 270 case ISD::STRICT_FPOWI: return "strict_fpowi"; 271 case ISD::SETCC: return "setcc"; 272 case ISD::SETCCCARRY: return "setcccarry"; 273 case ISD::SELECT: return "select"; 274 case ISD::VSELECT: return "vselect"; 275 case ISD::SELECT_CC: return "select_cc"; 276 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 277 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 278 case ISD::CONCAT_VECTORS: return "concat_vectors"; 279 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 280 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 281 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 282 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 283 case ISD::CARRY_FALSE: return "carry_false"; 284 case ISD::ADDC: return "addc"; 285 case ISD::ADDE: return "adde"; 286 case ISD::ADDCARRY: return "addcarry"; 287 case ISD::SADDO: return "saddo"; 288 case ISD::UADDO: return "uaddo"; 289 case ISD::SSUBO: return "ssubo"; 290 case ISD::USUBO: return "usubo"; 291 case ISD::SMULO: return "smulo"; 292 case ISD::UMULO: return "umulo"; 293 case ISD::SUBC: return "subc"; 294 case ISD::SUBE: return "sube"; 295 case ISD::SUBCARRY: return "subcarry"; 296 case ISD::SHL_PARTS: return "shl_parts"; 297 case ISD::SRA_PARTS: return "sra_parts"; 298 case ISD::SRL_PARTS: return "srl_parts"; 299 300 case ISD::SADDSAT: return "saddsat"; 301 case ISD::UADDSAT: return "uaddsat"; 302 case ISD::SSUBSAT: return "ssubsat"; 303 case ISD::USUBSAT: return "usubsat"; 304 305 case ISD::SMULFIX: return "smulfix"; 306 case ISD::SMULFIXSAT: return "smulfixsat"; 307 case ISD::UMULFIX: return "umulfix"; 308 309 // Conversion operators. 310 case ISD::SIGN_EXTEND: return "sign_extend"; 311 case ISD::ZERO_EXTEND: return "zero_extend"; 312 case ISD::ANY_EXTEND: return "any_extend"; 313 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 314 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 315 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 316 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 317 case ISD::TRUNCATE: return "truncate"; 318 case ISD::FP_ROUND: return "fp_round"; 319 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 320 case ISD::FLT_ROUNDS_: return "flt_rounds"; 321 case ISD::FP_ROUND_INREG: return "fp_round_inreg"; 322 case ISD::FP_EXTEND: return "fp_extend"; 323 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 324 325 case ISD::SINT_TO_FP: return "sint_to_fp"; 326 case ISD::UINT_TO_FP: return "uint_to_fp"; 327 case ISD::FP_TO_SINT: return "fp_to_sint"; 328 case ISD::FP_TO_UINT: return "fp_to_uint"; 329 case ISD::BITCAST: return "bitcast"; 330 case ISD::ADDRSPACECAST: return "addrspacecast"; 331 case ISD::FP16_TO_FP: return "fp16_to_fp"; 332 case ISD::FP_TO_FP16: return "fp_to_fp16"; 333 case ISD::LROUND: return "lround"; 334 case ISD::LLROUND: return "llround"; 335 case ISD::LRINT: return "lrint"; 336 case ISD::LLRINT: return "llrint"; 337 338 // Control flow instructions 339 case ISD::BR: return "br"; 340 case ISD::BRIND: return "brind"; 341 case ISD::BR_JT: return "br_jt"; 342 case ISD::BRCOND: return "brcond"; 343 case ISD::BR_CC: return "br_cc"; 344 case ISD::CALLSEQ_START: return "callseq_start"; 345 case ISD::CALLSEQ_END: return "callseq_end"; 346 347 // EH instructions 348 case ISD::CATCHRET: return "catchret"; 349 case ISD::CLEANUPRET: return "cleanupret"; 350 351 // Other operators 352 case ISD::LOAD: return "load"; 353 case ISD::STORE: return "store"; 354 case ISD::MLOAD: return "masked_load"; 355 case ISD::MSTORE: return "masked_store"; 356 case ISD::MGATHER: return "masked_gather"; 357 case ISD::MSCATTER: return "masked_scatter"; 358 case ISD::VAARG: return "vaarg"; 359 case ISD::VACOPY: return "vacopy"; 360 case ISD::VAEND: return "vaend"; 361 case ISD::VASTART: return "vastart"; 362 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 363 case ISD::EXTRACT_ELEMENT: return "extract_element"; 364 case ISD::BUILD_PAIR: return "build_pair"; 365 case ISD::STACKSAVE: return "stacksave"; 366 case ISD::STACKRESTORE: return "stackrestore"; 367 case ISD::TRAP: return "trap"; 368 case ISD::DEBUGTRAP: return "debugtrap"; 369 case ISD::LIFETIME_START: return "lifetime.start"; 370 case ISD::LIFETIME_END: return "lifetime.end"; 371 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 372 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 373 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 374 375 // Bit manipulation 376 case ISD::ABS: return "abs"; 377 case ISD::BITREVERSE: return "bitreverse"; 378 case ISD::BSWAP: return "bswap"; 379 case ISD::CTPOP: return "ctpop"; 380 case ISD::CTTZ: return "cttz"; 381 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 382 case ISD::CTLZ: return "ctlz"; 383 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 384 385 // Trampolines 386 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 387 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 388 389 case ISD::CONDCODE: 390 switch (cast<CondCodeSDNode>(this)->get()) { 391 default: llvm_unreachable("Unknown setcc condition!"); 392 case ISD::SETOEQ: return "setoeq"; 393 case ISD::SETOGT: return "setogt"; 394 case ISD::SETOGE: return "setoge"; 395 case ISD::SETOLT: return "setolt"; 396 case ISD::SETOLE: return "setole"; 397 case ISD::SETONE: return "setone"; 398 399 case ISD::SETO: return "seto"; 400 case ISD::SETUO: return "setuo"; 401 case ISD::SETUEQ: return "setueq"; 402 case ISD::SETUGT: return "setugt"; 403 case ISD::SETUGE: return "setuge"; 404 case ISD::SETULT: return "setult"; 405 case ISD::SETULE: return "setule"; 406 case ISD::SETUNE: return "setune"; 407 408 case ISD::SETEQ: return "seteq"; 409 case ISD::SETGT: return "setgt"; 410 case ISD::SETGE: return "setge"; 411 case ISD::SETLT: return "setlt"; 412 case ISD::SETLE: return "setle"; 413 case ISD::SETNE: return "setne"; 414 415 case ISD::SETTRUE: return "settrue"; 416 case ISD::SETTRUE2: return "settrue2"; 417 case ISD::SETFALSE: return "setfalse"; 418 case ISD::SETFALSE2: return "setfalse2"; 419 } 420 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 421 case ISD::VECREDUCE_STRICT_FADD: return "vecreduce_strict_fadd"; 422 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 423 case ISD::VECREDUCE_STRICT_FMUL: return "vecreduce_strict_fmul"; 424 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 425 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 426 case ISD::VECREDUCE_AND: return "vecreduce_and"; 427 case ISD::VECREDUCE_OR: return "vecreduce_or"; 428 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 429 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 430 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 431 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 432 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 433 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 434 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 435 } 436 } 437 438 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 439 switch (AM) { 440 default: return ""; 441 case ISD::PRE_INC: return "<pre-inc>"; 442 case ISD::PRE_DEC: return "<pre-dec>"; 443 case ISD::POST_INC: return "<post-inc>"; 444 case ISD::POST_DEC: return "<post-dec>"; 445 } 446 } 447 448 static Printable PrintNodeId(const SDNode &Node) { 449 return Printable([&Node](raw_ostream &OS) { 450 #ifndef NDEBUG 451 OS << 't' << Node.PersistentId; 452 #else 453 OS << (const void*)&Node; 454 #endif 455 }); 456 } 457 458 // Print the MMO with more information from the SelectionDAG. 459 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 460 const MachineFunction *MF, const Module *M, 461 const MachineFrameInfo *MFI, 462 const TargetInstrInfo *TII, LLVMContext &Ctx) { 463 ModuleSlotTracker MST(M); 464 if (MF) 465 MST.incorporateFunction(MF->getFunction()); 466 SmallVector<StringRef, 0> SSNs; 467 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 468 } 469 470 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 471 const SelectionDAG *G) { 472 if (G) { 473 const MachineFunction *MF = &G->getMachineFunction(); 474 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 475 &MF->getFrameInfo(), G->getSubtarget().getInstrInfo(), 476 *G->getContext()); 477 } else { 478 LLVMContext Ctx; 479 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 480 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 481 } 482 } 483 484 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 485 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 486 487 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 488 print(dbgs(), G); 489 dbgs() << '\n'; 490 } 491 #endif 492 493 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 494 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 495 if (i) OS << ","; 496 if (getValueType(i) == MVT::Other) 497 OS << "ch"; 498 else 499 OS << getValueType(i).getEVTString(); 500 } 501 } 502 503 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 504 if (getFlags().hasNoUnsignedWrap()) 505 OS << " nuw"; 506 507 if (getFlags().hasNoSignedWrap()) 508 OS << " nsw"; 509 510 if (getFlags().hasExact()) 511 OS << " exact"; 512 513 if (getFlags().hasNoNaNs()) 514 OS << " nnan"; 515 516 if (getFlags().hasNoInfs()) 517 OS << " ninf"; 518 519 if (getFlags().hasNoSignedZeros()) 520 OS << " nsz"; 521 522 if (getFlags().hasAllowReciprocal()) 523 OS << " arcp"; 524 525 if (getFlags().hasAllowContract()) 526 OS << " contract"; 527 528 if (getFlags().hasApproximateFuncs()) 529 OS << " afn"; 530 531 if (getFlags().hasAllowReassociation()) 532 OS << " reassoc"; 533 534 if (getFlags().hasVectorReduction()) 535 OS << " vector-reduction"; 536 537 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 538 if (!MN->memoperands_empty()) { 539 OS << "<"; 540 OS << "Mem:"; 541 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 542 e = MN->memoperands_end(); i != e; ++i) { 543 printMemOperand(OS, **i, G); 544 if (std::next(i) != e) 545 OS << " "; 546 } 547 OS << ">"; 548 } 549 } else if (const ShuffleVectorSDNode *SVN = 550 dyn_cast<ShuffleVectorSDNode>(this)) { 551 OS << "<"; 552 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 553 int Idx = SVN->getMaskElt(i); 554 if (i) OS << ","; 555 if (Idx < 0) 556 OS << "u"; 557 else 558 OS << Idx; 559 } 560 OS << ">"; 561 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 562 OS << '<' << CSDN->getAPIntValue() << '>'; 563 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 564 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 565 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 566 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 567 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 568 else { 569 OS << "<APFloat("; 570 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 571 OS << ")>"; 572 } 573 } else if (const GlobalAddressSDNode *GADN = 574 dyn_cast<GlobalAddressSDNode>(this)) { 575 int64_t offset = GADN->getOffset(); 576 OS << '<'; 577 GADN->getGlobal()->printAsOperand(OS); 578 OS << '>'; 579 if (offset > 0) 580 OS << " + " << offset; 581 else 582 OS << " " << offset; 583 if (unsigned int TF = GADN->getTargetFlags()) 584 OS << " [TF=" << TF << ']'; 585 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 586 OS << "<" << FIDN->getIndex() << ">"; 587 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 588 OS << "<" << JTDN->getIndex() << ">"; 589 if (unsigned int TF = JTDN->getTargetFlags()) 590 OS << " [TF=" << TF << ']'; 591 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 592 int offset = CP->getOffset(); 593 if (CP->isMachineConstantPoolEntry()) 594 OS << "<" << *CP->getMachineCPVal() << ">"; 595 else 596 OS << "<" << *CP->getConstVal() << ">"; 597 if (offset > 0) 598 OS << " + " << offset; 599 else 600 OS << " " << offset; 601 if (unsigned int TF = CP->getTargetFlags()) 602 OS << " [TF=" << TF << ']'; 603 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 604 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 605 if (unsigned TF = TI->getTargetFlags()) 606 OS << " [TF=" << TF << ']'; 607 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 608 OS << "<"; 609 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 610 if (LBB) 611 OS << LBB->getName() << " "; 612 OS << (const void*)BBDN->getBasicBlock() << ">"; 613 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 614 OS << ' ' << printReg(R->getReg(), 615 G ? G->getSubtarget().getRegisterInfo() : nullptr); 616 } else if (const ExternalSymbolSDNode *ES = 617 dyn_cast<ExternalSymbolSDNode>(this)) { 618 OS << "'" << ES->getSymbol() << "'"; 619 if (unsigned int TF = ES->getTargetFlags()) 620 OS << " [TF=" << TF << ']'; 621 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 622 if (M->getValue()) 623 OS << "<" << M->getValue() << ">"; 624 else 625 OS << "<null>"; 626 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 627 if (MD->getMD()) 628 OS << "<" << MD->getMD() << ">"; 629 else 630 OS << "<null>"; 631 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 632 OS << ":" << N->getVT().getEVTString(); 633 } 634 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 635 OS << "<"; 636 637 printMemOperand(OS, *LD->getMemOperand(), G); 638 639 bool doExt = true; 640 switch (LD->getExtensionType()) { 641 default: doExt = false; break; 642 case ISD::EXTLOAD: OS << ", anyext"; break; 643 case ISD::SEXTLOAD: OS << ", sext"; break; 644 case ISD::ZEXTLOAD: OS << ", zext"; break; 645 } 646 if (doExt) 647 OS << " from " << LD->getMemoryVT().getEVTString(); 648 649 const char *AM = getIndexedModeName(LD->getAddressingMode()); 650 if (*AM) 651 OS << ", " << AM; 652 653 OS << ">"; 654 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 655 OS << "<"; 656 printMemOperand(OS, *ST->getMemOperand(), G); 657 658 if (ST->isTruncatingStore()) 659 OS << ", trunc to " << ST->getMemoryVT().getEVTString(); 660 661 const char *AM = getIndexedModeName(ST->getAddressingMode()); 662 if (*AM) 663 OS << ", " << AM; 664 665 OS << ">"; 666 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 667 OS << "<"; 668 669 printMemOperand(OS, *MLd->getMemOperand(), G); 670 671 bool doExt = true; 672 switch (MLd->getExtensionType()) { 673 default: doExt = false; break; 674 case ISD::EXTLOAD: OS << ", anyext"; break; 675 case ISD::SEXTLOAD: OS << ", sext"; break; 676 case ISD::ZEXTLOAD: OS << ", zext"; break; 677 } 678 if (doExt) 679 OS << " from " << MLd->getMemoryVT().getEVTString(); 680 681 if (MLd->isExpandingLoad()) 682 OS << ", expanding"; 683 684 OS << ">"; 685 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 686 OS << "<"; 687 printMemOperand(OS, *MSt->getMemOperand(), G); 688 689 if (MSt->isTruncatingStore()) 690 OS << ", trunc to " << MSt->getMemoryVT().getEVTString(); 691 692 if (MSt->isCompressingStore()) 693 OS << ", compressing"; 694 695 OS << ">"; 696 } else if (const MemSDNode* M = dyn_cast<MemSDNode>(this)) { 697 OS << "<"; 698 printMemOperand(OS, *M->getMemOperand(), G); 699 OS << ">"; 700 } else if (const BlockAddressSDNode *BA = 701 dyn_cast<BlockAddressSDNode>(this)) { 702 int64_t offset = BA->getOffset(); 703 OS << "<"; 704 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 705 OS << ", "; 706 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 707 OS << ">"; 708 if (offset > 0) 709 OS << " + " << offset; 710 else 711 OS << " " << offset; 712 if (unsigned int TF = BA->getTargetFlags()) 713 OS << " [TF=" << TF << ']'; 714 } else if (const AddrSpaceCastSDNode *ASC = 715 dyn_cast<AddrSpaceCastSDNode>(this)) { 716 OS << '[' 717 << ASC->getSrcAddressSpace() 718 << " -> " 719 << ASC->getDestAddressSpace() 720 << ']'; 721 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 722 if (LN->hasOffset()) 723 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 724 } 725 726 if (VerboseDAGDumping) { 727 if (unsigned Order = getIROrder()) 728 OS << " [ORD=" << Order << ']'; 729 730 if (getNodeId() != -1) 731 OS << " [ID=" << getNodeId() << ']'; 732 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 733 OS << " # D:" << isDivergent(); 734 735 if (G && !G->GetDbgValues(this).empty()) { 736 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 737 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 738 if (!Dbg->isInvalidated()) 739 Dbg->print(OS); 740 } else if (getHasDebugValue()) 741 OS << " [NoOfDbgValues>0]"; 742 } 743 } 744 745 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 746 OS << " DbgVal(Order=" << getOrder() << ')'; 747 if (isInvalidated()) OS << "(Invalidated)"; 748 if (isEmitted()) OS << "(Emitted)"; 749 switch (getKind()) { 750 case SDNODE: 751 if (getSDNode()) 752 OS << "(SDNODE=" << PrintNodeId(*getSDNode()) << ':' << getResNo() << ')'; 753 else 754 OS << "(SDNODE)"; 755 break; 756 case CONST: 757 OS << "(CONST)"; 758 break; 759 case FRAMEIX: 760 OS << "(FRAMEIX=" << getFrameIx() << ')'; 761 break; 762 case VREG: 763 OS << "(VREG=" << getVReg() << ')'; 764 break; 765 } 766 if (isIndirect()) OS << "(Indirect)"; 767 OS << ":\"" << Var->getName() << '"'; 768 #ifndef NDEBUG 769 if (Expr->getNumElements()) 770 Expr->dump(); 771 #endif 772 } 773 774 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 775 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 776 if (isInvalidated()) 777 return; 778 print(dbgs()); 779 dbgs() << "\n"; 780 } 781 #endif 782 783 /// Return true if this node is so simple that we should just print it inline 784 /// if it appears as an operand. 785 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 786 // Avoid lots of cluttering when inline printing nodes with associated 787 // DbgValues in verbose mode. 788 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 789 return false; 790 if (Node.getOpcode() == ISD::EntryToken) 791 return false; 792 return Node.getNumOperands() == 0; 793 } 794 795 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 796 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 797 for (const SDValue &Op : N->op_values()) { 798 if (shouldPrintInline(*Op.getNode(), G)) 799 continue; 800 if (Op.getNode()->hasOneUse()) 801 DumpNodes(Op.getNode(), indent+2, G); 802 } 803 804 dbgs().indent(indent); 805 N->dump(G); 806 } 807 808 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 809 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 810 811 for (allnodes_const_iterator I = allnodes_begin(), E = allnodes_end(); 812 I != E; ++I) { 813 const SDNode *N = &*I; 814 if (!N->hasOneUse() && N != getRoot().getNode() && 815 (!shouldPrintInline(*N, this) || N->use_empty())) 816 DumpNodes(N, 2, this); 817 } 818 819 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 820 dbgs() << "\n"; 821 822 if (VerboseDAGDumping) { 823 if (DbgBegin() != DbgEnd()) 824 dbgs() << "SDDbgValues:\n"; 825 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 826 Dbg->dump(); 827 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 828 dbgs() << "Byval SDDbgValues:\n"; 829 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 830 Dbg->dump(); 831 } 832 dbgs() << "\n"; 833 } 834 #endif 835 836 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 837 OS << PrintNodeId(*this) << ": "; 838 print_types(OS, G); 839 OS << " = " << getOperationName(G); 840 print_details(OS, G); 841 } 842 843 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 844 const SDValue Value) { 845 if (!Value.getNode()) { 846 OS << "<null>"; 847 return false; 848 } else if (shouldPrintInline(*Value.getNode(), G)) { 849 OS << Value->getOperationName(G) << ':'; 850 Value->print_types(OS, G); 851 Value->print_details(OS, G); 852 return true; 853 } else { 854 OS << PrintNodeId(*Value.getNode()); 855 if (unsigned RN = Value.getResNo()) 856 OS << ':' << RN; 857 return false; 858 } 859 } 860 861 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 862 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 863 864 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 865 const SelectionDAG *G, VisitedSDNodeSet &once) { 866 if (!once.insert(N).second) // If we've been here before, return now. 867 return; 868 869 // Dump the current SDNode, but don't end the line yet. 870 OS.indent(indent); 871 N->printr(OS, G); 872 873 // Having printed this SDNode, walk the children: 874 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 875 if (i) OS << ","; 876 OS << " "; 877 878 const SDValue Op = N->getOperand(i); 879 bool printedInline = printOperand(OS, G, Op); 880 if (printedInline) 881 once.insert(Op.getNode()); 882 } 883 884 OS << "\n"; 885 886 // Dump children that have grandchildren on their own line(s). 887 for (const SDValue &Op : N->op_values()) 888 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 889 } 890 891 LLVM_DUMP_METHOD void SDNode::dumpr() const { 892 VisitedSDNodeSet once; 893 DumpNodesr(dbgs(), this, 0, nullptr, once); 894 } 895 896 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 897 VisitedSDNodeSet once; 898 DumpNodesr(dbgs(), this, 0, G, once); 899 } 900 #endif 901 902 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 903 const SelectionDAG *G, unsigned depth, 904 unsigned indent) { 905 if (depth == 0) 906 return; 907 908 OS.indent(indent); 909 910 N->print(OS, G); 911 912 if (depth < 1) 913 return; 914 915 for (const SDValue &Op : N->op_values()) { 916 // Don't follow chain operands. 917 if (Op.getValueType() == MVT::Other) 918 continue; 919 OS << '\n'; 920 printrWithDepthHelper(OS, Op.getNode(), G, depth-1, indent+2); 921 } 922 } 923 924 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 925 unsigned depth) const { 926 printrWithDepthHelper(OS, this, G, depth, 0); 927 } 928 929 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 930 // Don't print impossibly deep things. 931 printrWithDepth(OS, G, 10); 932 } 933 934 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 935 LLVM_DUMP_METHOD 936 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 937 printrWithDepth(dbgs(), G, depth); 938 } 939 940 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 941 // Don't print impossibly deep things. 942 dumprWithDepth(G, 10); 943 } 944 #endif 945 946 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 947 printr(OS, G); 948 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 949 if (i) OS << ", "; else OS << " "; 950 printOperand(OS, G, getOperand(i)); 951 } 952 if (DebugLoc DL = getDebugLoc()) { 953 OS << ", "; 954 DL.print(OS); 955 } 956 } 957