1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This implements the SelectionDAG::dump method and friends. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "SDNodeDbgValue.h" 14 #include "llvm/ADT/APFloat.h" 15 #include "llvm/ADT/APInt.h" 16 #include "llvm/ADT/SmallPtrSet.h" 17 #include "llvm/ADT/StringExtras.h" 18 #include "llvm/CodeGen/ISDOpcodes.h" 19 #include "llvm/CodeGen/MachineBasicBlock.h" 20 #include "llvm/CodeGen/MachineConstantPool.h" 21 #include "llvm/CodeGen/MachineMemOperand.h" 22 #include "llvm/CodeGen/MachineValueType.h" 23 #include "llvm/CodeGen/SelectionDAG.h" 24 #include "llvm/CodeGen/SelectionDAGNodes.h" 25 #include "llvm/CodeGen/TargetInstrInfo.h" 26 #include "llvm/CodeGen/TargetLowering.h" 27 #include "llvm/CodeGen/TargetRegisterInfo.h" 28 #include "llvm/CodeGen/TargetSubtargetInfo.h" 29 #include "llvm/CodeGen/ValueTypes.h" 30 #include "llvm/Config/llvm-config.h" 31 #include "llvm/IR/BasicBlock.h" 32 #include "llvm/IR/Constants.h" 33 #include "llvm/IR/DebugInfoMetadata.h" 34 #include "llvm/IR/DebugLoc.h" 35 #include "llvm/IR/Function.h" 36 #include "llvm/IR/Intrinsics.h" 37 #include "llvm/IR/ModuleSlotTracker.h" 38 #include "llvm/IR/Value.h" 39 #include "llvm/Support/Casting.h" 40 #include "llvm/Support/CommandLine.h" 41 #include "llvm/Support/Compiler.h" 42 #include "llvm/Support/Debug.h" 43 #include "llvm/Support/ErrorHandling.h" 44 #include "llvm/Support/Printable.h" 45 #include "llvm/Support/raw_ostream.h" 46 #include "llvm/Target/TargetIntrinsicInfo.h" 47 #include "llvm/Target/TargetMachine.h" 48 #include <cstdint> 49 #include <iterator> 50 51 using namespace llvm; 52 53 static cl::opt<bool> 54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden, 55 cl::desc("Display more information when dumping selection " 56 "DAG nodes.")); 57 58 std::string SDNode::getOperationName(const SelectionDAG *G) const { 59 switch (getOpcode()) { 60 default: 61 if (getOpcode() < ISD::BUILTIN_OP_END) 62 return "<<Unknown DAG Node>>"; 63 if (isMachineOpcode()) { 64 if (G) 65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo()) 66 if (getMachineOpcode() < TII->getNumOpcodes()) 67 return std::string(TII->getName(getMachineOpcode())); 68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>"; 69 } 70 if (G) { 71 const TargetLowering &TLI = G->getTargetLoweringInfo(); 72 const char *Name = TLI.getTargetNodeName(getOpcode()); 73 if (Name) return Name; 74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>"; 75 } 76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>"; 77 78 #ifndef NDEBUG 79 case ISD::DELETED_NODE: return "<<Deleted Node!>>"; 80 #endif 81 case ISD::PREFETCH: return "Prefetch"; 82 case ISD::MEMBARRIER: return "MemBarrier"; 83 case ISD::ATOMIC_FENCE: return "AtomicFence"; 84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap"; 85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess"; 86 case ISD::ATOMIC_SWAP: return "AtomicSwap"; 87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd"; 88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub"; 89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd"; 90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr"; 91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr"; 92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor"; 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; 94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin"; 95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax"; 96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin"; 97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax"; 98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd"; 99 case ISD::ATOMIC_LOAD_UINC_WRAP: 100 return "AtomicLoadUIncWrap"; 101 case ISD::ATOMIC_LOAD_UDEC_WRAP: 102 return "AtomicLoadUDecWrap"; 103 case ISD::ATOMIC_LOAD: return "AtomicLoad"; 104 case ISD::ATOMIC_STORE: return "AtomicStore"; 105 case ISD::PCMARKER: return "PCMarker"; 106 case ISD::READCYCLECOUNTER: return "ReadCycleCounter"; 107 case ISD::SRCVALUE: return "SrcValue"; 108 case ISD::MDNODE_SDNODE: return "MDNode"; 109 case ISD::EntryToken: return "EntryToken"; 110 case ISD::TokenFactor: return "TokenFactor"; 111 case ISD::AssertSext: return "AssertSext"; 112 case ISD::AssertZext: return "AssertZext"; 113 case ISD::AssertAlign: return "AssertAlign"; 114 115 case ISD::BasicBlock: return "BasicBlock"; 116 case ISD::VALUETYPE: return "ValueType"; 117 case ISD::Register: return "Register"; 118 case ISD::RegisterMask: return "RegisterMask"; 119 case ISD::Constant: 120 if (cast<ConstantSDNode>(this)->isOpaque()) 121 return "OpaqueConstant"; 122 return "Constant"; 123 case ISD::ConstantFP: return "ConstantFP"; 124 case ISD::GlobalAddress: return "GlobalAddress"; 125 case ISD::GlobalTLSAddress: return "GlobalTLSAddress"; 126 case ISD::FrameIndex: return "FrameIndex"; 127 case ISD::JumpTable: return "JumpTable"; 128 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE"; 129 case ISD::RETURNADDR: return "RETURNADDR"; 130 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR"; 131 case ISD::FRAMEADDR: return "FRAMEADDR"; 132 case ISD::SPONENTRY: return "SPONENTRY"; 133 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER"; 134 case ISD::READ_REGISTER: return "READ_REGISTER"; 135 case ISD::WRITE_REGISTER: return "WRITE_REGISTER"; 136 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET"; 137 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA"; 138 case ISD::EH_RETURN: return "EH_RETURN"; 139 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP"; 140 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP"; 141 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH"; 142 case ISD::ConstantPool: return "ConstantPool"; 143 case ISD::TargetIndex: return "TargetIndex"; 144 case ISD::ExternalSymbol: return "ExternalSymbol"; 145 case ISD::BlockAddress: return "BlockAddress"; 146 case ISD::INTRINSIC_WO_CHAIN: 147 case ISD::INTRINSIC_VOID: 148 case ISD::INTRINSIC_W_CHAIN: { 149 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1; 150 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue(); 151 if (IID < Intrinsic::num_intrinsics) 152 return Intrinsic::getBaseName((Intrinsic::ID)IID).str(); 153 if (!G) 154 return "Unknown intrinsic"; 155 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo()) 156 return TII->getName(IID); 157 llvm_unreachable("Invalid intrinsic ID"); 158 } 159 160 case ISD::BUILD_VECTOR: return "BUILD_VECTOR"; 161 case ISD::TargetConstant: 162 if (cast<ConstantSDNode>(this)->isOpaque()) 163 return "OpaqueTargetConstant"; 164 return "TargetConstant"; 165 case ISD::TargetConstantFP: return "TargetConstantFP"; 166 case ISD::TargetGlobalAddress: return "TargetGlobalAddress"; 167 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress"; 168 case ISD::TargetFrameIndex: return "TargetFrameIndex"; 169 case ISD::TargetJumpTable: return "TargetJumpTable"; 170 case ISD::TargetConstantPool: return "TargetConstantPool"; 171 case ISD::TargetExternalSymbol: return "TargetExternalSymbol"; 172 case ISD::MCSymbol: return "MCSymbol"; 173 case ISD::TargetBlockAddress: return "TargetBlockAddress"; 174 175 case ISD::CopyToReg: return "CopyToReg"; 176 case ISD::CopyFromReg: return "CopyFromReg"; 177 case ISD::UNDEF: return "undef"; 178 case ISD::VSCALE: return "vscale"; 179 case ISD::MERGE_VALUES: return "merge_values"; 180 case ISD::INLINEASM: return "inlineasm"; 181 case ISD::INLINEASM_BR: return "inlineasm_br"; 182 case ISD::EH_LABEL: return "eh_label"; 183 case ISD::ANNOTATION_LABEL: return "annotation_label"; 184 case ISD::HANDLENODE: return "handlenode"; 185 186 // Unary operators 187 case ISD::FABS: return "fabs"; 188 case ISD::FMINNUM: return "fminnum"; 189 case ISD::STRICT_FMINNUM: return "strict_fminnum"; 190 case ISD::FMAXNUM: return "fmaxnum"; 191 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum"; 192 case ISD::FMINNUM_IEEE: return "fminnum_ieee"; 193 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee"; 194 case ISD::FMINIMUM: return "fminimum"; 195 case ISD::STRICT_FMINIMUM: return "strict_fminimum"; 196 case ISD::FMAXIMUM: return "fmaximum"; 197 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum"; 198 case ISD::FNEG: return "fneg"; 199 case ISD::FSQRT: return "fsqrt"; 200 case ISD::STRICT_FSQRT: return "strict_fsqrt"; 201 case ISD::FCBRT: return "fcbrt"; 202 case ISD::FSIN: return "fsin"; 203 case ISD::STRICT_FSIN: return "strict_fsin"; 204 case ISD::FCOS: return "fcos"; 205 case ISD::STRICT_FCOS: return "strict_fcos"; 206 case ISD::FSINCOS: return "fsincos"; 207 case ISD::FTRUNC: return "ftrunc"; 208 case ISD::STRICT_FTRUNC: return "strict_ftrunc"; 209 case ISD::FFLOOR: return "ffloor"; 210 case ISD::STRICT_FFLOOR: return "strict_ffloor"; 211 case ISD::FCEIL: return "fceil"; 212 case ISD::STRICT_FCEIL: return "strict_fceil"; 213 case ISD::FRINT: return "frint"; 214 case ISD::STRICT_FRINT: return "strict_frint"; 215 case ISD::FNEARBYINT: return "fnearbyint"; 216 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint"; 217 case ISD::FROUND: return "fround"; 218 case ISD::STRICT_FROUND: return "strict_fround"; 219 case ISD::FROUNDEVEN: return "froundeven"; 220 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven"; 221 case ISD::FEXP: return "fexp"; 222 case ISD::STRICT_FEXP: return "strict_fexp"; 223 case ISD::FEXP2: return "fexp2"; 224 case ISD::STRICT_FEXP2: return "strict_fexp2"; 225 case ISD::FLOG: return "flog"; 226 case ISD::STRICT_FLOG: return "strict_flog"; 227 case ISD::FLOG2: return "flog2"; 228 case ISD::STRICT_FLOG2: return "strict_flog2"; 229 case ISD::FLOG10: return "flog10"; 230 case ISD::STRICT_FLOG10: return "strict_flog10"; 231 232 // Binary operators 233 case ISD::ADD: return "add"; 234 case ISD::SUB: return "sub"; 235 case ISD::MUL: return "mul"; 236 case ISD::MULHU: return "mulhu"; 237 case ISD::MULHS: return "mulhs"; 238 case ISD::AVGFLOORU: return "avgflooru"; 239 case ISD::AVGFLOORS: return "avgfloors"; 240 case ISD::AVGCEILU: return "avgceilu"; 241 case ISD::AVGCEILS: return "avgceils"; 242 case ISD::ABDS: return "abds"; 243 case ISD::ABDU: return "abdu"; 244 case ISD::SDIV: return "sdiv"; 245 case ISD::UDIV: return "udiv"; 246 case ISD::SREM: return "srem"; 247 case ISD::UREM: return "urem"; 248 case ISD::SMUL_LOHI: return "smul_lohi"; 249 case ISD::UMUL_LOHI: return "umul_lohi"; 250 case ISD::SDIVREM: return "sdivrem"; 251 case ISD::UDIVREM: return "udivrem"; 252 case ISD::AND: return "and"; 253 case ISD::OR: return "or"; 254 case ISD::XOR: return "xor"; 255 case ISD::SHL: return "shl"; 256 case ISD::SRA: return "sra"; 257 case ISD::SRL: return "srl"; 258 case ISD::ROTL: return "rotl"; 259 case ISD::ROTR: return "rotr"; 260 case ISD::FSHL: return "fshl"; 261 case ISD::FSHR: return "fshr"; 262 case ISD::FADD: return "fadd"; 263 case ISD::STRICT_FADD: return "strict_fadd"; 264 case ISD::FSUB: return "fsub"; 265 case ISD::STRICT_FSUB: return "strict_fsub"; 266 case ISD::FMUL: return "fmul"; 267 case ISD::STRICT_FMUL: return "strict_fmul"; 268 case ISD::FDIV: return "fdiv"; 269 case ISD::STRICT_FDIV: return "strict_fdiv"; 270 case ISD::FMA: return "fma"; 271 case ISD::STRICT_FMA: return "strict_fma"; 272 case ISD::FMAD: return "fmad"; 273 case ISD::FREM: return "frem"; 274 case ISD::STRICT_FREM: return "strict_frem"; 275 case ISD::FCOPYSIGN: return "fcopysign"; 276 case ISD::FGETSIGN: return "fgetsign"; 277 case ISD::FCANONICALIZE: return "fcanonicalize"; 278 case ISD::IS_FPCLASS: return "is_fpclass"; 279 case ISD::FPOW: return "fpow"; 280 case ISD::STRICT_FPOW: return "strict_fpow"; 281 case ISD::SMIN: return "smin"; 282 case ISD::SMAX: return "smax"; 283 case ISD::UMIN: return "umin"; 284 case ISD::UMAX: return "umax"; 285 286 case ISD::FLDEXP: return "fldexp"; 287 case ISD::STRICT_FLDEXP: return "strict_fldexp"; 288 case ISD::FFREXP: return "ffrexp"; 289 case ISD::FPOWI: return "fpowi"; 290 case ISD::STRICT_FPOWI: return "strict_fpowi"; 291 case ISD::SETCC: return "setcc"; 292 case ISD::SETCCCARRY: return "setcccarry"; 293 case ISD::STRICT_FSETCC: return "strict_fsetcc"; 294 case ISD::STRICT_FSETCCS: return "strict_fsetccs"; 295 case ISD::SELECT: return "select"; 296 case ISD::VSELECT: return "vselect"; 297 case ISD::SELECT_CC: return "select_cc"; 298 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt"; 299 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt"; 300 case ISD::CONCAT_VECTORS: return "concat_vectors"; 301 case ISD::INSERT_SUBVECTOR: return "insert_subvector"; 302 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector"; 303 case ISD::VECTOR_DEINTERLEAVE: return "vector_deinterleave"; 304 case ISD::VECTOR_INTERLEAVE: return "vector_interleave"; 305 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector"; 306 case ISD::VECTOR_SHUFFLE: return "vector_shuffle"; 307 case ISD::VECTOR_SPLICE: return "vector_splice"; 308 case ISD::SPLAT_VECTOR: return "splat_vector"; 309 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts"; 310 case ISD::VECTOR_REVERSE: return "vector_reverse"; 311 case ISD::STEP_VECTOR: return "step_vector"; 312 case ISD::CARRY_FALSE: return "carry_false"; 313 case ISD::ADDC: return "addc"; 314 case ISD::ADDE: return "adde"; 315 case ISD::UADDO_CARRY: return "uaddo_carry"; 316 case ISD::SADDO_CARRY: return "saddo_carry"; 317 case ISD::SADDO: return "saddo"; 318 case ISD::UADDO: return "uaddo"; 319 case ISD::SSUBO: return "ssubo"; 320 case ISD::USUBO: return "usubo"; 321 case ISD::SMULO: return "smulo"; 322 case ISD::UMULO: return "umulo"; 323 case ISD::SUBC: return "subc"; 324 case ISD::SUBE: return "sube"; 325 case ISD::USUBO_CARRY: return "usubo_carry"; 326 case ISD::SSUBO_CARRY: return "ssubo_carry"; 327 case ISD::SHL_PARTS: return "shl_parts"; 328 case ISD::SRA_PARTS: return "sra_parts"; 329 case ISD::SRL_PARTS: return "srl_parts"; 330 331 case ISD::SADDSAT: return "saddsat"; 332 case ISD::UADDSAT: return "uaddsat"; 333 case ISD::SSUBSAT: return "ssubsat"; 334 case ISD::USUBSAT: return "usubsat"; 335 case ISD::SSHLSAT: return "sshlsat"; 336 case ISD::USHLSAT: return "ushlsat"; 337 338 case ISD::SMULFIX: return "smulfix"; 339 case ISD::SMULFIXSAT: return "smulfixsat"; 340 case ISD::UMULFIX: return "umulfix"; 341 case ISD::UMULFIXSAT: return "umulfixsat"; 342 343 case ISD::SDIVFIX: return "sdivfix"; 344 case ISD::SDIVFIXSAT: return "sdivfixsat"; 345 case ISD::UDIVFIX: return "udivfix"; 346 case ISD::UDIVFIXSAT: return "udivfixsat"; 347 348 // Conversion operators. 349 case ISD::SIGN_EXTEND: return "sign_extend"; 350 case ISD::ZERO_EXTEND: return "zero_extend"; 351 case ISD::ANY_EXTEND: return "any_extend"; 352 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg"; 353 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg"; 354 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg"; 355 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg"; 356 case ISD::TRUNCATE: return "truncate"; 357 case ISD::FP_ROUND: return "fp_round"; 358 case ISD::STRICT_FP_ROUND: return "strict_fp_round"; 359 case ISD::FP_EXTEND: return "fp_extend"; 360 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend"; 361 362 case ISD::SINT_TO_FP: return "sint_to_fp"; 363 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp"; 364 case ISD::UINT_TO_FP: return "uint_to_fp"; 365 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp"; 366 case ISD::FP_TO_SINT: return "fp_to_sint"; 367 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint"; 368 case ISD::FP_TO_UINT: return "fp_to_uint"; 369 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint"; 370 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat"; 371 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat"; 372 case ISD::BITCAST: return "bitcast"; 373 case ISD::ADDRSPACECAST: return "addrspacecast"; 374 case ISD::FP16_TO_FP: return "fp16_to_fp"; 375 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp"; 376 case ISD::FP_TO_FP16: return "fp_to_fp16"; 377 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16"; 378 case ISD::BF16_TO_FP: return "bf16_to_fp"; 379 case ISD::FP_TO_BF16: return "fp_to_bf16"; 380 case ISD::LROUND: return "lround"; 381 case ISD::STRICT_LROUND: return "strict_lround"; 382 case ISD::LLROUND: return "llround"; 383 case ISD::STRICT_LLROUND: return "strict_llround"; 384 case ISD::LRINT: return "lrint"; 385 case ISD::STRICT_LRINT: return "strict_lrint"; 386 case ISD::LLRINT: return "llrint"; 387 case ISD::STRICT_LLRINT: return "strict_llrint"; 388 389 // Control flow instructions 390 case ISD::BR: return "br"; 391 case ISD::BRIND: return "brind"; 392 case ISD::BR_JT: return "br_jt"; 393 case ISD::BRCOND: return "brcond"; 394 case ISD::BR_CC: return "br_cc"; 395 case ISD::CALLSEQ_START: return "callseq_start"; 396 case ISD::CALLSEQ_END: return "callseq_end"; 397 398 // EH instructions 399 case ISD::CATCHRET: return "catchret"; 400 case ISD::CLEANUPRET: return "cleanupret"; 401 402 // Other operators 403 case ISD::LOAD: return "load"; 404 case ISD::STORE: return "store"; 405 case ISD::MLOAD: return "masked_load"; 406 case ISD::MSTORE: return "masked_store"; 407 case ISD::MGATHER: return "masked_gather"; 408 case ISD::MSCATTER: return "masked_scatter"; 409 case ISD::VAARG: return "vaarg"; 410 case ISD::VACOPY: return "vacopy"; 411 case ISD::VAEND: return "vaend"; 412 case ISD::VASTART: return "vastart"; 413 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc"; 414 case ISD::EXTRACT_ELEMENT: return "extract_element"; 415 case ISD::BUILD_PAIR: return "build_pair"; 416 case ISD::STACKSAVE: return "stacksave"; 417 case ISD::STACKRESTORE: return "stackrestore"; 418 case ISD::TRAP: return "trap"; 419 case ISD::DEBUGTRAP: return "debugtrap"; 420 case ISD::UBSANTRAP: return "ubsantrap"; 421 case ISD::LIFETIME_START: return "lifetime.start"; 422 case ISD::LIFETIME_END: return "lifetime.end"; 423 case ISD::PSEUDO_PROBE: 424 return "pseudoprobe"; 425 case ISD::GC_TRANSITION_START: return "gc_transition.start"; 426 case ISD::GC_TRANSITION_END: return "gc_transition.end"; 427 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset"; 428 case ISD::FREEZE: return "freeze"; 429 case ISD::PREALLOCATED_SETUP: 430 return "call_setup"; 431 case ISD::PREALLOCATED_ARG: 432 return "call_alloc"; 433 434 // Floating point environment manipulation 435 case ISD::GET_ROUNDING: return "get_rounding"; 436 case ISD::SET_ROUNDING: return "set_rounding"; 437 case ISD::GET_FPENV: return "get_fpenv"; 438 case ISD::SET_FPENV: return "set_fpenv"; 439 case ISD::RESET_FPENV: return "reset_fpenv"; 440 case ISD::GET_FPENV_MEM: return "get_fpenv_mem"; 441 case ISD::SET_FPENV_MEM: return "set_fpenv_mem"; 442 443 // Bit manipulation 444 case ISD::ABS: return "abs"; 445 case ISD::BITREVERSE: return "bitreverse"; 446 case ISD::BSWAP: return "bswap"; 447 case ISD::CTPOP: return "ctpop"; 448 case ISD::CTTZ: return "cttz"; 449 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef"; 450 case ISD::CTLZ: return "ctlz"; 451 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef"; 452 case ISD::PARITY: return "parity"; 453 454 // Trampolines 455 case ISD::INIT_TRAMPOLINE: return "init_trampoline"; 456 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline"; 457 458 case ISD::CONDCODE: 459 switch (cast<CondCodeSDNode>(this)->get()) { 460 default: llvm_unreachable("Unknown setcc condition!"); 461 case ISD::SETOEQ: return "setoeq"; 462 case ISD::SETOGT: return "setogt"; 463 case ISD::SETOGE: return "setoge"; 464 case ISD::SETOLT: return "setolt"; 465 case ISD::SETOLE: return "setole"; 466 case ISD::SETONE: return "setone"; 467 468 case ISD::SETO: return "seto"; 469 case ISD::SETUO: return "setuo"; 470 case ISD::SETUEQ: return "setueq"; 471 case ISD::SETUGT: return "setugt"; 472 case ISD::SETUGE: return "setuge"; 473 case ISD::SETULT: return "setult"; 474 case ISD::SETULE: return "setule"; 475 case ISD::SETUNE: return "setune"; 476 477 case ISD::SETEQ: return "seteq"; 478 case ISD::SETGT: return "setgt"; 479 case ISD::SETGE: return "setge"; 480 case ISD::SETLT: return "setlt"; 481 case ISD::SETLE: return "setle"; 482 case ISD::SETNE: return "setne"; 483 484 case ISD::SETTRUE: return "settrue"; 485 case ISD::SETTRUE2: return "settrue2"; 486 case ISD::SETFALSE: return "setfalse"; 487 case ISD::SETFALSE2: return "setfalse2"; 488 } 489 case ISD::VECREDUCE_FADD: return "vecreduce_fadd"; 490 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd"; 491 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul"; 492 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul"; 493 case ISD::VECREDUCE_ADD: return "vecreduce_add"; 494 case ISD::VECREDUCE_MUL: return "vecreduce_mul"; 495 case ISD::VECREDUCE_AND: return "vecreduce_and"; 496 case ISD::VECREDUCE_OR: return "vecreduce_or"; 497 case ISD::VECREDUCE_XOR: return "vecreduce_xor"; 498 case ISD::VECREDUCE_SMAX: return "vecreduce_smax"; 499 case ISD::VECREDUCE_SMIN: return "vecreduce_smin"; 500 case ISD::VECREDUCE_UMAX: return "vecreduce_umax"; 501 case ISD::VECREDUCE_UMIN: return "vecreduce_umin"; 502 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax"; 503 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin"; 504 case ISD::VECREDUCE_FMAXIMUM: return "vecreduce_fmaximum"; 505 case ISD::VECREDUCE_FMINIMUM: return "vecreduce_fminimum"; 506 case ISD::STACKMAP: 507 return "stackmap"; 508 case ISD::PATCHPOINT: 509 return "patchpoint"; 510 511 // Vector Predication 512 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \ 513 case ISD::SDID: \ 514 return #NAME; 515 #include "llvm/IR/VPIntrinsics.def" 516 } 517 } 518 519 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) { 520 switch (AM) { 521 default: return ""; 522 case ISD::PRE_INC: return "<pre-inc>"; 523 case ISD::PRE_DEC: return "<pre-dec>"; 524 case ISD::POST_INC: return "<post-inc>"; 525 case ISD::POST_DEC: return "<post-dec>"; 526 } 527 } 528 529 static Printable PrintNodeId(const SDNode &Node) { 530 return Printable([&Node](raw_ostream &OS) { 531 #ifndef NDEBUG 532 OS << 't' << Node.PersistentId; 533 #else 534 OS << (const void*)&Node; 535 #endif 536 }); 537 } 538 539 // Print the MMO with more information from the SelectionDAG. 540 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 541 const MachineFunction *MF, const Module *M, 542 const MachineFrameInfo *MFI, 543 const TargetInstrInfo *TII, LLVMContext &Ctx) { 544 ModuleSlotTracker MST(M); 545 if (MF) 546 MST.incorporateFunction(MF->getFunction()); 547 SmallVector<StringRef, 0> SSNs; 548 MMO.print(OS, MST, SSNs, Ctx, MFI, TII); 549 } 550 551 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO, 552 const SelectionDAG *G) { 553 if (G) { 554 const MachineFunction *MF = &G->getMachineFunction(); 555 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(), 556 &MF->getFrameInfo(), 557 G->getSubtarget().getInstrInfo(), *G->getContext()); 558 } 559 560 LLVMContext Ctx; 561 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr, 562 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx); 563 } 564 565 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 566 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); } 567 568 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const { 569 print(dbgs(), G); 570 dbgs() << '\n'; 571 } 572 #endif 573 574 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const { 575 for (unsigned i = 0, e = getNumValues(); i != e; ++i) { 576 if (i) OS << ","; 577 if (getValueType(i) == MVT::Other) 578 OS << "ch"; 579 else 580 OS << getValueType(i).getEVTString(); 581 } 582 } 583 584 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const { 585 if (getFlags().hasNoUnsignedWrap()) 586 OS << " nuw"; 587 588 if (getFlags().hasNoSignedWrap()) 589 OS << " nsw"; 590 591 if (getFlags().hasExact()) 592 OS << " exact"; 593 594 if (getFlags().hasNoNaNs()) 595 OS << " nnan"; 596 597 if (getFlags().hasNoInfs()) 598 OS << " ninf"; 599 600 if (getFlags().hasNoSignedZeros()) 601 OS << " nsz"; 602 603 if (getFlags().hasAllowReciprocal()) 604 OS << " arcp"; 605 606 if (getFlags().hasAllowContract()) 607 OS << " contract"; 608 609 if (getFlags().hasApproximateFuncs()) 610 OS << " afn"; 611 612 if (getFlags().hasAllowReassociation()) 613 OS << " reassoc"; 614 615 if (getFlags().hasNoFPExcept()) 616 OS << " nofpexcept"; 617 618 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) { 619 if (!MN->memoperands_empty()) { 620 OS << "<"; 621 OS << "Mem:"; 622 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(), 623 e = MN->memoperands_end(); i != e; ++i) { 624 printMemOperand(OS, **i, G); 625 if (std::next(i) != e) 626 OS << " "; 627 } 628 OS << ">"; 629 } 630 } else if (const ShuffleVectorSDNode *SVN = 631 dyn_cast<ShuffleVectorSDNode>(this)) { 632 OS << "<"; 633 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) { 634 int Idx = SVN->getMaskElt(i); 635 if (i) OS << ","; 636 if (Idx < 0) 637 OS << "u"; 638 else 639 OS << Idx; 640 } 641 OS << ">"; 642 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) { 643 OS << '<' << CSDN->getAPIntValue() << '>'; 644 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) { 645 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle()) 646 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>'; 647 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble()) 648 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>'; 649 else { 650 OS << "<APFloat("; 651 CSDN->getValueAPF().bitcastToAPInt().print(OS, false); 652 OS << ")>"; 653 } 654 } else if (const GlobalAddressSDNode *GADN = 655 dyn_cast<GlobalAddressSDNode>(this)) { 656 int64_t offset = GADN->getOffset(); 657 OS << '<'; 658 GADN->getGlobal()->printAsOperand(OS); 659 OS << '>'; 660 if (offset > 0) 661 OS << " + " << offset; 662 else 663 OS << " " << offset; 664 if (unsigned int TF = GADN->getTargetFlags()) 665 OS << " [TF=" << TF << ']'; 666 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) { 667 OS << "<" << FIDN->getIndex() << ">"; 668 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) { 669 OS << "<" << JTDN->getIndex() << ">"; 670 if (unsigned int TF = JTDN->getTargetFlags()) 671 OS << " [TF=" << TF << ']'; 672 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){ 673 int offset = CP->getOffset(); 674 if (CP->isMachineConstantPoolEntry()) 675 OS << "<" << *CP->getMachineCPVal() << ">"; 676 else 677 OS << "<" << *CP->getConstVal() << ">"; 678 if (offset > 0) 679 OS << " + " << offset; 680 else 681 OS << " " << offset; 682 if (unsigned int TF = CP->getTargetFlags()) 683 OS << " [TF=" << TF << ']'; 684 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) { 685 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">"; 686 if (unsigned TF = TI->getTargetFlags()) 687 OS << " [TF=" << TF << ']'; 688 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) { 689 OS << "<"; 690 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); 691 if (LBB) 692 OS << LBB->getName() << " "; 693 OS << (const void*)BBDN->getBasicBlock() << ">"; 694 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) { 695 OS << ' ' << printReg(R->getReg(), 696 G ? G->getSubtarget().getRegisterInfo() : nullptr); 697 } else if (const ExternalSymbolSDNode *ES = 698 dyn_cast<ExternalSymbolSDNode>(this)) { 699 OS << "'" << ES->getSymbol() << "'"; 700 if (unsigned int TF = ES->getTargetFlags()) 701 OS << " [TF=" << TF << ']'; 702 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) { 703 if (M->getValue()) 704 OS << "<" << M->getValue() << ">"; 705 else 706 OS << "<null>"; 707 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) { 708 if (MD->getMD()) 709 OS << "<" << MD->getMD() << ">"; 710 else 711 OS << "<null>"; 712 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) { 713 OS << ":" << N->getVT(); 714 } 715 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) { 716 OS << "<"; 717 718 printMemOperand(OS, *LD->getMemOperand(), G); 719 720 bool doExt = true; 721 switch (LD->getExtensionType()) { 722 default: doExt = false; break; 723 case ISD::EXTLOAD: OS << ", anyext"; break; 724 case ISD::SEXTLOAD: OS << ", sext"; break; 725 case ISD::ZEXTLOAD: OS << ", zext"; break; 726 } 727 if (doExt) 728 OS << " from " << LD->getMemoryVT(); 729 730 const char *AM = getIndexedModeName(LD->getAddressingMode()); 731 if (*AM) 732 OS << ", " << AM; 733 734 OS << ">"; 735 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) { 736 OS << "<"; 737 printMemOperand(OS, *ST->getMemOperand(), G); 738 739 if (ST->isTruncatingStore()) 740 OS << ", trunc to " << ST->getMemoryVT(); 741 742 const char *AM = getIndexedModeName(ST->getAddressingMode()); 743 if (*AM) 744 OS << ", " << AM; 745 746 OS << ">"; 747 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) { 748 OS << "<"; 749 750 printMemOperand(OS, *MLd->getMemOperand(), G); 751 752 bool doExt = true; 753 switch (MLd->getExtensionType()) { 754 default: doExt = false; break; 755 case ISD::EXTLOAD: OS << ", anyext"; break; 756 case ISD::SEXTLOAD: OS << ", sext"; break; 757 case ISD::ZEXTLOAD: OS << ", zext"; break; 758 } 759 if (doExt) 760 OS << " from " << MLd->getMemoryVT(); 761 762 const char *AM = getIndexedModeName(MLd->getAddressingMode()); 763 if (*AM) 764 OS << ", " << AM; 765 766 if (MLd->isExpandingLoad()) 767 OS << ", expanding"; 768 769 OS << ">"; 770 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) { 771 OS << "<"; 772 printMemOperand(OS, *MSt->getMemOperand(), G); 773 774 if (MSt->isTruncatingStore()) 775 OS << ", trunc to " << MSt->getMemoryVT(); 776 777 const char *AM = getIndexedModeName(MSt->getAddressingMode()); 778 if (*AM) 779 OS << ", " << AM; 780 781 if (MSt->isCompressingStore()) 782 OS << ", compressing"; 783 784 OS << ">"; 785 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) { 786 OS << "<"; 787 printMemOperand(OS, *MGather->getMemOperand(), G); 788 789 bool doExt = true; 790 switch (MGather->getExtensionType()) { 791 default: doExt = false; break; 792 case ISD::EXTLOAD: OS << ", anyext"; break; 793 case ISD::SEXTLOAD: OS << ", sext"; break; 794 case ISD::ZEXTLOAD: OS << ", zext"; break; 795 } 796 if (doExt) 797 OS << " from " << MGather->getMemoryVT(); 798 799 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned"; 800 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled"; 801 OS << ", " << Signed << " " << Scaled << " offset"; 802 803 OS << ">"; 804 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) { 805 OS << "<"; 806 printMemOperand(OS, *MScatter->getMemOperand(), G); 807 808 if (MScatter->isTruncatingStore()) 809 OS << ", trunc to " << MScatter->getMemoryVT(); 810 811 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned"; 812 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled"; 813 OS << ", " << Signed << " " << Scaled << " offset"; 814 815 OS << ">"; 816 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) { 817 OS << "<"; 818 printMemOperand(OS, *M->getMemOperand(), G); 819 OS << ">"; 820 } else if (const BlockAddressSDNode *BA = 821 dyn_cast<BlockAddressSDNode>(this)) { 822 int64_t offset = BA->getOffset(); 823 OS << "<"; 824 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false); 825 OS << ", "; 826 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false); 827 OS << ">"; 828 if (offset > 0) 829 OS << " + " << offset; 830 else 831 OS << " " << offset; 832 if (unsigned int TF = BA->getTargetFlags()) 833 OS << " [TF=" << TF << ']'; 834 } else if (const AddrSpaceCastSDNode *ASC = 835 dyn_cast<AddrSpaceCastSDNode>(this)) { 836 OS << '[' 837 << ASC->getSrcAddressSpace() 838 << " -> " 839 << ASC->getDestAddressSpace() 840 << ']'; 841 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) { 842 if (LN->hasOffset()) 843 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">"; 844 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) { 845 OS << '<' << AA->getAlign().value() << '>'; 846 } 847 848 if (VerboseDAGDumping) { 849 if (unsigned Order = getIROrder()) 850 OS << " [ORD=" << Order << ']'; 851 852 if (getNodeId() != -1) 853 OS << " [ID=" << getNodeId() << ']'; 854 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this)))) 855 OS << " # D:" << isDivergent(); 856 857 if (G && !G->GetDbgValues(this).empty()) { 858 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']'; 859 for (SDDbgValue *Dbg : G->GetDbgValues(this)) 860 if (!Dbg->isInvalidated()) 861 Dbg->print(OS); 862 } else if (getHasDebugValue()) 863 OS << " [NoOfDbgValues>0]"; 864 865 if (const auto *MD = G ? G->getPCSections(this) : nullptr) { 866 OS << " [pcsections "; 867 MD->printAsOperand(OS, G->getMachineFunction().getFunction().getParent()); 868 OS << ']'; 869 } 870 } 871 } 872 873 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const { 874 OS << " DbgVal(Order=" << getOrder() << ')'; 875 if (isInvalidated()) 876 OS << "(Invalidated)"; 877 if (isEmitted()) 878 OS << "(Emitted)"; 879 OS << "("; 880 bool Comma = false; 881 for (const SDDbgOperand &Op : getLocationOps()) { 882 if (Comma) 883 OS << ", "; 884 switch (Op.getKind()) { 885 case SDDbgOperand::SDNODE: 886 if (Op.getSDNode()) 887 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo(); 888 else 889 OS << "SDNODE"; 890 break; 891 case SDDbgOperand::CONST: 892 OS << "CONST"; 893 break; 894 case SDDbgOperand::FRAMEIX: 895 OS << "FRAMEIX=" << Op.getFrameIx(); 896 break; 897 case SDDbgOperand::VREG: 898 OS << "VREG=" << Op.getVReg(); 899 break; 900 } 901 Comma = true; 902 } 903 OS << ")"; 904 if (isIndirect()) OS << "(Indirect)"; 905 if (isVariadic()) 906 OS << "(Variadic)"; 907 OS << ":\"" << Var->getName() << '"'; 908 #ifndef NDEBUG 909 if (Expr->getNumElements()) 910 Expr->dump(); 911 #endif 912 } 913 914 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 915 LLVM_DUMP_METHOD void SDDbgValue::dump() const { 916 if (isInvalidated()) 917 return; 918 print(dbgs()); 919 dbgs() << "\n"; 920 } 921 #endif 922 923 /// Return true if this node is so simple that we should just print it inline 924 /// if it appears as an operand. 925 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) { 926 // Avoid lots of cluttering when inline printing nodes with associated 927 // DbgValues in verbose mode. 928 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty()) 929 return false; 930 if (Node.getOpcode() == ISD::EntryToken) 931 return false; 932 return Node.getNumOperands() == 0; 933 } 934 935 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 936 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) { 937 for (const SDValue &Op : N->op_values()) { 938 if (shouldPrintInline(*Op.getNode(), G)) 939 continue; 940 if (Op.getNode()->hasOneUse()) 941 DumpNodes(Op.getNode(), indent+2, G); 942 } 943 944 dbgs().indent(indent); 945 N->dump(G); 946 } 947 948 LLVM_DUMP_METHOD void SelectionDAG::dump() const { 949 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n"; 950 951 for (const SDNode &N : allnodes()) { 952 if (!N.hasOneUse() && &N != getRoot().getNode() && 953 (!shouldPrintInline(N, this) || N.use_empty())) 954 DumpNodes(&N, 2, this); 955 } 956 957 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this); 958 dbgs() << "\n"; 959 960 if (VerboseDAGDumping) { 961 if (DbgBegin() != DbgEnd()) 962 dbgs() << "SDDbgValues:\n"; 963 for (auto *Dbg : make_range(DbgBegin(), DbgEnd())) 964 Dbg->dump(); 965 if (ByvalParmDbgBegin() != ByvalParmDbgEnd()) 966 dbgs() << "Byval SDDbgValues:\n"; 967 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd())) 968 Dbg->dump(); 969 } 970 dbgs() << "\n"; 971 } 972 #endif 973 974 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const { 975 OS << PrintNodeId(*this) << ": "; 976 print_types(OS, G); 977 OS << " = " << getOperationName(G); 978 print_details(OS, G); 979 } 980 981 static bool printOperand(raw_ostream &OS, const SelectionDAG *G, 982 const SDValue Value) { 983 if (!Value.getNode()) { 984 OS << "<null>"; 985 return false; 986 } 987 988 if (shouldPrintInline(*Value.getNode(), G)) { 989 OS << Value->getOperationName(G) << ':'; 990 Value->print_types(OS, G); 991 Value->print_details(OS, G); 992 return true; 993 } 994 995 OS << PrintNodeId(*Value.getNode()); 996 if (unsigned RN = Value.getResNo()) 997 OS << ':' << RN; 998 return false; 999 } 1000 1001 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1002 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>; 1003 1004 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent, 1005 const SelectionDAG *G, VisitedSDNodeSet &once) { 1006 if (!once.insert(N).second) // If we've been here before, return now. 1007 return; 1008 1009 // Dump the current SDNode, but don't end the line yet. 1010 OS.indent(indent); 1011 N->printr(OS, G); 1012 1013 // Having printed this SDNode, walk the children: 1014 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) { 1015 if (i) OS << ","; 1016 OS << " "; 1017 1018 const SDValue Op = N->getOperand(i); 1019 bool printedInline = printOperand(OS, G, Op); 1020 if (printedInline) 1021 once.insert(Op.getNode()); 1022 } 1023 1024 OS << "\n"; 1025 1026 // Dump children that have grandchildren on their own line(s). 1027 for (const SDValue &Op : N->op_values()) 1028 DumpNodesr(OS, Op.getNode(), indent+2, G, once); 1029 } 1030 1031 LLVM_DUMP_METHOD void SDNode::dumpr() const { 1032 VisitedSDNodeSet once; 1033 DumpNodesr(dbgs(), this, 0, nullptr, once); 1034 } 1035 1036 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const { 1037 VisitedSDNodeSet once; 1038 DumpNodesr(dbgs(), this, 0, G, once); 1039 } 1040 #endif 1041 1042 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N, 1043 const SelectionDAG *G, unsigned depth, 1044 unsigned indent) { 1045 if (depth == 0) 1046 return; 1047 1048 OS.indent(indent); 1049 1050 N->print(OS, G); 1051 1052 for (const SDValue &Op : N->op_values()) { 1053 // Don't follow chain operands. 1054 if (Op.getValueType() == MVT::Other) 1055 continue; 1056 OS << '\n'; 1057 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2); 1058 } 1059 } 1060 1061 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G, 1062 unsigned depth) const { 1063 printrWithDepthHelper(OS, this, G, depth, 0); 1064 } 1065 1066 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const { 1067 // Don't print impossibly deep things. 1068 printrWithDepth(OS, G, 10); 1069 } 1070 1071 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 1072 LLVM_DUMP_METHOD 1073 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const { 1074 printrWithDepth(dbgs(), G, depth); 1075 } 1076 1077 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const { 1078 // Don't print impossibly deep things. 1079 dumprWithDepth(G, 10); 1080 } 1081 #endif 1082 1083 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const { 1084 printr(OS, G); 1085 // Under VerboseDAGDumping divergence will be printed always. 1086 if (isDivergent() && !VerboseDAGDumping) 1087 OS << " # D:1"; 1088 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1089 if (i) OS << ", "; else OS << " "; 1090 printOperand(OS, G, getOperand(i)); 1091 } 1092 if (DebugLoc DL = getDebugLoc()) { 1093 OS << ", "; 1094 DL.print(OS); 1095 } 1096 } 1097