xref: /freebsd/contrib/llvm-project/llvm/lib/CodeGen/PostRAHazardRecognizer.cpp (revision f425b8be7e7a38e47677d7bd68819dccbdcc3134)
1 //===----- PostRAHazardRecognizer.cpp - hazard recognizer -----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 /// \file
10 /// This runs the hazard recognizer and emits noops when necessary.  This
11 /// gives targets a way to run the hazard recognizer without running one of
12 /// the schedulers.  Example use cases for this pass would be:
13 ///
14 /// - Targets that need the hazard recognizer to be run at -O0.
15 /// - Targets that want to guarantee that hazards at the beginning of
16 ///   scheduling regions are handled correctly.  The post-RA scheduler is
17 ///   a top-down scheduler, but when there are multiple scheduling regions
18 ///   in a basic block, it visits the regions in bottom-up order.  This
19 ///   makes it impossible for the scheduler to gauranttee it can correctly
20 ///   handle hazards at the beginning of scheduling regions.
21 ///
22 /// This pass traverses all the instructions in a program in top-down order.
23 /// In contrast to the instruction scheduling passes, this pass never resets
24 /// the hazard recognizer to ensure it can correctly handles noop hazards at
25 /// the beginning of blocks.
26 //
27 //===----------------------------------------------------------------------===//
28 
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
33 #include "llvm/CodeGen/TargetInstrInfo.h"
34 #include "llvm/CodeGen/TargetSubtargetInfo.h"
35 #include "llvm/Support/Debug.h"
36 #include "llvm/Support/ErrorHandling.h"
37 #include "llvm/Support/raw_ostream.h"
38 using namespace llvm;
39 
40 #define DEBUG_TYPE "post-RA-hazard-rec"
41 
42 STATISTIC(NumNoops, "Number of noops inserted");
43 
44 namespace {
45   class PostRAHazardRecognizer : public MachineFunctionPass {
46 
47   public:
48     static char ID;
49     PostRAHazardRecognizer() : MachineFunctionPass(ID) {}
50 
51     void getAnalysisUsage(AnalysisUsage &AU) const override {
52       AU.setPreservesCFG();
53       MachineFunctionPass::getAnalysisUsage(AU);
54     }
55 
56     bool runOnMachineFunction(MachineFunction &Fn) override;
57 
58   };
59   char PostRAHazardRecognizer::ID = 0;
60 
61 }
62 
63 char &llvm::PostRAHazardRecognizerID = PostRAHazardRecognizer::ID;
64 
65 INITIALIZE_PASS(PostRAHazardRecognizer, DEBUG_TYPE,
66                 "Post RA hazard recognizer", false, false)
67 
68 bool PostRAHazardRecognizer::runOnMachineFunction(MachineFunction &Fn) {
69   const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
70   std::unique_ptr<ScheduleHazardRecognizer> HazardRec(
71       TII->CreateTargetPostRAHazardRecognizer(Fn));
72 
73   // Return if the target has not implemented a hazard recognizer.
74   if (!HazardRec.get())
75     return false;
76 
77   // Loop over all of the basic blocks
78   for (auto &MBB : Fn) {
79     // We do not call HazardRec->reset() here to make sure we are handling noop
80     // hazards at the start of basic blocks.
81     for (MachineInstr &MI : MBB) {
82       // If we need to emit noops prior to this instruction, then do so.
83       unsigned NumPreNoops = HazardRec->PreEmitNoops(&MI);
84       for (unsigned i = 0; i != NumPreNoops; ++i) {
85         HazardRec->EmitNoop();
86         TII->insertNoop(MBB, MachineBasicBlock::iterator(MI));
87         ++NumNoops;
88       }
89 
90       HazardRec->EmitInstruction(&MI);
91       if (HazardRec->atIssueLimit()) {
92         HazardRec->AdvanceCycle();
93       }
94     }
95   }
96   return true;
97 }
98