xref: /freebsd/contrib/llvm-project/llvm/lib/CodeGen/PatchableFunction.cpp (revision e32fecd0c2c3ee37c47ee100f169e7eb0282a873)
1 //===-- PatchableFunction.cpp - Patchable prologues for LLVM -------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements edits function bodies in place to support the
10 // "patchable-function" attribute.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/CodeGen/MachineFunction.h"
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstrBuilder.h"
17 #include "llvm/CodeGen/TargetInstrInfo.h"
18 #include "llvm/CodeGen/TargetSubtargetInfo.h"
19 #include "llvm/InitializePasses.h"
20 #include "llvm/Pass.h"
21 #include "llvm/PassRegistry.h"
22 
23 using namespace llvm;
24 
25 namespace {
26 struct PatchableFunction : public MachineFunctionPass {
27   static char ID; // Pass identification, replacement for typeid
28   PatchableFunction() : MachineFunctionPass(ID) {
29     initializePatchableFunctionPass(*PassRegistry::getPassRegistry());
30   }
31 
32   bool runOnMachineFunction(MachineFunction &F) override;
33    MachineFunctionProperties getRequiredProperties() const override {
34     return MachineFunctionProperties().set(
35         MachineFunctionProperties::Property::NoVRegs);
36   }
37 };
38 }
39 
40 /// Returns true if instruction \p MI will not result in actual machine code
41 /// instructions.
42 static bool doesNotGeneratecode(const MachineInstr &MI) {
43   // TODO: Introduce an MCInstrDesc flag for this
44   switch (MI.getOpcode()) {
45   default: return false;
46   case TargetOpcode::IMPLICIT_DEF:
47   case TargetOpcode::KILL:
48   case TargetOpcode::CFI_INSTRUCTION:
49   case TargetOpcode::EH_LABEL:
50   case TargetOpcode::GC_LABEL:
51   case TargetOpcode::DBG_VALUE:
52   case TargetOpcode::DBG_LABEL:
53     return true;
54   }
55 }
56 
57 bool PatchableFunction::runOnMachineFunction(MachineFunction &MF) {
58   if (MF.getFunction().hasFnAttribute("patchable-function-entry")) {
59     MachineBasicBlock &FirstMBB = *MF.begin();
60     const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
61     // The initial .loc covers PATCHABLE_FUNCTION_ENTER.
62     BuildMI(FirstMBB, FirstMBB.begin(), DebugLoc(),
63             TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER));
64     return true;
65   }
66 
67   if (!MF.getFunction().hasFnAttribute("patchable-function"))
68     return false;
69 
70 #ifndef NDEBUG
71   Attribute PatchAttr = MF.getFunction().getFnAttribute("patchable-function");
72   StringRef PatchType = PatchAttr.getValueAsString();
73   assert(PatchType == "prologue-short-redirect" && "Only possibility today!");
74 #endif
75 
76   auto &FirstMBB = *MF.begin();
77   MachineBasicBlock::iterator FirstActualI = FirstMBB.begin();
78   for (; doesNotGeneratecode(*FirstActualI); ++FirstActualI)
79     assert(FirstActualI != FirstMBB.end());
80 
81   auto *TII = MF.getSubtarget().getInstrInfo();
82   auto MIB = BuildMI(FirstMBB, FirstActualI, FirstActualI->getDebugLoc(),
83                      TII->get(TargetOpcode::PATCHABLE_OP))
84                  .addImm(2)
85                  .addImm(FirstActualI->getOpcode());
86 
87   for (auto &MO : FirstActualI->operands())
88     MIB.add(MO);
89 
90   FirstActualI->eraseFromParent();
91   MF.ensureAlignment(Align(16));
92   return true;
93 }
94 
95 char PatchableFunction::ID = 0;
96 char &llvm::PatchableFunctionID = PatchableFunction::ID;
97 INITIALIZE_PASS(PatchableFunction, "patchable-function",
98                 "Implement the 'patchable-function' attribute", false, false)
99