xref: /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MachineCopyPropagation.cpp (revision 7029da5c36f2d3cf6bb6c81bf551229f416399e8)
1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This is an extremely simple MachineInstr-level copy propagation pass.
10 //
11 // This pass forwards the source of COPYs to the users of their destinations
12 // when doing so is legal.  For example:
13 //
14 //   %reg1 = COPY %reg0
15 //   ...
16 //   ... = OP %reg1
17 //
18 // If
19 //   - %reg0 has not been clobbered by the time of the use of %reg1
20 //   - the register class constraints are satisfied
21 //   - the COPY def is the only value that reaches OP
22 // then this pass replaces the above with:
23 //
24 //   %reg1 = COPY %reg0
25 //   ...
26 //   ... = OP %reg0
27 //
28 // This pass also removes some redundant COPYs.  For example:
29 //
30 //    %R1 = COPY %R0
31 //    ... // No clobber of %R1
32 //    %R0 = COPY %R1 <<< Removed
33 //
34 // or
35 //
36 //    %R1 = COPY %R0
37 //    ... // No clobber of %R0
38 //    %R1 = COPY %R0 <<< Removed
39 //
40 //===----------------------------------------------------------------------===//
41 
42 #include "llvm/ADT/DenseMap.h"
43 #include "llvm/ADT/STLExtras.h"
44 #include "llvm/ADT/SetVector.h"
45 #include "llvm/ADT/SmallVector.h"
46 #include "llvm/ADT/Statistic.h"
47 #include "llvm/ADT/iterator_range.h"
48 #include "llvm/CodeGen/MachineBasicBlock.h"
49 #include "llvm/CodeGen/MachineFunction.h"
50 #include "llvm/CodeGen/MachineFunctionPass.h"
51 #include "llvm/CodeGen/MachineInstr.h"
52 #include "llvm/CodeGen/MachineOperand.h"
53 #include "llvm/CodeGen/MachineRegisterInfo.h"
54 #include "llvm/CodeGen/TargetInstrInfo.h"
55 #include "llvm/CodeGen/TargetRegisterInfo.h"
56 #include "llvm/CodeGen/TargetSubtargetInfo.h"
57 #include "llvm/MC/MCRegisterInfo.h"
58 #include "llvm/Pass.h"
59 #include "llvm/Support/Debug.h"
60 #include "llvm/Support/DebugCounter.h"
61 #include "llvm/Support/raw_ostream.h"
62 #include <cassert>
63 #include <iterator>
64 
65 using namespace llvm;
66 
67 #define DEBUG_TYPE "machine-cp"
68 
69 STATISTIC(NumDeletes, "Number of dead copies deleted");
70 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
71 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
72               "Controls which register COPYs are forwarded");
73 
74 namespace {
75 
76 class CopyTracker {
77   struct CopyInfo {
78     MachineInstr *MI;
79     SmallVector<unsigned, 4> DefRegs;
80     bool Avail;
81   };
82 
83   DenseMap<unsigned, CopyInfo> Copies;
84 
85 public:
86   /// Mark all of the given registers and their subregisters as unavailable for
87   /// copying.
88   void markRegsUnavailable(ArrayRef<unsigned> Regs,
89                            const TargetRegisterInfo &TRI) {
90     for (unsigned Reg : Regs) {
91       // Source of copy is no longer available for propagation.
92       for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
93         auto CI = Copies.find(*RUI);
94         if (CI != Copies.end())
95           CI->second.Avail = false;
96       }
97     }
98   }
99 
100   /// Clobber a single register, removing it from the tracker's copy maps.
101   void clobberRegister(unsigned Reg, const TargetRegisterInfo &TRI) {
102     for (MCRegUnitIterator RUI(Reg, &TRI); RUI.isValid(); ++RUI) {
103       auto I = Copies.find(*RUI);
104       if (I != Copies.end()) {
105         // When we clobber the source of a copy, we need to clobber everything
106         // it defined.
107         markRegsUnavailable(I->second.DefRegs, TRI);
108         // When we clobber the destination of a copy, we need to clobber the
109         // whole register it defined.
110         if (MachineInstr *MI = I->second.MI)
111           markRegsUnavailable({MI->getOperand(0).getReg()}, TRI);
112         // Now we can erase the copy.
113         Copies.erase(I);
114       }
115     }
116   }
117 
118   /// Add this copy's registers into the tracker's copy maps.
119   void trackCopy(MachineInstr *MI, const TargetRegisterInfo &TRI) {
120     assert(MI->isCopy() && "Tracking non-copy?");
121 
122     unsigned Def = MI->getOperand(0).getReg();
123     unsigned Src = MI->getOperand(1).getReg();
124 
125     // Remember Def is defined by the copy.
126     for (MCRegUnitIterator RUI(Def, &TRI); RUI.isValid(); ++RUI)
127       Copies[*RUI] = {MI, {}, true};
128 
129     // Remember source that's copied to Def. Once it's clobbered, then
130     // it's no longer available for copy propagation.
131     for (MCRegUnitIterator RUI(Src, &TRI); RUI.isValid(); ++RUI) {
132       auto I = Copies.insert({*RUI, {nullptr, {}, false}});
133       auto &Copy = I.first->second;
134       if (!is_contained(Copy.DefRegs, Def))
135         Copy.DefRegs.push_back(Def);
136     }
137   }
138 
139   bool hasAnyCopies() {
140     return !Copies.empty();
141   }
142 
143   MachineInstr *findCopyForUnit(unsigned RegUnit, const TargetRegisterInfo &TRI,
144                          bool MustBeAvailable = false) {
145     auto CI = Copies.find(RegUnit);
146     if (CI == Copies.end())
147       return nullptr;
148     if (MustBeAvailable && !CI->second.Avail)
149       return nullptr;
150     return CI->second.MI;
151   }
152 
153   MachineInstr *findAvailCopy(MachineInstr &DestCopy, unsigned Reg,
154                               const TargetRegisterInfo &TRI) {
155     // We check the first RegUnit here, since we'll only be interested in the
156     // copy if it copies the entire register anyway.
157     MCRegUnitIterator RUI(Reg, &TRI);
158     MachineInstr *AvailCopy =
159         findCopyForUnit(*RUI, TRI, /*MustBeAvailable=*/true);
160     if (!AvailCopy ||
161         !TRI.isSubRegisterEq(AvailCopy->getOperand(0).getReg(), Reg))
162       return nullptr;
163 
164     // Check that the available copy isn't clobbered by any regmasks between
165     // itself and the destination.
166     unsigned AvailSrc = AvailCopy->getOperand(1).getReg();
167     unsigned AvailDef = AvailCopy->getOperand(0).getReg();
168     for (const MachineInstr &MI :
169          make_range(AvailCopy->getIterator(), DestCopy.getIterator()))
170       for (const MachineOperand &MO : MI.operands())
171         if (MO.isRegMask())
172           if (MO.clobbersPhysReg(AvailSrc) || MO.clobbersPhysReg(AvailDef))
173             return nullptr;
174 
175     return AvailCopy;
176   }
177 
178   void clear() {
179     Copies.clear();
180   }
181 };
182 
183 class MachineCopyPropagation : public MachineFunctionPass {
184   const TargetRegisterInfo *TRI;
185   const TargetInstrInfo *TII;
186   const MachineRegisterInfo *MRI;
187 
188 public:
189   static char ID; // Pass identification, replacement for typeid
190 
191   MachineCopyPropagation() : MachineFunctionPass(ID) {
192     initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
193   }
194 
195   void getAnalysisUsage(AnalysisUsage &AU) const override {
196     AU.setPreservesCFG();
197     MachineFunctionPass::getAnalysisUsage(AU);
198   }
199 
200   bool runOnMachineFunction(MachineFunction &MF) override;
201 
202   MachineFunctionProperties getRequiredProperties() const override {
203     return MachineFunctionProperties().set(
204         MachineFunctionProperties::Property::NoVRegs);
205   }
206 
207 private:
208   void ClobberRegister(unsigned Reg);
209   void ReadRegister(unsigned Reg);
210   void CopyPropagateBlock(MachineBasicBlock &MBB);
211   bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
212   void forwardUses(MachineInstr &MI);
213   bool isForwardableRegClassCopy(const MachineInstr &Copy,
214                                  const MachineInstr &UseI, unsigned UseIdx);
215   bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
216 
217   /// Candidates for deletion.
218   SmallSetVector<MachineInstr *, 8> MaybeDeadCopies;
219 
220   CopyTracker Tracker;
221 
222   bool Changed;
223 };
224 
225 } // end anonymous namespace
226 
227 char MachineCopyPropagation::ID = 0;
228 
229 char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
230 
231 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
232                 "Machine Copy Propagation Pass", false, false)
233 
234 void MachineCopyPropagation::ReadRegister(unsigned Reg) {
235   // If 'Reg' is defined by a copy, the copy is no longer a candidate
236   // for elimination.
237   for (MCRegUnitIterator RUI(Reg, TRI); RUI.isValid(); ++RUI) {
238     if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
239       LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: "; Copy->dump());
240       MaybeDeadCopies.remove(Copy);
241     }
242   }
243 }
244 
245 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
246 /// This fact may have been obscured by sub register usage or may not be true at
247 /// all even though Src and Def are subregisters of the registers used in
248 /// PreviousCopy. e.g.
249 /// isNopCopy("ecx = COPY eax", AX, CX) == true
250 /// isNopCopy("ecx = COPY eax", AH, CL) == false
251 static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
252                       unsigned Def, const TargetRegisterInfo *TRI) {
253   unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
254   unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
255   if (Src == PreviousSrc) {
256     assert(Def == PreviousDef);
257     return true;
258   }
259   if (!TRI->isSubRegister(PreviousSrc, Src))
260     return false;
261   unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
262   return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
263 }
264 
265 /// Remove instruction \p Copy if there exists a previous copy that copies the
266 /// register \p Src to the register \p Def; This may happen indirectly by
267 /// copying the super registers.
268 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
269                                               unsigned Def) {
270   // Avoid eliminating a copy from/to a reserved registers as we cannot predict
271   // the value (Example: The sparc zero register is writable but stays zero).
272   if (MRI->isReserved(Src) || MRI->isReserved(Def))
273     return false;
274 
275   // Search for an existing copy.
276   MachineInstr *PrevCopy = Tracker.findAvailCopy(Copy, Def, *TRI);
277   if (!PrevCopy)
278     return false;
279 
280   // Check that the existing copy uses the correct sub registers.
281   if (PrevCopy->getOperand(0).isDead())
282     return false;
283   if (!isNopCopy(*PrevCopy, Src, Def, TRI))
284     return false;
285 
286   LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
287 
288   // Copy was redundantly redefining either Src or Def. Remove earlier kill
289   // flags between Copy and PrevCopy because the value will be reused now.
290   assert(Copy.isCopy());
291   unsigned CopyDef = Copy.getOperand(0).getReg();
292   assert(CopyDef == Src || CopyDef == Def);
293   for (MachineInstr &MI :
294        make_range(PrevCopy->getIterator(), Copy.getIterator()))
295     MI.clearRegisterKills(CopyDef, TRI);
296 
297   Copy.eraseFromParent();
298   Changed = true;
299   ++NumDeletes;
300   return true;
301 }
302 
303 /// Decide whether we should forward the source of \param Copy to its use in
304 /// \param UseI based on the physical register class constraints of the opcode
305 /// and avoiding introducing more cross-class COPYs.
306 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
307                                                        const MachineInstr &UseI,
308                                                        unsigned UseIdx) {
309 
310   unsigned CopySrcReg = Copy.getOperand(1).getReg();
311 
312   // If the new register meets the opcode register constraints, then allow
313   // forwarding.
314   if (const TargetRegisterClass *URC =
315           UseI.getRegClassConstraint(UseIdx, TII, TRI))
316     return URC->contains(CopySrcReg);
317 
318   if (!UseI.isCopy())
319     return false;
320 
321   /// COPYs don't have register class constraints, so if the user instruction
322   /// is a COPY, we just try to avoid introducing additional cross-class
323   /// COPYs.  For example:
324   ///
325   ///   RegClassA = COPY RegClassB  // Copy parameter
326   ///   ...
327   ///   RegClassB = COPY RegClassA  // UseI parameter
328   ///
329   /// which after forwarding becomes
330   ///
331   ///   RegClassA = COPY RegClassB
332   ///   ...
333   ///   RegClassB = COPY RegClassB
334   ///
335   /// so we have reduced the number of cross-class COPYs and potentially
336   /// introduced a nop COPY that can be removed.
337   const TargetRegisterClass *UseDstRC =
338       TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg());
339 
340   const TargetRegisterClass *SuperRC = UseDstRC;
341   for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
342        SuperRC; SuperRC = *SuperRCI++)
343     if (SuperRC->contains(CopySrcReg))
344       return true;
345 
346   return false;
347 }
348 
349 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
350 /// operand (the register being replaced), since these can sometimes be
351 /// implicitly tied to other operands.  For example, on AMDGPU:
352 ///
353 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
354 ///
355 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
356 /// way of knowing we need to update the latter when updating the former.
357 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
358                                                 const MachineOperand &Use) {
359   for (const MachineOperand &MIUse : MI.uses())
360     if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
361         MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
362       return true;
363 
364   return false;
365 }
366 
367 /// Look for available copies whose destination register is used by \p MI and
368 /// replace the use in \p MI with the copy's source register.
369 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
370   if (!Tracker.hasAnyCopies())
371     return;
372 
373   // Look for non-tied explicit vreg uses that have an active COPY
374   // instruction that defines the physical register allocated to them.
375   // Replace the vreg with the source of the active COPY.
376   for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
377        ++OpIdx) {
378     MachineOperand &MOUse = MI.getOperand(OpIdx);
379     // Don't forward into undef use operands since doing so can cause problems
380     // with the machine verifier, since it doesn't treat undef reads as reads,
381     // so we can end up with a live range that ends on an undef read, leading to
382     // an error that the live range doesn't end on a read of the live range
383     // register.
384     if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
385         MOUse.isImplicit())
386       continue;
387 
388     if (!MOUse.getReg())
389       continue;
390 
391     // Check that the register is marked 'renamable' so we know it is safe to
392     // rename it without violating any constraints that aren't expressed in the
393     // IR (e.g. ABI or opcode requirements).
394     if (!MOUse.isRenamable())
395       continue;
396 
397     MachineInstr *Copy = Tracker.findAvailCopy(MI, MOUse.getReg(), *TRI);
398     if (!Copy)
399       continue;
400 
401     unsigned CopyDstReg = Copy->getOperand(0).getReg();
402     const MachineOperand &CopySrc = Copy->getOperand(1);
403     unsigned CopySrcReg = CopySrc.getReg();
404 
405     // FIXME: Don't handle partial uses of wider COPYs yet.
406     if (MOUse.getReg() != CopyDstReg) {
407       LLVM_DEBUG(
408           dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n  "
409                  << MI);
410       continue;
411     }
412 
413     // Don't forward COPYs of reserved regs unless they are constant.
414     if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
415       continue;
416 
417     if (!isForwardableRegClassCopy(*Copy, MI, OpIdx))
418       continue;
419 
420     if (hasImplicitOverlap(MI, MOUse))
421       continue;
422 
423     if (!DebugCounter::shouldExecute(FwdCounter)) {
424       LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n  "
425                         << MI);
426       continue;
427     }
428 
429     LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
430                       << "\n     with " << printReg(CopySrcReg, TRI)
431                       << "\n     in " << MI << "     from " << *Copy);
432 
433     MOUse.setReg(CopySrcReg);
434     if (!CopySrc.isRenamable())
435       MOUse.setIsRenamable(false);
436 
437     LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
438 
439     // Clear kill markers that may have been invalidated.
440     for (MachineInstr &KMI :
441          make_range(Copy->getIterator(), std::next(MI.getIterator())))
442       KMI.clearRegisterKills(CopySrcReg, TRI);
443 
444     ++NumCopyForwards;
445     Changed = true;
446   }
447 }
448 
449 void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
450   LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n");
451 
452   for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
453     MachineInstr *MI = &*I;
454     ++I;
455 
456     // Analyze copies (which don't overlap themselves).
457     if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
458                                           MI->getOperand(1).getReg())) {
459       unsigned Def = MI->getOperand(0).getReg();
460       unsigned Src = MI->getOperand(1).getReg();
461 
462       assert(!TargetRegisterInfo::isVirtualRegister(Def) &&
463              !TargetRegisterInfo::isVirtualRegister(Src) &&
464              "MachineCopyPropagation should be run after register allocation!");
465 
466       // The two copies cancel out and the source of the first copy
467       // hasn't been overridden, eliminate the second one. e.g.
468       //  %ecx = COPY %eax
469       //  ... nothing clobbered eax.
470       //  %eax = COPY %ecx
471       // =>
472       //  %ecx = COPY %eax
473       //
474       // or
475       //
476       //  %ecx = COPY %eax
477       //  ... nothing clobbered eax.
478       //  %ecx = COPY %eax
479       // =>
480       //  %ecx = COPY %eax
481       if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
482         continue;
483 
484       forwardUses(*MI);
485 
486       // Src may have been changed by forwardUses()
487       Src = MI->getOperand(1).getReg();
488 
489       // If Src is defined by a previous copy, the previous copy cannot be
490       // eliminated.
491       ReadRegister(Src);
492       for (const MachineOperand &MO : MI->implicit_operands()) {
493         if (!MO.isReg() || !MO.readsReg())
494           continue;
495         unsigned Reg = MO.getReg();
496         if (!Reg)
497           continue;
498         ReadRegister(Reg);
499       }
500 
501       LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
502 
503       // Copy is now a candidate for deletion.
504       if (!MRI->isReserved(Def))
505         MaybeDeadCopies.insert(MI);
506 
507       // If 'Def' is previously source of another copy, then this earlier copy's
508       // source is no longer available. e.g.
509       // %xmm9 = copy %xmm2
510       // ...
511       // %xmm2 = copy %xmm0
512       // ...
513       // %xmm2 = copy %xmm9
514       Tracker.clobberRegister(Def, *TRI);
515       for (const MachineOperand &MO : MI->implicit_operands()) {
516         if (!MO.isReg() || !MO.isDef())
517           continue;
518         unsigned Reg = MO.getReg();
519         if (!Reg)
520           continue;
521         Tracker.clobberRegister(Reg, *TRI);
522       }
523 
524       Tracker.trackCopy(MI, *TRI);
525 
526       continue;
527     }
528 
529     // Clobber any earlyclobber regs first.
530     for (const MachineOperand &MO : MI->operands())
531       if (MO.isReg() && MO.isEarlyClobber()) {
532         unsigned Reg = MO.getReg();
533         // If we have a tied earlyclobber, that means it is also read by this
534         // instruction, so we need to make sure we don't remove it as dead
535         // later.
536         if (MO.isTied())
537           ReadRegister(Reg);
538         Tracker.clobberRegister(Reg, *TRI);
539       }
540 
541     forwardUses(*MI);
542 
543     // Not a copy.
544     SmallVector<unsigned, 2> Defs;
545     const MachineOperand *RegMask = nullptr;
546     for (const MachineOperand &MO : MI->operands()) {
547       if (MO.isRegMask())
548         RegMask = &MO;
549       if (!MO.isReg())
550         continue;
551       unsigned Reg = MO.getReg();
552       if (!Reg)
553         continue;
554 
555       assert(!TargetRegisterInfo::isVirtualRegister(Reg) &&
556              "MachineCopyPropagation should be run after register allocation!");
557 
558       if (MO.isDef() && !MO.isEarlyClobber()) {
559         Defs.push_back(Reg);
560         continue;
561       } else if (!MO.isDebug() && MO.readsReg())
562         ReadRegister(Reg);
563     }
564 
565     // The instruction has a register mask operand which means that it clobbers
566     // a large set of registers.  Treat clobbered registers the same way as
567     // defined registers.
568     if (RegMask) {
569       // Erase any MaybeDeadCopies whose destination register is clobbered.
570       for (SmallSetVector<MachineInstr *, 8>::iterator DI =
571                MaybeDeadCopies.begin();
572            DI != MaybeDeadCopies.end();) {
573         MachineInstr *MaybeDead = *DI;
574         unsigned Reg = MaybeDead->getOperand(0).getReg();
575         assert(!MRI->isReserved(Reg));
576 
577         if (!RegMask->clobbersPhysReg(Reg)) {
578           ++DI;
579           continue;
580         }
581 
582         LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
583                    MaybeDead->dump());
584 
585         // Make sure we invalidate any entries in the copy maps before erasing
586         // the instruction.
587         Tracker.clobberRegister(Reg, *TRI);
588 
589         // erase() will return the next valid iterator pointing to the next
590         // element after the erased one.
591         DI = MaybeDeadCopies.erase(DI);
592         MaybeDead->eraseFromParent();
593         Changed = true;
594         ++NumDeletes;
595       }
596     }
597 
598     // Any previous copy definition or reading the Defs is no longer available.
599     for (unsigned Reg : Defs)
600       Tracker.clobberRegister(Reg, *TRI);
601   }
602 
603   // If MBB doesn't have successors, delete the copies whose defs are not used.
604   // If MBB does have successors, then conservative assume the defs are live-out
605   // since we don't want to trust live-in lists.
606   if (MBB.succ_empty()) {
607     for (MachineInstr *MaybeDead : MaybeDeadCopies) {
608       LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
609                  MaybeDead->dump());
610       assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
611 
612       // Update matching debug values.
613       assert(MaybeDead->isCopy());
614       MaybeDead->changeDebugValuesDefReg(MaybeDead->getOperand(1).getReg());
615 
616       MaybeDead->eraseFromParent();
617       Changed = true;
618       ++NumDeletes;
619     }
620   }
621 
622   MaybeDeadCopies.clear();
623   Tracker.clear();
624 }
625 
626 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
627   if (skipFunction(MF.getFunction()))
628     return false;
629 
630   Changed = false;
631 
632   TRI = MF.getSubtarget().getRegisterInfo();
633   TII = MF.getSubtarget().getInstrInfo();
634   MRI = &MF.getRegInfo();
635 
636   for (MachineBasicBlock &MBB : MF)
637     CopyPropagateBlock(MBB);
638 
639   return Changed;
640 }
641