1 //===- MLRegAllocEvictAdvisor.cpp - ML eviction advisor -------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Function declarations of utilities related to feature extraction for unit 10 // testing. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H 15 #define LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H 16 17 #include "llvm/Analysis/MLModelRunner.h" 18 #include "llvm/CodeGen/MachineBasicBlock.h" 19 #include "llvm/CodeGen/SlotIndexes.h" 20 #include <map> 21 22 using namespace llvm; 23 24 // LRStartEndInfo contains the start and end of a specific live range as 25 // slot indices as well as storing the index of the physical register it 26 // is assigned to (or 1 above the phys reg count if its the candidate). 27 // Used when extracting per-instruction features in the context of a 28 // specific eviction problem. 29 struct LRStartEndInfo { 30 SlotIndex Begin; 31 SlotIndex End; 32 size_t Pos = 0; 33 }; 34 35 void extractInstructionFeatures( 36 llvm::SmallVectorImpl<LRStartEndInfo> &LRPosInfo, 37 MLModelRunner *RegallocRunner, function_ref<int(SlotIndex)> GetOpcode, 38 function_ref<float(SlotIndex)> GetMBBFreq, 39 function_ref<MachineBasicBlock *(SlotIndex)> GetMBBReference, 40 const int InstructionsIndex, const int InstructionsMappingIndex, 41 const int MBBFreqIndex, const int MBBMappingIndex, 42 const SlotIndex LastIndex); 43 44 void extractMBBFrequency(const SlotIndex CurrentIndex, 45 const size_t CurrentInstructionIndex, 46 std::map<MachineBasicBlock *, size_t> &VisitedMBBs, 47 function_ref<float(SlotIndex)> GetMBBFreq, 48 MachineBasicBlock *CurrentMBBReference, 49 MLModelRunner *RegallocRunner, const int MBBFreqIndex, 50 const int MBBMappingIndex); 51 52 // This is the maximum number of interfererring ranges. That's the number of 53 // distinct AllocationOrder values, which comes from MCRegisterClass::RegsSize. 54 // For X86, that's 32. 55 // TODO: find a way to get this, statically, in a programmatic way. 56 static const int64_t MaxInterferences = 32; 57 58 // Logically, we can think of the feature set given to the evaluator as a 2D 59 // matrix. The rows are the features (see next). The columns correspond to the 60 // interferences. We treat the candidate virt reg as an 'interference', too, as 61 // its feature set is the same as that of the interferring ranges. So we'll have 62 // MaxInterferences + 1 columns and by convention, we will use the last column 63 // for the virt reg seeking allocation. 64 static const int64_t CandidateVirtRegPos = MaxInterferences; 65 static const int64_t NumberOfInterferences = CandidateVirtRegPos + 1; 66 67 // The number of instructions that a specific live range might have is variable, 68 // but we're passing in a single matrix of instructions and tensorflow saved 69 // models only support a fixed input size, so we have to cap the number of 70 // instructions that can be passed along. The specific value was derived from 71 // experimentation such that the majority of eviction problems would be 72 // completely covered. 73 static const int ModelMaxSupportedInstructionCount = 300; 74 75 // When extracting per-instruction features, the advisor will currently create 76 // a vector of size ModelMaxSupportedInstructionCount to hold the opcodes of the 77 // instructions relevant to the eviction problem, and a NumberOfInterferences * 78 // ModelMaxSupportedInstructionCount matrix that maps LRs to the instructions 79 // that they span. 80 static const std::vector<int64_t> InstructionsShape{ 81 1, ModelMaxSupportedInstructionCount}; 82 static const std::vector<int64_t> InstructionsMappingShape{ 83 1, NumberOfInterferences, ModelMaxSupportedInstructionCount}; 84 85 // When extracting mappings between MBBs and individual instructions, we create 86 // a vector of MBB frequencies, currently of size 100, which was a value 87 // determined through experimentation to encompass the vast majority of eviction 88 // problems. The actual mapping is the same shape as the instruction opcodes 89 // vector. 90 static const int64_t ModelMaxSupportedMBBCount = 100; 91 static const std::vector<int64_t> MBBFrequencyShape{1, 92 ModelMaxSupportedMBBCount}; 93 94 #endif // LLVM_CODEGEN_MLREGALLOCEVICTIONADVISOR_H 95