1 //===- CombinerHelperArtifacts.cpp-----------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements CombinerHelper for legalization artifacts. 10 // 11 //===----------------------------------------------------------------------===// 12 // 13 // G_MERGE_VALUES 14 // 15 //===----------------------------------------------------------------------===// 16 #include "llvm/CodeGen/GlobalISel/CombinerHelper.h" 17 #include "llvm/CodeGen/GlobalISel/LegalizerHelper.h" 18 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h" 19 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" 20 #include "llvm/CodeGen/GlobalISel/Utils.h" 21 #include "llvm/CodeGen/MachineOperand.h" 22 #include "llvm/CodeGen/MachineRegisterInfo.h" 23 #include "llvm/CodeGen/TargetOpcodes.h" 24 #include "llvm/Support/Casting.h" 25 26 #define DEBUG_TYPE "gi-combiner" 27 28 using namespace llvm; 29 30 bool CombinerHelper::matchMergeXAndUndef(const MachineInstr &MI, 31 BuildFnTy &MatchInfo) const { 32 const GMerge *Merge = cast<GMerge>(&MI); 33 34 Register Dst = Merge->getReg(0); 35 LLT DstTy = MRI.getType(Dst); 36 LLT SrcTy = MRI.getType(Merge->getSourceReg(0)); 37 38 // Otherwise, we would miscompile. 39 assert(Merge->getNumSources() == 2 && "Unexpected number of operands"); 40 41 // 42 // %bits_8_15:_(s8) = G_IMPLICIT_DEF 43 // %0:_(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8) 44 // 45 // -> 46 // 47 // %0:_(s16) = G_ANYEXT %bits_0_7:(s8) 48 // 49 50 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_ANYEXT, {DstTy, SrcTy}})) 51 return false; 52 53 MatchInfo = [=](MachineIRBuilder &B) { 54 B.buildAnyExt(Dst, Merge->getSourceReg(0)); 55 }; 56 return true; 57 } 58 59 bool CombinerHelper::matchMergeXAndZero(const MachineInstr &MI, 60 BuildFnTy &MatchInfo) const { 61 const GMerge *Merge = cast<GMerge>(&MI); 62 63 Register Dst = Merge->getReg(0); 64 LLT DstTy = MRI.getType(Dst); 65 LLT SrcTy = MRI.getType(Merge->getSourceReg(0)); 66 67 // No multi-use check. It is a constant. 68 69 // 70 // %bits_8_15:_(s8) = G_CONSTANT i8 0 71 // %0:_(s16) = G_MERGE_VALUES %bits_0_7:(s8), %bits_8_15:(s8) 72 // 73 // -> 74 // 75 // %0:_(s16) = G_ZEXT %bits_0_7:(s8) 76 // 77 78 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_ZEXT, {DstTy, SrcTy}})) 79 return false; 80 81 MatchInfo = [=](MachineIRBuilder &B) { 82 B.buildZExt(Dst, Merge->getSourceReg(0)); 83 }; 84 return true; 85 } 86