1 //===- DeadMachineInstructionElim.cpp - Remove dead machine instructions --===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This is an extremely simple MachineInstr-level dead-code-elimination pass. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/ADT/PostOrderIterator.h" 14 #include "llvm/ADT/Statistic.h" 15 #include "llvm/CodeGen/MachineFunctionPass.h" 16 #include "llvm/CodeGen/MachineRegisterInfo.h" 17 #include "llvm/CodeGen/Passes.h" 18 #include "llvm/CodeGen/TargetSubtargetInfo.h" 19 #include "llvm/InitializePasses.h" 20 #include "llvm/Pass.h" 21 #include "llvm/Support/Debug.h" 22 #include "llvm/Support/raw_ostream.h" 23 24 using namespace llvm; 25 26 #define DEBUG_TYPE "dead-mi-elimination" 27 28 STATISTIC(NumDeletes, "Number of dead instructions deleted"); 29 30 namespace { 31 class DeadMachineInstructionElim : public MachineFunctionPass { 32 bool runOnMachineFunction(MachineFunction &MF) override; 33 34 const TargetRegisterInfo *TRI; 35 const MachineRegisterInfo *MRI; 36 const TargetInstrInfo *TII; 37 BitVector LivePhysRegs; 38 39 public: 40 static char ID; // Pass identification, replacement for typeid 41 DeadMachineInstructionElim() : MachineFunctionPass(ID) { 42 initializeDeadMachineInstructionElimPass(*PassRegistry::getPassRegistry()); 43 } 44 45 void getAnalysisUsage(AnalysisUsage &AU) const override { 46 AU.setPreservesCFG(); 47 MachineFunctionPass::getAnalysisUsage(AU); 48 } 49 50 private: 51 bool isDead(const MachineInstr *MI) const; 52 53 bool eliminateDeadMI(MachineFunction &MF); 54 }; 55 } 56 char DeadMachineInstructionElim::ID = 0; 57 char &llvm::DeadMachineInstructionElimID = DeadMachineInstructionElim::ID; 58 59 INITIALIZE_PASS(DeadMachineInstructionElim, DEBUG_TYPE, 60 "Remove dead machine instructions", false, false) 61 62 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { 63 // Technically speaking inline asm without side effects and no defs can still 64 // be deleted. But there is so much bad inline asm code out there, we should 65 // let them be. 66 if (MI->isInlineAsm()) 67 return false; 68 69 // Don't delete frame allocation labels. 70 if (MI->getOpcode() == TargetOpcode::LOCAL_ESCAPE) 71 return false; 72 73 // Don't delete instructions with side effects. 74 bool SawStore = false; 75 if (!MI->isSafeToMove(nullptr, SawStore) && !MI->isPHI()) 76 return false; 77 78 // Examine each operand. 79 for (const MachineOperand &MO : MI->operands()) { 80 if (MO.isReg() && MO.isDef()) { 81 Register Reg = MO.getReg(); 82 if (Register::isPhysicalRegister(Reg)) { 83 // Don't delete live physreg defs, or any reserved register defs. 84 if (LivePhysRegs.test(Reg) || MRI->isReserved(Reg)) 85 return false; 86 } else { 87 if (MO.isDead()) { 88 #ifndef NDEBUG 89 // Baisc check on the register. All of them should be 90 // 'undef'. 91 for (auto &U : MRI->use_nodbg_operands(Reg)) 92 assert(U.isUndef() && "'Undef' use on a 'dead' register is found!"); 93 #endif 94 continue; 95 } 96 for (const MachineInstr &Use : MRI->use_nodbg_instructions(Reg)) { 97 if (&Use != MI) 98 // This def has a non-debug use. Don't delete the instruction! 99 return false; 100 } 101 } 102 } 103 } 104 105 // If there are no defs with uses, the instruction is dead. 106 return true; 107 } 108 109 bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) { 110 if (skipFunction(MF.getFunction())) 111 return false; 112 bool AnyChanges = eliminateDeadMI(MF); 113 while (AnyChanges && eliminateDeadMI(MF)) 114 ; 115 return AnyChanges; 116 } 117 118 bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) { 119 bool AnyChanges = false; 120 MRI = &MF.getRegInfo(); 121 TRI = MF.getSubtarget().getRegisterInfo(); 122 TII = MF.getSubtarget().getInstrInfo(); 123 124 // Loop over all instructions in all blocks, from bottom to top, so that it's 125 // more likely that chains of dependent but ultimately dead instructions will 126 // be cleaned up. 127 for (MachineBasicBlock *MBB : post_order(&MF)) { 128 // Start out assuming that reserved registers are live out of this block. 129 LivePhysRegs = MRI->getReservedRegs(); 130 131 // Add live-ins from successors to LivePhysRegs. Normally, physregs are not 132 // live across blocks, but some targets (x86) can have flags live out of a 133 // block. 134 for (const MachineBasicBlock *Succ : MBB->successors()) 135 for (const auto &LI : Succ->liveins()) 136 LivePhysRegs.set(LI.PhysReg); 137 138 // Now scan the instructions and delete dead ones, tracking physreg 139 // liveness as we go. 140 for (MachineInstr &MI : llvm::make_early_inc_range(llvm::reverse(*MBB))) { 141 // If the instruction is dead, delete it! 142 if (isDead(&MI)) { 143 LLVM_DEBUG(dbgs() << "DeadMachineInstructionElim: DELETING: " << MI); 144 // It is possible that some DBG_VALUE instructions refer to this 145 // instruction. They will be deleted in the live debug variable 146 // analysis. 147 MI.eraseFromParent(); 148 AnyChanges = true; 149 ++NumDeletes; 150 continue; 151 } 152 153 // Record the physreg defs. 154 for (const MachineOperand &MO : MI.operands()) { 155 if (MO.isReg() && MO.isDef()) { 156 Register Reg = MO.getReg(); 157 if (Register::isPhysicalRegister(Reg)) { 158 // Check the subreg set, not the alias set, because a def 159 // of a super-register may still be partially live after 160 // this def. 161 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); 162 SR.isValid(); ++SR) 163 LivePhysRegs.reset(*SR); 164 } 165 } else if (MO.isRegMask()) { 166 // Register mask of preserved registers. All clobbers are dead. 167 LivePhysRegs.clearBitsNotInMask(MO.getRegMask()); 168 } 169 } 170 // Record the physreg uses, after the defs, in case a physreg is 171 // both defined and used in the same instruction. 172 for (const MachineOperand &MO : MI.operands()) { 173 if (MO.isReg() && MO.isUse()) { 174 Register Reg = MO.getReg(); 175 if (Register::isPhysicalRegister(Reg)) { 176 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) 177 LivePhysRegs.set(*AI); 178 } 179 } 180 } 181 } 182 } 183 184 LivePhysRegs.clear(); 185 return AnyChanges; 186 } 187