1 //===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file contains support for writing dwarf compile unit. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 14 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 15 16 #include "llvm/ADT/ArrayRef.h" 17 #include "llvm/ADT/None.h" 18 #include "llvm/ADT/Optional.h" 19 #include "llvm/ADT/SmallVector.h" 20 #include "llvm/IR/DebugInfoMetadata.h" 21 #include <cassert> 22 #include <cstdint> 23 #include <iterator> 24 25 namespace llvm { 26 27 class AsmPrinter; 28 class APInt; 29 class ByteStreamer; 30 class DwarfCompileUnit; 31 class DIELoc; 32 class TargetRegisterInfo; 33 34 /// Holds a DIExpression and keeps track of how many operands have been consumed 35 /// so far. 36 class DIExpressionCursor { 37 DIExpression::expr_op_iterator Start, End; 38 39 public: 40 DIExpressionCursor(const DIExpression *Expr) { 41 if (!Expr) { 42 assert(Start == End); 43 return; 44 } 45 Start = Expr->expr_op_begin(); 46 End = Expr->expr_op_end(); 47 } 48 49 DIExpressionCursor(ArrayRef<uint64_t> Expr) 50 : Start(Expr.begin()), End(Expr.end()) {} 51 52 DIExpressionCursor(const DIExpressionCursor &) = default; 53 54 /// Consume one operation. 55 Optional<DIExpression::ExprOperand> take() { 56 if (Start == End) 57 return None; 58 return *(Start++); 59 } 60 61 /// Consume N operations. 62 void consume(unsigned N) { std::advance(Start, N); } 63 64 /// Return the current operation. 65 Optional<DIExpression::ExprOperand> peek() const { 66 if (Start == End) 67 return None; 68 return *(Start); 69 } 70 71 /// Return the next operation. 72 Optional<DIExpression::ExprOperand> peekNext() const { 73 if (Start == End) 74 return None; 75 76 auto Next = Start.getNext(); 77 if (Next == End) 78 return None; 79 80 return *Next; 81 } 82 83 /// Determine whether there are any operations left in this expression. 84 operator bool() const { return Start != End; } 85 86 DIExpression::expr_op_iterator begin() const { return Start; } 87 DIExpression::expr_op_iterator end() const { return End; } 88 89 /// Retrieve the fragment information, if any. 90 Optional<DIExpression::FragmentInfo> getFragmentInfo() const { 91 return DIExpression::getFragmentInfo(Start, End); 92 } 93 }; 94 95 /// Base class containing the logic for constructing DWARF expressions 96 /// independently of whether they are emitted into a DIE or into a .debug_loc 97 /// entry. 98 class DwarfExpression { 99 protected: 100 /// Holds information about all subregisters comprising a register location. 101 struct Register { 102 int DwarfRegNo; 103 unsigned Size; 104 const char *Comment; 105 }; 106 107 DwarfCompileUnit &CU; 108 109 /// The register location, if any. 110 SmallVector<Register, 2> DwarfRegs; 111 112 /// Current Fragment Offset in Bits. 113 uint64_t OffsetInBits = 0; 114 115 /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister. 116 unsigned SubRegisterSizeInBits : 16; 117 unsigned SubRegisterOffsetInBits : 16; 118 119 /// The kind of location description being produced. 120 enum { Unknown = 0, Register, Memory, Implicit }; 121 122 /// The flags of location description being produced. 123 enum { EntryValue = 1 }; 124 125 unsigned LocationKind : 3; 126 unsigned LocationFlags : 2; 127 unsigned DwarfVersion : 4; 128 129 public: 130 bool isUnknownLocation() const { 131 return LocationKind == Unknown; 132 } 133 134 bool isMemoryLocation() const { 135 return LocationKind == Memory; 136 } 137 138 bool isRegisterLocation() const { 139 return LocationKind == Register; 140 } 141 142 bool isImplicitLocation() const { 143 return LocationKind == Implicit; 144 } 145 146 bool isEntryValue() const { 147 return LocationFlags & EntryValue; 148 } 149 150 Optional<uint8_t> TagOffset; 151 152 protected: 153 /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed 154 /// to represent a subregister. 155 void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) { 156 assert(SizeInBits < 65536 && OffsetInBits < 65536); 157 SubRegisterSizeInBits = SizeInBits; 158 SubRegisterOffsetInBits = OffsetInBits; 159 } 160 161 /// Add masking operations to stencil out a subregister. 162 void maskSubRegister(); 163 164 /// Output a dwarf operand and an optional assembler comment. 165 virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0; 166 167 /// Emit a raw signed value. 168 virtual void emitSigned(int64_t Value) = 0; 169 170 /// Emit a raw unsigned value. 171 virtual void emitUnsigned(uint64_t Value) = 0; 172 173 virtual void emitData1(uint8_t Value) = 0; 174 175 virtual void emitBaseTypeRef(uint64_t Idx) = 0; 176 177 /// Emit a normalized unsigned constant. 178 void emitConstu(uint64_t Value); 179 180 /// Return whether the given machine register is the frame register in the 181 /// current function. 182 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0; 183 184 /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF 185 /// register location description. 186 void addReg(int DwarfReg, const char *Comment = nullptr); 187 188 /// Emit a DW_OP_breg operation. 189 void addBReg(int DwarfReg, int Offset); 190 191 /// Emit DW_OP_fbreg <Offset>. 192 void addFBReg(int Offset); 193 194 /// Emit a partial DWARF register operation. 195 /// 196 /// \param MachineReg The register number. 197 /// \param MaxSize If the register must be composed from 198 /// sub-registers this is an upper bound 199 /// for how many bits the emitted DW_OP_piece 200 /// may cover. 201 /// 202 /// If size and offset is zero an operation for the entire register is 203 /// emitted: Some targets do not provide a DWARF register number for every 204 /// register. If this is the case, this function will attempt to emit a DWARF 205 /// register by emitting a fragment of a super-register or by piecing together 206 /// multiple subregisters that alias the register. 207 /// 208 /// \return false if no DWARF register exists for MachineReg. 209 bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg, 210 unsigned MaxSize = ~1U); 211 212 /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment. 213 /// \param OffsetInBits This is an optional offset into the location that 214 /// is at the top of the DWARF stack. 215 void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); 216 217 /// Emit a shift-right dwarf operation. 218 void addShr(unsigned ShiftBy); 219 220 /// Emit a bitwise and dwarf operation. 221 void addAnd(unsigned Mask); 222 223 /// Emit a DW_OP_stack_value, if supported. 224 /// 225 /// The proper way to describe a constant value is DW_OP_constu <const>, 226 /// DW_OP_stack_value. Unfortunately, DW_OP_stack_value was not available 227 /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for 228 /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const 229 /// <const> actually describes a value at a constant address, not a constant 230 /// value. However, in the past there was no better way to describe a 231 /// constant value, so the producers and consumers started to rely on 232 /// heuristics to disambiguate the value vs. location status of the 233 /// expression. See PR21176 for more details. 234 void addStackValue(); 235 236 ~DwarfExpression() = default; 237 238 public: 239 DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU) 240 : CU(CU), SubRegisterSizeInBits(0), SubRegisterOffsetInBits(0), 241 LocationKind(Unknown), LocationFlags(Unknown), 242 DwarfVersion(DwarfVersion) {} 243 244 /// This needs to be called last to commit any pending changes. 245 void finalize(); 246 247 /// Emit a signed constant. 248 void addSignedConstant(int64_t Value); 249 250 /// Emit an unsigned constant. 251 void addUnsignedConstant(uint64_t Value); 252 253 /// Emit an unsigned constant. 254 void addUnsignedConstant(const APInt &Value); 255 256 /// Lock this down to become a memory location description. 257 void setMemoryLocationKind() { 258 assert(isUnknownLocation()); 259 LocationKind = Memory; 260 } 261 262 /// Lock this down to become an entry value location. 263 void setEntryValueFlag() { 264 LocationFlags |= EntryValue; 265 } 266 267 /// Emit a machine register location. As an optimization this may also consume 268 /// the prefix of a DwarfExpression if a more efficient representation for 269 /// combining the register location and the first operation exists. 270 /// 271 /// \param FragmentOffsetInBits If this is one fragment out of a 272 /// fragmented 273 /// location, this is the offset of the 274 /// fragment inside the entire variable. 275 /// \return false if no DWARF register exists 276 /// for MachineReg. 277 bool addMachineRegExpression(const TargetRegisterInfo &TRI, 278 DIExpressionCursor &Expr, unsigned MachineReg, 279 unsigned FragmentOffsetInBits = 0); 280 281 /// Emit entry value dwarf operation. 282 void addEntryValueExpression(DIExpressionCursor &ExprCursor); 283 284 /// Emit all remaining operations in the DIExpressionCursor. 285 /// 286 /// \param FragmentOffsetInBits If this is one fragment out of multiple 287 /// locations, this is the offset of the 288 /// fragment inside the entire variable. 289 void addExpression(DIExpressionCursor &&Expr, 290 unsigned FragmentOffsetInBits = 0); 291 292 /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to 293 /// the fragment described by \c Expr. 294 void addFragmentOffset(const DIExpression *Expr); 295 296 void emitLegacySExt(unsigned FromBits); 297 void emitLegacyZExt(unsigned FromBits); 298 }; 299 300 /// DwarfExpression implementation for .debug_loc entries. 301 class DebugLocDwarfExpression final : public DwarfExpression { 302 ByteStreamer &BS; 303 304 void emitOp(uint8_t Op, const char *Comment = nullptr) override; 305 void emitSigned(int64_t Value) override; 306 void emitUnsigned(uint64_t Value) override; 307 void emitData1(uint8_t Value) override; 308 void emitBaseTypeRef(uint64_t Idx) override; 309 bool isFrameRegister(const TargetRegisterInfo &TRI, 310 unsigned MachineReg) override; 311 312 public: 313 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS, DwarfCompileUnit &CU) 314 : DwarfExpression(DwarfVersion, CU), BS(BS) {} 315 }; 316 317 /// DwarfExpression implementation for singular DW_AT_location. 318 class DIEDwarfExpression final : public DwarfExpression { 319 const AsmPrinter &AP; 320 DIELoc &DIE; 321 322 void emitOp(uint8_t Op, const char *Comment = nullptr) override; 323 void emitSigned(int64_t Value) override; 324 void emitUnsigned(uint64_t Value) override; 325 void emitData1(uint8_t Value) override; 326 void emitBaseTypeRef(uint64_t Idx) override; 327 bool isFrameRegister(const TargetRegisterInfo &TRI, 328 unsigned MachineReg) override; 329 public: 330 DIEDwarfExpression(const AsmPrinter &AP, DwarfCompileUnit &CU, DIELoc &DIE); 331 332 DIELoc *finalize() { 333 DwarfExpression::finalize(); 334 return &DIE; 335 } 336 }; 337 338 } // end namespace llvm 339 340 #endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 341