1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/DataLayout.h" 15 #include "llvm/IR/Dominators.h" 16 #include "llvm/IR/Instruction.h" 17 #include "llvm/IR/Instructions.h" 18 #include "llvm/IR/IntrinsicInst.h" 19 #include "llvm/IR/Module.h" 20 #include "llvm/IR/Operator.h" 21 #include "llvm/IR/PatternMatch.h" 22 #include "llvm/InitializePasses.h" 23 #include "llvm/Support/CommandLine.h" 24 #include "llvm/Support/ErrorHandling.h" 25 #include <utility> 26 27 using namespace llvm; 28 using namespace PatternMatch; 29 30 #define DEBUG_TYPE "tti" 31 32 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 33 cl::Hidden, 34 cl::desc("Recognize reduction patterns.")); 35 36 namespace { 37 /// No-op implementation of the TTI interface using the utility base 38 /// classes. 39 /// 40 /// This is used when no target specific information is available. 41 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 42 explicit NoTTIImpl(const DataLayout &DL) 43 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 44 }; 45 } // namespace 46 47 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 48 // If the loop has irreducible control flow, it can not be converted to 49 // Hardware loop. 50 LoopBlocksRPO RPOT(L); 51 RPOT.perform(&LI); 52 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 53 return false; 54 return true; 55 } 56 57 IntrinsicCostAttributes::IntrinsicCostAttributes( 58 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 59 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 60 ScalarizationCost(ScalarizationCost) { 61 62 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 63 FMF = FPMO->getFastMathFlags(); 64 65 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 66 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 67 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 68 } 69 70 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 71 ArrayRef<Type *> Tys, 72 FastMathFlags Flags, 73 const IntrinsicInst *I, 74 InstructionCost ScalarCost) 75 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 76 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 77 } 78 79 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 80 ArrayRef<const Value *> Args) 81 : RetTy(Ty), IID(Id) { 82 83 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 84 ParamTys.reserve(Arguments.size()); 85 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 86 ParamTys.push_back(Arguments[Idx]->getType()); 87 } 88 89 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 90 ArrayRef<const Value *> Args, 91 ArrayRef<Type *> Tys, 92 FastMathFlags Flags, 93 const IntrinsicInst *I, 94 InstructionCost ScalarCost) 95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 96 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 97 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 98 } 99 100 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 101 LoopInfo &LI, DominatorTree &DT, 102 bool ForceNestedLoop, 103 bool ForceHardwareLoopPHI) { 104 SmallVector<BasicBlock *, 4> ExitingBlocks; 105 L->getExitingBlocks(ExitingBlocks); 106 107 for (BasicBlock *BB : ExitingBlocks) { 108 // If we pass the updated counter back through a phi, we need to know 109 // which latch the updated value will be coming from. 110 if (!L->isLoopLatch(BB)) { 111 if (ForceHardwareLoopPHI || CounterInReg) 112 continue; 113 } 114 115 const SCEV *EC = SE.getExitCount(L, BB); 116 if (isa<SCEVCouldNotCompute>(EC)) 117 continue; 118 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 119 if (ConstEC->getValue()->isZero()) 120 continue; 121 } else if (!SE.isLoopInvariant(EC, L)) 122 continue; 123 124 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 125 continue; 126 127 // If this exiting block is contained in a nested loop, it is not eligible 128 // for insertion of the branch-and-decrement since the inner loop would 129 // end up messing up the value in the CTR. 130 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 131 continue; 132 133 // We now have a loop-invariant count of loop iterations (which is not the 134 // constant zero) for which we know that this loop will not exit via this 135 // existing block. 136 137 // We need to make sure that this block will run on every loop iteration. 138 // For this to be true, we must dominate all blocks with backedges. Such 139 // blocks are in-loop predecessors to the header block. 140 bool NotAlways = false; 141 for (BasicBlock *Pred : predecessors(L->getHeader())) { 142 if (!L->contains(Pred)) 143 continue; 144 145 if (!DT.dominates(BB, Pred)) { 146 NotAlways = true; 147 break; 148 } 149 } 150 151 if (NotAlways) 152 continue; 153 154 // Make sure this blocks ends with a conditional branch. 155 Instruction *TI = BB->getTerminator(); 156 if (!TI) 157 continue; 158 159 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 160 if (!BI->isConditional()) 161 continue; 162 163 ExitBranch = BI; 164 } else 165 continue; 166 167 // Note that this block may not be the loop latch block, even if the loop 168 // has a latch block. 169 ExitBlock = BB; 170 ExitCount = EC; 171 break; 172 } 173 174 if (!ExitBlock) 175 return false; 176 return true; 177 } 178 179 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 180 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 181 182 TargetTransformInfo::~TargetTransformInfo() {} 183 184 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 185 : TTIImpl(std::move(Arg.TTIImpl)) {} 186 187 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 188 TTIImpl = std::move(RHS.TTIImpl); 189 return *this; 190 } 191 192 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 193 return TTIImpl->getInliningThresholdMultiplier(); 194 } 195 196 unsigned 197 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 198 return TTIImpl->adjustInliningThreshold(CB); 199 } 200 201 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 202 return TTIImpl->getInlinerVectorBonusPercent(); 203 } 204 205 InstructionCost 206 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 207 ArrayRef<const Value *> Operands, 208 TTI::TargetCostKind CostKind) const { 209 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 210 } 211 212 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 213 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 214 BlockFrequencyInfo *BFI) const { 215 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 216 } 217 218 InstructionCost 219 TargetTransformInfo::getUserCost(const User *U, 220 ArrayRef<const Value *> Operands, 221 enum TargetCostKind CostKind) const { 222 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 223 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 224 "TTI should not produce negative costs!"); 225 return Cost; 226 } 227 228 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 229 return TTIImpl->getPredictableBranchThreshold(); 230 } 231 232 bool TargetTransformInfo::hasBranchDivergence() const { 233 return TTIImpl->hasBranchDivergence(); 234 } 235 236 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 237 return TTIImpl->useGPUDivergenceAnalysis(); 238 } 239 240 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 241 return TTIImpl->isSourceOfDivergence(V); 242 } 243 244 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 245 return TTIImpl->isAlwaysUniform(V); 246 } 247 248 unsigned TargetTransformInfo::getFlatAddressSpace() const { 249 return TTIImpl->getFlatAddressSpace(); 250 } 251 252 bool TargetTransformInfo::collectFlatAddressOperands( 253 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 254 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 255 } 256 257 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 258 unsigned ToAS) const { 259 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 260 } 261 262 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 263 unsigned AS) const { 264 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 265 } 266 267 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 268 return TTIImpl->getAssumedAddrSpace(V); 269 } 270 271 std::pair<const Value *, unsigned> 272 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 273 return TTIImpl->getPredicatedAddrSpace(V); 274 } 275 276 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 277 IntrinsicInst *II, Value *OldV, Value *NewV) const { 278 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 279 } 280 281 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 282 return TTIImpl->isLoweredToCall(F); 283 } 284 285 bool TargetTransformInfo::isHardwareLoopProfitable( 286 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 287 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 288 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 289 } 290 291 bool TargetTransformInfo::preferPredicateOverEpilogue( 292 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 293 TargetLibraryInfo *TLI, DominatorTree *DT, 294 const LoopAccessInfo *LAI) const { 295 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 296 } 297 298 bool TargetTransformInfo::emitGetActiveLaneMask() const { 299 return TTIImpl->emitGetActiveLaneMask(); 300 } 301 302 Optional<Instruction *> 303 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 304 IntrinsicInst &II) const { 305 return TTIImpl->instCombineIntrinsic(IC, II); 306 } 307 308 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 309 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 310 bool &KnownBitsComputed) const { 311 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 312 KnownBitsComputed); 313 } 314 315 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 316 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 317 APInt &UndefElts2, APInt &UndefElts3, 318 std::function<void(Instruction *, unsigned, APInt, APInt &)> 319 SimplifyAndSetOp) const { 320 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 321 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 322 SimplifyAndSetOp); 323 } 324 325 void TargetTransformInfo::getUnrollingPreferences( 326 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 327 OptimizationRemarkEmitter *ORE) const { 328 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 329 } 330 331 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 332 PeelingPreferences &PP) const { 333 return TTIImpl->getPeelingPreferences(L, SE, PP); 334 } 335 336 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 337 return TTIImpl->isLegalAddImmediate(Imm); 338 } 339 340 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 341 return TTIImpl->isLegalICmpImmediate(Imm); 342 } 343 344 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 345 int64_t BaseOffset, 346 bool HasBaseReg, int64_t Scale, 347 unsigned AddrSpace, 348 Instruction *I) const { 349 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 350 Scale, AddrSpace, I); 351 } 352 353 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 354 return TTIImpl->isLSRCostLess(C1, C2); 355 } 356 357 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 358 return TTIImpl->isNumRegsMajorCostOfLSR(); 359 } 360 361 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 362 return TTIImpl->isProfitableLSRChainElement(I); 363 } 364 365 bool TargetTransformInfo::canMacroFuseCmp() const { 366 return TTIImpl->canMacroFuseCmp(); 367 } 368 369 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 370 ScalarEvolution *SE, LoopInfo *LI, 371 DominatorTree *DT, AssumptionCache *AC, 372 TargetLibraryInfo *LibInfo) const { 373 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 374 } 375 376 TTI::AddressingModeKind 377 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 378 ScalarEvolution *SE) const { 379 return TTIImpl->getPreferredAddressingMode(L, SE); 380 } 381 382 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 383 Align Alignment) const { 384 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 385 } 386 387 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 388 Align Alignment) const { 389 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 390 } 391 392 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 393 Align Alignment) const { 394 return TTIImpl->isLegalNTStore(DataType, Alignment); 395 } 396 397 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 398 return TTIImpl->isLegalNTLoad(DataType, Alignment); 399 } 400 401 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 402 Align Alignment) const { 403 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 404 } 405 406 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 407 Align Alignment) const { 408 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 409 } 410 411 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType, 412 Align Alignment) const { 413 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment); 414 } 415 416 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType, 417 Align Alignment) const { 418 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment); 419 } 420 421 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 422 return TTIImpl->isLegalMaskedCompressStore(DataType); 423 } 424 425 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 426 return TTIImpl->isLegalMaskedExpandLoad(DataType); 427 } 428 429 bool TargetTransformInfo::enableOrderedReductions() const { 430 return TTIImpl->enableOrderedReductions(); 431 } 432 433 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 434 return TTIImpl->hasDivRemOp(DataType, IsSigned); 435 } 436 437 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 438 unsigned AddrSpace) const { 439 return TTIImpl->hasVolatileVariant(I, AddrSpace); 440 } 441 442 bool TargetTransformInfo::prefersVectorizedAddressing() const { 443 return TTIImpl->prefersVectorizedAddressing(); 444 } 445 446 InstructionCost TargetTransformInfo::getScalingFactorCost( 447 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 448 int64_t Scale, unsigned AddrSpace) const { 449 InstructionCost Cost = TTIImpl->getScalingFactorCost( 450 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 451 assert(Cost >= 0 && "TTI should not produce negative costs!"); 452 return Cost; 453 } 454 455 bool TargetTransformInfo::LSRWithInstrQueries() const { 456 return TTIImpl->LSRWithInstrQueries(); 457 } 458 459 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 460 return TTIImpl->isTruncateFree(Ty1, Ty2); 461 } 462 463 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 464 return TTIImpl->isProfitableToHoist(I); 465 } 466 467 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 468 469 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 470 return TTIImpl->isTypeLegal(Ty); 471 } 472 473 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 474 return TTIImpl->getRegUsageForType(Ty); 475 } 476 477 bool TargetTransformInfo::shouldBuildLookupTables() const { 478 return TTIImpl->shouldBuildLookupTables(); 479 } 480 481 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 482 Constant *C) const { 483 return TTIImpl->shouldBuildLookupTablesForConstant(C); 484 } 485 486 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 487 return TTIImpl->shouldBuildRelLookupTables(); 488 } 489 490 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 491 return TTIImpl->useColdCCForColdCall(F); 492 } 493 494 InstructionCost 495 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 496 const APInt &DemandedElts, 497 bool Insert, bool Extract) const { 498 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 499 } 500 501 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 502 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 503 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 504 } 505 506 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 507 return TTIImpl->supportsEfficientVectorElementLoadStore(); 508 } 509 510 bool TargetTransformInfo::enableAggressiveInterleaving( 511 bool LoopHasReductions) const { 512 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 513 } 514 515 TargetTransformInfo::MemCmpExpansionOptions 516 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 517 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 518 } 519 520 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 521 return TTIImpl->enableInterleavedAccessVectorization(); 522 } 523 524 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 525 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 526 } 527 528 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 529 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 530 } 531 532 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 533 unsigned BitWidth, 534 unsigned AddressSpace, 535 Align Alignment, 536 bool *Fast) const { 537 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 538 AddressSpace, Alignment, Fast); 539 } 540 541 TargetTransformInfo::PopcntSupportKind 542 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 543 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 544 } 545 546 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 547 return TTIImpl->haveFastSqrt(Ty); 548 } 549 550 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 551 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 552 } 553 554 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 555 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 556 assert(Cost >= 0 && "TTI should not produce negative costs!"); 557 return Cost; 558 } 559 560 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 561 unsigned Idx, 562 const APInt &Imm, 563 Type *Ty) const { 564 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 565 assert(Cost >= 0 && "TTI should not produce negative costs!"); 566 return Cost; 567 } 568 569 InstructionCost 570 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 571 TTI::TargetCostKind CostKind) const { 572 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 573 assert(Cost >= 0 && "TTI should not produce negative costs!"); 574 return Cost; 575 } 576 577 InstructionCost TargetTransformInfo::getIntImmCostInst( 578 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 579 TTI::TargetCostKind CostKind, Instruction *Inst) const { 580 InstructionCost Cost = 581 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 582 assert(Cost >= 0 && "TTI should not produce negative costs!"); 583 return Cost; 584 } 585 586 InstructionCost 587 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 588 const APInt &Imm, Type *Ty, 589 TTI::TargetCostKind CostKind) const { 590 InstructionCost Cost = 591 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 592 assert(Cost >= 0 && "TTI should not produce negative costs!"); 593 return Cost; 594 } 595 596 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 597 return TTIImpl->getNumberOfRegisters(ClassID); 598 } 599 600 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 601 Type *Ty) const { 602 return TTIImpl->getRegisterClassForType(Vector, Ty); 603 } 604 605 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 606 return TTIImpl->getRegisterClassName(ClassID); 607 } 608 609 TypeSize TargetTransformInfo::getRegisterBitWidth( 610 TargetTransformInfo::RegisterKind K) const { 611 return TTIImpl->getRegisterBitWidth(K); 612 } 613 614 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 615 return TTIImpl->getMinVectorRegisterBitWidth(); 616 } 617 618 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 619 return TTIImpl->getMaxVScale(); 620 } 621 622 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 623 return TTIImpl->getVScaleForTuning(); 624 } 625 626 bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { 627 return TTIImpl->shouldMaximizeVectorBandwidth(); 628 } 629 630 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 631 bool IsScalable) const { 632 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 633 } 634 635 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 636 unsigned Opcode) const { 637 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 638 } 639 640 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 641 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 642 return TTIImpl->shouldConsiderAddressTypePromotion( 643 I, AllowPromotionWithoutCommonHeader); 644 } 645 646 unsigned TargetTransformInfo::getCacheLineSize() const { 647 return TTIImpl->getCacheLineSize(); 648 } 649 650 llvm::Optional<unsigned> 651 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 652 return TTIImpl->getCacheSize(Level); 653 } 654 655 llvm::Optional<unsigned> 656 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 657 return TTIImpl->getCacheAssociativity(Level); 658 } 659 660 unsigned TargetTransformInfo::getPrefetchDistance() const { 661 return TTIImpl->getPrefetchDistance(); 662 } 663 664 unsigned TargetTransformInfo::getMinPrefetchStride( 665 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 666 unsigned NumPrefetches, bool HasCall) const { 667 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 668 NumPrefetches, HasCall); 669 } 670 671 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 672 return TTIImpl->getMaxPrefetchIterationsAhead(); 673 } 674 675 bool TargetTransformInfo::enableWritePrefetching() const { 676 return TTIImpl->enableWritePrefetching(); 677 } 678 679 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 680 return TTIImpl->getMaxInterleaveFactor(VF); 681 } 682 683 TargetTransformInfo::OperandValueKind 684 TargetTransformInfo::getOperandInfo(const Value *V, 685 OperandValueProperties &OpProps) { 686 OperandValueKind OpInfo = OK_AnyValue; 687 OpProps = OP_None; 688 689 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 690 if (CI->getValue().isPowerOf2()) 691 OpProps = OP_PowerOf2; 692 return OK_UniformConstantValue; 693 } 694 695 // A broadcast shuffle creates a uniform value. 696 // TODO: Add support for non-zero index broadcasts. 697 // TODO: Add support for different source vector width. 698 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 699 if (ShuffleInst->isZeroEltSplat()) 700 OpInfo = OK_UniformValue; 701 702 const Value *Splat = getSplatValue(V); 703 704 // Check for a splat of a constant or for a non uniform vector of constants 705 // and check if the constant(s) are all powers of two. 706 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 707 OpInfo = OK_NonUniformConstantValue; 708 if (Splat) { 709 OpInfo = OK_UniformConstantValue; 710 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 711 if (CI->getValue().isPowerOf2()) 712 OpProps = OP_PowerOf2; 713 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 714 OpProps = OP_PowerOf2; 715 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 716 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 717 if (CI->getValue().isPowerOf2()) 718 continue; 719 OpProps = OP_None; 720 break; 721 } 722 } 723 } 724 725 // Check for a splat of a uniform value. This is not loop aware, so return 726 // true only for the obviously uniform cases (argument, globalvalue) 727 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 728 OpInfo = OK_UniformValue; 729 730 return OpInfo; 731 } 732 733 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 734 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 735 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 736 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 737 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 738 InstructionCost Cost = 739 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 740 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 741 assert(Cost >= 0 && "TTI should not produce negative costs!"); 742 return Cost; 743 } 744 745 InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind, 746 VectorType *Ty, 747 ArrayRef<int> Mask, 748 int Index, 749 VectorType *SubTp) const { 750 InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp); 751 assert(Cost >= 0 && "TTI should not produce negative costs!"); 752 return Cost; 753 } 754 755 TTI::CastContextHint 756 TargetTransformInfo::getCastContextHint(const Instruction *I) { 757 if (!I) 758 return CastContextHint::None; 759 760 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 761 unsigned GatScatOp) { 762 const Instruction *I = dyn_cast<Instruction>(V); 763 if (!I) 764 return CastContextHint::None; 765 766 if (I->getOpcode() == LdStOp) 767 return CastContextHint::Normal; 768 769 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 770 if (II->getIntrinsicID() == MaskedOp) 771 return TTI::CastContextHint::Masked; 772 if (II->getIntrinsicID() == GatScatOp) 773 return TTI::CastContextHint::GatherScatter; 774 } 775 776 return TTI::CastContextHint::None; 777 }; 778 779 switch (I->getOpcode()) { 780 case Instruction::ZExt: 781 case Instruction::SExt: 782 case Instruction::FPExt: 783 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 784 Intrinsic::masked_load, Intrinsic::masked_gather); 785 case Instruction::Trunc: 786 case Instruction::FPTrunc: 787 if (I->hasOneUse()) 788 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 789 Intrinsic::masked_store, 790 Intrinsic::masked_scatter); 791 break; 792 default: 793 return CastContextHint::None; 794 } 795 796 return TTI::CastContextHint::None; 797 } 798 799 InstructionCost TargetTransformInfo::getCastInstrCost( 800 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 801 TTI::TargetCostKind CostKind, const Instruction *I) const { 802 assert((I == nullptr || I->getOpcode() == Opcode) && 803 "Opcode should reflect passed instruction."); 804 InstructionCost Cost = 805 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 806 assert(Cost >= 0 && "TTI should not produce negative costs!"); 807 return Cost; 808 } 809 810 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 811 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 812 InstructionCost Cost = 813 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 814 assert(Cost >= 0 && "TTI should not produce negative costs!"); 815 return Cost; 816 } 817 818 InstructionCost TargetTransformInfo::getCFInstrCost( 819 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 820 assert((I == nullptr || I->getOpcode() == Opcode) && 821 "Opcode should reflect passed instruction."); 822 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 823 assert(Cost >= 0 && "TTI should not produce negative costs!"); 824 return Cost; 825 } 826 827 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 828 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 829 TTI::TargetCostKind CostKind, const Instruction *I) const { 830 assert((I == nullptr || I->getOpcode() == Opcode) && 831 "Opcode should reflect passed instruction."); 832 InstructionCost Cost = 833 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 834 assert(Cost >= 0 && "TTI should not produce negative costs!"); 835 return Cost; 836 } 837 838 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 839 Type *Val, 840 unsigned Index) const { 841 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 842 assert(Cost >= 0 && "TTI should not produce negative costs!"); 843 return Cost; 844 } 845 846 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 847 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 848 TTI::TargetCostKind CostKind) { 849 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 850 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 851 assert(Cost >= 0 && "TTI should not produce negative costs!"); 852 return Cost; 853 } 854 855 InstructionCost TargetTransformInfo::getMemoryOpCost( 856 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 857 TTI::TargetCostKind CostKind, const Instruction *I) const { 858 assert((I == nullptr || I->getOpcode() == Opcode) && 859 "Opcode should reflect passed instruction."); 860 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 861 AddressSpace, CostKind, I); 862 assert(Cost >= 0 && "TTI should not produce negative costs!"); 863 return Cost; 864 } 865 866 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 867 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 868 TTI::TargetCostKind CostKind) const { 869 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 870 AddressSpace, CostKind); 871 assert(Cost >= 0 && "TTI should not produce negative costs!"); 872 return Cost; 873 } 874 875 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 876 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 877 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 878 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 879 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 880 assert(Cost >= 0 && "TTI should not produce negative costs!"); 881 return Cost; 882 } 883 884 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 885 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 886 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 887 bool UseMaskForCond, bool UseMaskForGaps) const { 888 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 889 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 890 UseMaskForCond, UseMaskForGaps); 891 assert(Cost >= 0 && "TTI should not produce negative costs!"); 892 return Cost; 893 } 894 895 InstructionCost 896 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 897 TTI::TargetCostKind CostKind) const { 898 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 899 assert(Cost >= 0 && "TTI should not produce negative costs!"); 900 return Cost; 901 } 902 903 InstructionCost 904 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 905 ArrayRef<Type *> Tys, 906 TTI::TargetCostKind CostKind) const { 907 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 908 assert(Cost >= 0 && "TTI should not produce negative costs!"); 909 return Cost; 910 } 911 912 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 913 return TTIImpl->getNumberOfParts(Tp); 914 } 915 916 InstructionCost 917 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 918 const SCEV *Ptr) const { 919 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 920 assert(Cost >= 0 && "TTI should not produce negative costs!"); 921 return Cost; 922 } 923 924 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 925 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 926 assert(Cost >= 0 && "TTI should not produce negative costs!"); 927 return Cost; 928 } 929 930 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 931 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 932 TTI::TargetCostKind CostKind) const { 933 InstructionCost Cost = 934 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 935 assert(Cost >= 0 && "TTI should not produce negative costs!"); 936 return Cost; 937 } 938 939 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 940 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 941 TTI::TargetCostKind CostKind) const { 942 InstructionCost Cost = 943 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 944 assert(Cost >= 0 && "TTI should not produce negative costs!"); 945 return Cost; 946 } 947 948 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 949 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 950 TTI::TargetCostKind CostKind) const { 951 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 952 CostKind); 953 } 954 955 InstructionCost 956 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 957 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 958 } 959 960 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 961 MemIntrinsicInfo &Info) const { 962 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 963 } 964 965 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 966 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 967 } 968 969 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 970 IntrinsicInst *Inst, Type *ExpectedType) const { 971 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 972 } 973 974 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 975 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 976 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const { 977 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 978 DestAddrSpace, SrcAlign, DestAlign); 979 } 980 981 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 982 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 983 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 984 unsigned SrcAlign, unsigned DestAlign) const { 985 TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes, 986 SrcAddrSpace, DestAddrSpace, 987 SrcAlign, DestAlign); 988 } 989 990 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 991 const Function *Callee) const { 992 return TTIImpl->areInlineCompatible(Caller, Callee); 993 } 994 995 bool TargetTransformInfo::areTypesABICompatible( 996 const Function *Caller, const Function *Callee, 997 const ArrayRef<Type *> &Types) const { 998 return TTIImpl->areTypesABICompatible(Caller, Callee, Types); 999 } 1000 1001 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 1002 Type *Ty) const { 1003 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 1004 } 1005 1006 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 1007 Type *Ty) const { 1008 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 1009 } 1010 1011 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1012 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1013 } 1014 1015 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1016 return TTIImpl->isLegalToVectorizeLoad(LI); 1017 } 1018 1019 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1020 return TTIImpl->isLegalToVectorizeStore(SI); 1021 } 1022 1023 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1024 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1025 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1026 AddrSpace); 1027 } 1028 1029 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1030 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1031 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1032 AddrSpace); 1033 } 1034 1035 bool TargetTransformInfo::isLegalToVectorizeReduction( 1036 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1037 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1038 } 1039 1040 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1041 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1042 } 1043 1044 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1045 unsigned LoadSize, 1046 unsigned ChainSizeInBytes, 1047 VectorType *VecTy) const { 1048 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1049 } 1050 1051 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1052 unsigned StoreSize, 1053 unsigned ChainSizeInBytes, 1054 VectorType *VecTy) const { 1055 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1056 } 1057 1058 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1059 ReductionFlags Flags) const { 1060 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1061 } 1062 1063 bool TargetTransformInfo::preferPredicatedReductionSelect( 1064 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1065 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1066 } 1067 1068 TargetTransformInfo::VPLegalization 1069 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1070 return TTIImpl->getVPLegalizationStrategy(VPI); 1071 } 1072 1073 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1074 return TTIImpl->shouldExpandReduction(II); 1075 } 1076 1077 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1078 return TTIImpl->getGISelRematGlobalCost(); 1079 } 1080 1081 bool TargetTransformInfo::supportsScalableVectors() const { 1082 return TTIImpl->supportsScalableVectors(); 1083 } 1084 1085 bool TargetTransformInfo::enableScalableVectorization() const { 1086 return TTIImpl->enableScalableVectorization(); 1087 } 1088 1089 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType, 1090 Align Alignment) const { 1091 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment); 1092 } 1093 1094 InstructionCost 1095 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1096 return TTIImpl->getInstructionLatency(I); 1097 } 1098 1099 InstructionCost 1100 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1101 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1102 1103 switch (I->getOpcode()) { 1104 case Instruction::GetElementPtr: 1105 case Instruction::Ret: 1106 case Instruction::PHI: 1107 case Instruction::Br: 1108 case Instruction::Add: 1109 case Instruction::FAdd: 1110 case Instruction::Sub: 1111 case Instruction::FSub: 1112 case Instruction::Mul: 1113 case Instruction::FMul: 1114 case Instruction::UDiv: 1115 case Instruction::SDiv: 1116 case Instruction::FDiv: 1117 case Instruction::URem: 1118 case Instruction::SRem: 1119 case Instruction::FRem: 1120 case Instruction::Shl: 1121 case Instruction::LShr: 1122 case Instruction::AShr: 1123 case Instruction::And: 1124 case Instruction::Or: 1125 case Instruction::Xor: 1126 case Instruction::FNeg: 1127 case Instruction::Select: 1128 case Instruction::ICmp: 1129 case Instruction::FCmp: 1130 case Instruction::Store: 1131 case Instruction::Load: 1132 case Instruction::ZExt: 1133 case Instruction::SExt: 1134 case Instruction::FPToUI: 1135 case Instruction::FPToSI: 1136 case Instruction::FPExt: 1137 case Instruction::PtrToInt: 1138 case Instruction::IntToPtr: 1139 case Instruction::SIToFP: 1140 case Instruction::UIToFP: 1141 case Instruction::Trunc: 1142 case Instruction::FPTrunc: 1143 case Instruction::BitCast: 1144 case Instruction::AddrSpaceCast: 1145 case Instruction::ExtractElement: 1146 case Instruction::InsertElement: 1147 case Instruction::ExtractValue: 1148 case Instruction::ShuffleVector: 1149 case Instruction::Call: 1150 case Instruction::Switch: 1151 return getUserCost(I, CostKind); 1152 default: 1153 // We don't have any information on this instruction. 1154 return -1; 1155 } 1156 } 1157 1158 TargetTransformInfo::Concept::~Concept() {} 1159 1160 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1161 1162 TargetIRAnalysis::TargetIRAnalysis( 1163 std::function<Result(const Function &)> TTICallback) 1164 : TTICallback(std::move(TTICallback)) {} 1165 1166 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1167 FunctionAnalysisManager &) { 1168 return TTICallback(F); 1169 } 1170 1171 AnalysisKey TargetIRAnalysis::Key; 1172 1173 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1174 return Result(F.getParent()->getDataLayout()); 1175 } 1176 1177 // Register the basic pass. 1178 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1179 "Target Transform Information", false, true) 1180 char TargetTransformInfoWrapperPass::ID = 0; 1181 1182 void TargetTransformInfoWrapperPass::anchor() {} 1183 1184 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1185 : ImmutablePass(ID) { 1186 initializeTargetTransformInfoWrapperPassPass( 1187 *PassRegistry::getPassRegistry()); 1188 } 1189 1190 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1191 TargetIRAnalysis TIRA) 1192 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1193 initializeTargetTransformInfoWrapperPassPass( 1194 *PassRegistry::getPassRegistry()); 1195 } 1196 1197 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1198 FunctionAnalysisManager DummyFAM; 1199 TTI = TIRA.run(F, DummyFAM); 1200 return *TTI; 1201 } 1202 1203 ImmutablePass * 1204 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1205 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1206 } 1207