1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "llvm/Analysis/TargetTransformInfo.h" 10 #include "llvm/Analysis/CFG.h" 11 #include "llvm/Analysis/LoopIterator.h" 12 #include "llvm/Analysis/TargetTransformInfoImpl.h" 13 #include "llvm/IR/CFG.h" 14 #include "llvm/IR/DataLayout.h" 15 #include "llvm/IR/Dominators.h" 16 #include "llvm/IR/Instruction.h" 17 #include "llvm/IR/Instructions.h" 18 #include "llvm/IR/IntrinsicInst.h" 19 #include "llvm/IR/Module.h" 20 #include "llvm/IR/Operator.h" 21 #include "llvm/IR/PatternMatch.h" 22 #include "llvm/InitializePasses.h" 23 #include "llvm/Support/CommandLine.h" 24 #include "llvm/Support/ErrorHandling.h" 25 #include <utility> 26 27 using namespace llvm; 28 using namespace PatternMatch; 29 30 #define DEBUG_TYPE "tti" 31 32 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false), 33 cl::Hidden, 34 cl::desc("Recognize reduction patterns.")); 35 36 namespace { 37 /// No-op implementation of the TTI interface using the utility base 38 /// classes. 39 /// 40 /// This is used when no target specific information is available. 41 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> { 42 explicit NoTTIImpl(const DataLayout &DL) 43 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {} 44 }; 45 } // namespace 46 47 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) { 48 // If the loop has irreducible control flow, it can not be converted to 49 // Hardware loop. 50 LoopBlocksRPO RPOT(L); 51 RPOT.perform(&LI); 52 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI)) 53 return false; 54 return true; 55 } 56 57 IntrinsicCostAttributes::IntrinsicCostAttributes( 58 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost) 59 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id), 60 ScalarizationCost(ScalarizationCost) { 61 62 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI)) 63 FMF = FPMO->getFastMathFlags(); 64 65 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end()); 66 FunctionType *FTy = CI.getCalledFunction()->getFunctionType(); 67 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end()); 68 } 69 70 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 71 ArrayRef<Type *> Tys, 72 FastMathFlags Flags, 73 const IntrinsicInst *I, 74 InstructionCost ScalarCost) 75 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 76 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 77 } 78 79 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty, 80 ArrayRef<const Value *> Args) 81 : RetTy(Ty), IID(Id) { 82 83 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 84 ParamTys.reserve(Arguments.size()); 85 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx) 86 ParamTys.push_back(Arguments[Idx]->getType()); 87 } 88 89 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy, 90 ArrayRef<const Value *> Args, 91 ArrayRef<Type *> Tys, 92 FastMathFlags Flags, 93 const IntrinsicInst *I, 94 InstructionCost ScalarCost) 95 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) { 96 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end()); 97 Arguments.insert(Arguments.begin(), Args.begin(), Args.end()); 98 } 99 100 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE, 101 LoopInfo &LI, DominatorTree &DT, 102 bool ForceNestedLoop, 103 bool ForceHardwareLoopPHI) { 104 SmallVector<BasicBlock *, 4> ExitingBlocks; 105 L->getExitingBlocks(ExitingBlocks); 106 107 for (BasicBlock *BB : ExitingBlocks) { 108 // If we pass the updated counter back through a phi, we need to know 109 // which latch the updated value will be coming from. 110 if (!L->isLoopLatch(BB)) { 111 if (ForceHardwareLoopPHI || CounterInReg) 112 continue; 113 } 114 115 const SCEV *EC = SE.getExitCount(L, BB); 116 if (isa<SCEVCouldNotCompute>(EC)) 117 continue; 118 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) { 119 if (ConstEC->getValue()->isZero()) 120 continue; 121 } else if (!SE.isLoopInvariant(EC, L)) 122 continue; 123 124 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth()) 125 continue; 126 127 // If this exiting block is contained in a nested loop, it is not eligible 128 // for insertion of the branch-and-decrement since the inner loop would 129 // end up messing up the value in the CTR. 130 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop) 131 continue; 132 133 // We now have a loop-invariant count of loop iterations (which is not the 134 // constant zero) for which we know that this loop will not exit via this 135 // existing block. 136 137 // We need to make sure that this block will run on every loop iteration. 138 // For this to be true, we must dominate all blocks with backedges. Such 139 // blocks are in-loop predecessors to the header block. 140 bool NotAlways = false; 141 for (BasicBlock *Pred : predecessors(L->getHeader())) { 142 if (!L->contains(Pred)) 143 continue; 144 145 if (!DT.dominates(BB, Pred)) { 146 NotAlways = true; 147 break; 148 } 149 } 150 151 if (NotAlways) 152 continue; 153 154 // Make sure this blocks ends with a conditional branch. 155 Instruction *TI = BB->getTerminator(); 156 if (!TI) 157 continue; 158 159 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) { 160 if (!BI->isConditional()) 161 continue; 162 163 ExitBranch = BI; 164 } else 165 continue; 166 167 // Note that this block may not be the loop latch block, even if the loop 168 // has a latch block. 169 ExitBlock = BB; 170 ExitCount = EC; 171 break; 172 } 173 174 if (!ExitBlock) 175 return false; 176 return true; 177 } 178 179 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL) 180 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {} 181 182 TargetTransformInfo::~TargetTransformInfo() {} 183 184 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg) 185 : TTIImpl(std::move(Arg.TTIImpl)) {} 186 187 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) { 188 TTIImpl = std::move(RHS.TTIImpl); 189 return *this; 190 } 191 192 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const { 193 return TTIImpl->getInliningThresholdMultiplier(); 194 } 195 196 unsigned 197 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const { 198 return TTIImpl->adjustInliningThreshold(CB); 199 } 200 201 int TargetTransformInfo::getInlinerVectorBonusPercent() const { 202 return TTIImpl->getInlinerVectorBonusPercent(); 203 } 204 205 InstructionCost 206 TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr, 207 ArrayRef<const Value *> Operands, 208 TTI::TargetCostKind CostKind) const { 209 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, CostKind); 210 } 211 212 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters( 213 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI, 214 BlockFrequencyInfo *BFI) const { 215 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI); 216 } 217 218 InstructionCost 219 TargetTransformInfo::getUserCost(const User *U, 220 ArrayRef<const Value *> Operands, 221 enum TargetCostKind CostKind) const { 222 InstructionCost Cost = TTIImpl->getUserCost(U, Operands, CostKind); 223 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) && 224 "TTI should not produce negative costs!"); 225 return Cost; 226 } 227 228 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const { 229 return TTIImpl->getPredictableBranchThreshold(); 230 } 231 232 bool TargetTransformInfo::hasBranchDivergence() const { 233 return TTIImpl->hasBranchDivergence(); 234 } 235 236 bool TargetTransformInfo::useGPUDivergenceAnalysis() const { 237 return TTIImpl->useGPUDivergenceAnalysis(); 238 } 239 240 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const { 241 return TTIImpl->isSourceOfDivergence(V); 242 } 243 244 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const { 245 return TTIImpl->isAlwaysUniform(V); 246 } 247 248 unsigned TargetTransformInfo::getFlatAddressSpace() const { 249 return TTIImpl->getFlatAddressSpace(); 250 } 251 252 bool TargetTransformInfo::collectFlatAddressOperands( 253 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const { 254 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID); 255 } 256 257 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS, 258 unsigned ToAS) const { 259 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS); 260 } 261 262 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace( 263 unsigned AS) const { 264 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS); 265 } 266 267 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const { 268 return TTIImpl->getAssumedAddrSpace(V); 269 } 270 271 std::pair<const Value *, unsigned> 272 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const { 273 return TTIImpl->getPredicatedAddrSpace(V); 274 } 275 276 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace( 277 IntrinsicInst *II, Value *OldV, Value *NewV) const { 278 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV); 279 } 280 281 bool TargetTransformInfo::isLoweredToCall(const Function *F) const { 282 return TTIImpl->isLoweredToCall(F); 283 } 284 285 bool TargetTransformInfo::isHardwareLoopProfitable( 286 Loop *L, ScalarEvolution &SE, AssumptionCache &AC, 287 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const { 288 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo); 289 } 290 291 bool TargetTransformInfo::preferPredicateOverEpilogue( 292 Loop *L, LoopInfo *LI, ScalarEvolution &SE, AssumptionCache &AC, 293 TargetLibraryInfo *TLI, DominatorTree *DT, 294 const LoopAccessInfo *LAI) const { 295 return TTIImpl->preferPredicateOverEpilogue(L, LI, SE, AC, TLI, DT, LAI); 296 } 297 298 bool TargetTransformInfo::emitGetActiveLaneMask() const { 299 return TTIImpl->emitGetActiveLaneMask(); 300 } 301 302 Optional<Instruction *> 303 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC, 304 IntrinsicInst &II) const { 305 return TTIImpl->instCombineIntrinsic(IC, II); 306 } 307 308 Optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic( 309 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known, 310 bool &KnownBitsComputed) const { 311 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known, 312 KnownBitsComputed); 313 } 314 315 Optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic( 316 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts, 317 APInt &UndefElts2, APInt &UndefElts3, 318 std::function<void(Instruction *, unsigned, APInt, APInt &)> 319 SimplifyAndSetOp) const { 320 return TTIImpl->simplifyDemandedVectorEltsIntrinsic( 321 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3, 322 SimplifyAndSetOp); 323 } 324 325 void TargetTransformInfo::getUnrollingPreferences( 326 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP, 327 OptimizationRemarkEmitter *ORE) const { 328 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE); 329 } 330 331 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE, 332 PeelingPreferences &PP) const { 333 return TTIImpl->getPeelingPreferences(L, SE, PP); 334 } 335 336 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const { 337 return TTIImpl->isLegalAddImmediate(Imm); 338 } 339 340 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const { 341 return TTIImpl->isLegalICmpImmediate(Imm); 342 } 343 344 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, 345 int64_t BaseOffset, 346 bool HasBaseReg, int64_t Scale, 347 unsigned AddrSpace, 348 Instruction *I) const { 349 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg, 350 Scale, AddrSpace, I); 351 } 352 353 bool TargetTransformInfo::isLSRCostLess(LSRCost &C1, LSRCost &C2) const { 354 return TTIImpl->isLSRCostLess(C1, C2); 355 } 356 357 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const { 358 return TTIImpl->isNumRegsMajorCostOfLSR(); 359 } 360 361 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const { 362 return TTIImpl->isProfitableLSRChainElement(I); 363 } 364 365 bool TargetTransformInfo::canMacroFuseCmp() const { 366 return TTIImpl->canMacroFuseCmp(); 367 } 368 369 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI, 370 ScalarEvolution *SE, LoopInfo *LI, 371 DominatorTree *DT, AssumptionCache *AC, 372 TargetLibraryInfo *LibInfo) const { 373 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo); 374 } 375 376 TTI::AddressingModeKind 377 TargetTransformInfo::getPreferredAddressingMode(const Loop *L, 378 ScalarEvolution *SE) const { 379 return TTIImpl->getPreferredAddressingMode(L, SE); 380 } 381 382 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType, 383 Align Alignment) const { 384 return TTIImpl->isLegalMaskedStore(DataType, Alignment); 385 } 386 387 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType, 388 Align Alignment) const { 389 return TTIImpl->isLegalMaskedLoad(DataType, Alignment); 390 } 391 392 bool TargetTransformInfo::isLegalNTStore(Type *DataType, 393 Align Alignment) const { 394 return TTIImpl->isLegalNTStore(DataType, Alignment); 395 } 396 397 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const { 398 return TTIImpl->isLegalNTLoad(DataType, Alignment); 399 } 400 401 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType, 402 Align Alignment) const { 403 return TTIImpl->isLegalMaskedGather(DataType, Alignment); 404 } 405 406 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType, 407 Align Alignment) const { 408 return TTIImpl->isLegalMaskedScatter(DataType, Alignment); 409 } 410 411 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const { 412 return TTIImpl->isLegalMaskedCompressStore(DataType); 413 } 414 415 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const { 416 return TTIImpl->isLegalMaskedExpandLoad(DataType); 417 } 418 419 bool TargetTransformInfo::enableOrderedReductions() const { 420 return TTIImpl->enableOrderedReductions(); 421 } 422 423 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const { 424 return TTIImpl->hasDivRemOp(DataType, IsSigned); 425 } 426 427 bool TargetTransformInfo::hasVolatileVariant(Instruction *I, 428 unsigned AddrSpace) const { 429 return TTIImpl->hasVolatileVariant(I, AddrSpace); 430 } 431 432 bool TargetTransformInfo::prefersVectorizedAddressing() const { 433 return TTIImpl->prefersVectorizedAddressing(); 434 } 435 436 InstructionCost TargetTransformInfo::getScalingFactorCost( 437 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, 438 int64_t Scale, unsigned AddrSpace) const { 439 InstructionCost Cost = TTIImpl->getScalingFactorCost( 440 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace); 441 assert(Cost >= 0 && "TTI should not produce negative costs!"); 442 return Cost; 443 } 444 445 bool TargetTransformInfo::LSRWithInstrQueries() const { 446 return TTIImpl->LSRWithInstrQueries(); 447 } 448 449 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const { 450 return TTIImpl->isTruncateFree(Ty1, Ty2); 451 } 452 453 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const { 454 return TTIImpl->isProfitableToHoist(I); 455 } 456 457 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); } 458 459 bool TargetTransformInfo::isTypeLegal(Type *Ty) const { 460 return TTIImpl->isTypeLegal(Ty); 461 } 462 463 InstructionCost TargetTransformInfo::getRegUsageForType(Type *Ty) const { 464 return TTIImpl->getRegUsageForType(Ty); 465 } 466 467 bool TargetTransformInfo::shouldBuildLookupTables() const { 468 return TTIImpl->shouldBuildLookupTables(); 469 } 470 471 bool TargetTransformInfo::shouldBuildLookupTablesForConstant( 472 Constant *C) const { 473 return TTIImpl->shouldBuildLookupTablesForConstant(C); 474 } 475 476 bool TargetTransformInfo::shouldBuildRelLookupTables() const { 477 return TTIImpl->shouldBuildRelLookupTables(); 478 } 479 480 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const { 481 return TTIImpl->useColdCCForColdCall(F); 482 } 483 484 InstructionCost 485 TargetTransformInfo::getScalarizationOverhead(VectorType *Ty, 486 const APInt &DemandedElts, 487 bool Insert, bool Extract) const { 488 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract); 489 } 490 491 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead( 492 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys) const { 493 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys); 494 } 495 496 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const { 497 return TTIImpl->supportsEfficientVectorElementLoadStore(); 498 } 499 500 bool TargetTransformInfo::enableAggressiveInterleaving( 501 bool LoopHasReductions) const { 502 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions); 503 } 504 505 TargetTransformInfo::MemCmpExpansionOptions 506 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const { 507 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp); 508 } 509 510 bool TargetTransformInfo::enableInterleavedAccessVectorization() const { 511 return TTIImpl->enableInterleavedAccessVectorization(); 512 } 513 514 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const { 515 return TTIImpl->enableMaskedInterleavedAccessVectorization(); 516 } 517 518 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const { 519 return TTIImpl->isFPVectorizationPotentiallyUnsafe(); 520 } 521 522 bool TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context, 523 unsigned BitWidth, 524 unsigned AddressSpace, 525 Align Alignment, 526 bool *Fast) const { 527 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth, 528 AddressSpace, Alignment, Fast); 529 } 530 531 TargetTransformInfo::PopcntSupportKind 532 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const { 533 return TTIImpl->getPopcntSupport(IntTyWidthInBit); 534 } 535 536 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const { 537 return TTIImpl->haveFastSqrt(Ty); 538 } 539 540 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const { 541 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty); 542 } 543 544 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const { 545 InstructionCost Cost = TTIImpl->getFPOpCost(Ty); 546 assert(Cost >= 0 && "TTI should not produce negative costs!"); 547 return Cost; 548 } 549 550 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode, 551 unsigned Idx, 552 const APInt &Imm, 553 Type *Ty) const { 554 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty); 555 assert(Cost >= 0 && "TTI should not produce negative costs!"); 556 return Cost; 557 } 558 559 InstructionCost 560 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty, 561 TTI::TargetCostKind CostKind) const { 562 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind); 563 assert(Cost >= 0 && "TTI should not produce negative costs!"); 564 return Cost; 565 } 566 567 InstructionCost TargetTransformInfo::getIntImmCostInst( 568 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty, 569 TTI::TargetCostKind CostKind, Instruction *Inst) const { 570 InstructionCost Cost = 571 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst); 572 assert(Cost >= 0 && "TTI should not produce negative costs!"); 573 return Cost; 574 } 575 576 InstructionCost 577 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, 578 const APInt &Imm, Type *Ty, 579 TTI::TargetCostKind CostKind) const { 580 InstructionCost Cost = 581 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind); 582 assert(Cost >= 0 && "TTI should not produce negative costs!"); 583 return Cost; 584 } 585 586 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const { 587 return TTIImpl->getNumberOfRegisters(ClassID); 588 } 589 590 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector, 591 Type *Ty) const { 592 return TTIImpl->getRegisterClassForType(Vector, Ty); 593 } 594 595 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const { 596 return TTIImpl->getRegisterClassName(ClassID); 597 } 598 599 TypeSize TargetTransformInfo::getRegisterBitWidth( 600 TargetTransformInfo::RegisterKind K) const { 601 return TTIImpl->getRegisterBitWidth(K); 602 } 603 604 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { 605 return TTIImpl->getMinVectorRegisterBitWidth(); 606 } 607 608 Optional<unsigned> TargetTransformInfo::getMaxVScale() const { 609 return TTIImpl->getMaxVScale(); 610 } 611 612 Optional<unsigned> TargetTransformInfo::getVScaleForTuning() const { 613 return TTIImpl->getVScaleForTuning(); 614 } 615 616 bool TargetTransformInfo::shouldMaximizeVectorBandwidth() const { 617 return TTIImpl->shouldMaximizeVectorBandwidth(); 618 } 619 620 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth, 621 bool IsScalable) const { 622 return TTIImpl->getMinimumVF(ElemWidth, IsScalable); 623 } 624 625 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth, 626 unsigned Opcode) const { 627 return TTIImpl->getMaximumVF(ElemWidth, Opcode); 628 } 629 630 bool TargetTransformInfo::shouldConsiderAddressTypePromotion( 631 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const { 632 return TTIImpl->shouldConsiderAddressTypePromotion( 633 I, AllowPromotionWithoutCommonHeader); 634 } 635 636 unsigned TargetTransformInfo::getCacheLineSize() const { 637 return TTIImpl->getCacheLineSize(); 638 } 639 640 llvm::Optional<unsigned> 641 TargetTransformInfo::getCacheSize(CacheLevel Level) const { 642 return TTIImpl->getCacheSize(Level); 643 } 644 645 llvm::Optional<unsigned> 646 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const { 647 return TTIImpl->getCacheAssociativity(Level); 648 } 649 650 unsigned TargetTransformInfo::getPrefetchDistance() const { 651 return TTIImpl->getPrefetchDistance(); 652 } 653 654 unsigned TargetTransformInfo::getMinPrefetchStride( 655 unsigned NumMemAccesses, unsigned NumStridedMemAccesses, 656 unsigned NumPrefetches, bool HasCall) const { 657 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses, 658 NumPrefetches, HasCall); 659 } 660 661 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const { 662 return TTIImpl->getMaxPrefetchIterationsAhead(); 663 } 664 665 bool TargetTransformInfo::enableWritePrefetching() const { 666 return TTIImpl->enableWritePrefetching(); 667 } 668 669 unsigned TargetTransformInfo::getMaxInterleaveFactor(unsigned VF) const { 670 return TTIImpl->getMaxInterleaveFactor(VF); 671 } 672 673 TargetTransformInfo::OperandValueKind 674 TargetTransformInfo::getOperandInfo(const Value *V, 675 OperandValueProperties &OpProps) { 676 OperandValueKind OpInfo = OK_AnyValue; 677 OpProps = OP_None; 678 679 if (const auto *CI = dyn_cast<ConstantInt>(V)) { 680 if (CI->getValue().isPowerOf2()) 681 OpProps = OP_PowerOf2; 682 return OK_UniformConstantValue; 683 } 684 685 // A broadcast shuffle creates a uniform value. 686 // TODO: Add support for non-zero index broadcasts. 687 // TODO: Add support for different source vector width. 688 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V)) 689 if (ShuffleInst->isZeroEltSplat()) 690 OpInfo = OK_UniformValue; 691 692 const Value *Splat = getSplatValue(V); 693 694 // Check for a splat of a constant or for a non uniform vector of constants 695 // and check if the constant(s) are all powers of two. 696 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) { 697 OpInfo = OK_NonUniformConstantValue; 698 if (Splat) { 699 OpInfo = OK_UniformConstantValue; 700 if (auto *CI = dyn_cast<ConstantInt>(Splat)) 701 if (CI->getValue().isPowerOf2()) 702 OpProps = OP_PowerOf2; 703 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) { 704 OpProps = OP_PowerOf2; 705 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) { 706 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) 707 if (CI->getValue().isPowerOf2()) 708 continue; 709 OpProps = OP_None; 710 break; 711 } 712 } 713 } 714 715 // Check for a splat of a uniform value. This is not loop aware, so return 716 // true only for the obviously uniform cases (argument, globalvalue) 717 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat))) 718 OpInfo = OK_UniformValue; 719 720 return OpInfo; 721 } 722 723 InstructionCost TargetTransformInfo::getArithmeticInstrCost( 724 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, 725 OperandValueKind Opd1Info, OperandValueKind Opd2Info, 726 OperandValueProperties Opd1PropInfo, OperandValueProperties Opd2PropInfo, 727 ArrayRef<const Value *> Args, const Instruction *CxtI) const { 728 InstructionCost Cost = 729 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info, Opd2Info, 730 Opd1PropInfo, Opd2PropInfo, Args, CxtI); 731 assert(Cost >= 0 && "TTI should not produce negative costs!"); 732 return Cost; 733 } 734 735 InstructionCost TargetTransformInfo::getShuffleCost(ShuffleKind Kind, 736 VectorType *Ty, 737 ArrayRef<int> Mask, 738 int Index, 739 VectorType *SubTp) const { 740 InstructionCost Cost = TTIImpl->getShuffleCost(Kind, Ty, Mask, Index, SubTp); 741 assert(Cost >= 0 && "TTI should not produce negative costs!"); 742 return Cost; 743 } 744 745 TTI::CastContextHint 746 TargetTransformInfo::getCastContextHint(const Instruction *I) { 747 if (!I) 748 return CastContextHint::None; 749 750 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp, 751 unsigned GatScatOp) { 752 const Instruction *I = dyn_cast<Instruction>(V); 753 if (!I) 754 return CastContextHint::None; 755 756 if (I->getOpcode() == LdStOp) 757 return CastContextHint::Normal; 758 759 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) { 760 if (II->getIntrinsicID() == MaskedOp) 761 return TTI::CastContextHint::Masked; 762 if (II->getIntrinsicID() == GatScatOp) 763 return TTI::CastContextHint::GatherScatter; 764 } 765 766 return TTI::CastContextHint::None; 767 }; 768 769 switch (I->getOpcode()) { 770 case Instruction::ZExt: 771 case Instruction::SExt: 772 case Instruction::FPExt: 773 return getLoadStoreKind(I->getOperand(0), Instruction::Load, 774 Intrinsic::masked_load, Intrinsic::masked_gather); 775 case Instruction::Trunc: 776 case Instruction::FPTrunc: 777 if (I->hasOneUse()) 778 return getLoadStoreKind(*I->user_begin(), Instruction::Store, 779 Intrinsic::masked_store, 780 Intrinsic::masked_scatter); 781 break; 782 default: 783 return CastContextHint::None; 784 } 785 786 return TTI::CastContextHint::None; 787 } 788 789 InstructionCost TargetTransformInfo::getCastInstrCost( 790 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH, 791 TTI::TargetCostKind CostKind, const Instruction *I) const { 792 assert((I == nullptr || I->getOpcode() == Opcode) && 793 "Opcode should reflect passed instruction."); 794 InstructionCost Cost = 795 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I); 796 assert(Cost >= 0 && "TTI should not produce negative costs!"); 797 return Cost; 798 } 799 800 InstructionCost TargetTransformInfo::getExtractWithExtendCost( 801 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const { 802 InstructionCost Cost = 803 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index); 804 assert(Cost >= 0 && "TTI should not produce negative costs!"); 805 return Cost; 806 } 807 808 InstructionCost TargetTransformInfo::getCFInstrCost( 809 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const { 810 assert((I == nullptr || I->getOpcode() == Opcode) && 811 "Opcode should reflect passed instruction."); 812 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I); 813 assert(Cost >= 0 && "TTI should not produce negative costs!"); 814 return Cost; 815 } 816 817 InstructionCost TargetTransformInfo::getCmpSelInstrCost( 818 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred, 819 TTI::TargetCostKind CostKind, const Instruction *I) const { 820 assert((I == nullptr || I->getOpcode() == Opcode) && 821 "Opcode should reflect passed instruction."); 822 InstructionCost Cost = 823 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I); 824 assert(Cost >= 0 && "TTI should not produce negative costs!"); 825 return Cost; 826 } 827 828 InstructionCost TargetTransformInfo::getVectorInstrCost(unsigned Opcode, 829 Type *Val, 830 unsigned Index) const { 831 InstructionCost Cost = TTIImpl->getVectorInstrCost(Opcode, Val, Index); 832 assert(Cost >= 0 && "TTI should not produce negative costs!"); 833 return Cost; 834 } 835 836 InstructionCost TargetTransformInfo::getReplicationShuffleCost( 837 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts, 838 TTI::TargetCostKind CostKind) { 839 InstructionCost Cost = TTIImpl->getReplicationShuffleCost( 840 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind); 841 assert(Cost >= 0 && "TTI should not produce negative costs!"); 842 return Cost; 843 } 844 845 InstructionCost TargetTransformInfo::getMemoryOpCost( 846 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 847 TTI::TargetCostKind CostKind, const Instruction *I) const { 848 assert((I == nullptr || I->getOpcode() == Opcode) && 849 "Opcode should reflect passed instruction."); 850 InstructionCost Cost = TTIImpl->getMemoryOpCost(Opcode, Src, Alignment, 851 AddressSpace, CostKind, I); 852 assert(Cost >= 0 && "TTI should not produce negative costs!"); 853 return Cost; 854 } 855 856 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost( 857 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace, 858 TTI::TargetCostKind CostKind) const { 859 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment, 860 AddressSpace, CostKind); 861 assert(Cost >= 0 && "TTI should not produce negative costs!"); 862 return Cost; 863 } 864 865 InstructionCost TargetTransformInfo::getGatherScatterOpCost( 866 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask, 867 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const { 868 InstructionCost Cost = TTIImpl->getGatherScatterOpCost( 869 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I); 870 assert(Cost >= 0 && "TTI should not produce negative costs!"); 871 return Cost; 872 } 873 874 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost( 875 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices, 876 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind, 877 bool UseMaskForCond, bool UseMaskForGaps) const { 878 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost( 879 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind, 880 UseMaskForCond, UseMaskForGaps); 881 assert(Cost >= 0 && "TTI should not produce negative costs!"); 882 return Cost; 883 } 884 885 InstructionCost 886 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA, 887 TTI::TargetCostKind CostKind) const { 888 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind); 889 assert(Cost >= 0 && "TTI should not produce negative costs!"); 890 return Cost; 891 } 892 893 InstructionCost 894 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy, 895 ArrayRef<Type *> Tys, 896 TTI::TargetCostKind CostKind) const { 897 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind); 898 assert(Cost >= 0 && "TTI should not produce negative costs!"); 899 return Cost; 900 } 901 902 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const { 903 return TTIImpl->getNumberOfParts(Tp); 904 } 905 906 InstructionCost 907 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE, 908 const SCEV *Ptr) const { 909 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr); 910 assert(Cost >= 0 && "TTI should not produce negative costs!"); 911 return Cost; 912 } 913 914 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const { 915 InstructionCost Cost = TTIImpl->getMemcpyCost(I); 916 assert(Cost >= 0 && "TTI should not produce negative costs!"); 917 return Cost; 918 } 919 920 InstructionCost TargetTransformInfo::getArithmeticReductionCost( 921 unsigned Opcode, VectorType *Ty, Optional<FastMathFlags> FMF, 922 TTI::TargetCostKind CostKind) const { 923 InstructionCost Cost = 924 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind); 925 assert(Cost >= 0 && "TTI should not produce negative costs!"); 926 return Cost; 927 } 928 929 InstructionCost TargetTransformInfo::getMinMaxReductionCost( 930 VectorType *Ty, VectorType *CondTy, bool IsUnsigned, 931 TTI::TargetCostKind CostKind) const { 932 InstructionCost Cost = 933 TTIImpl->getMinMaxReductionCost(Ty, CondTy, IsUnsigned, CostKind); 934 assert(Cost >= 0 && "TTI should not produce negative costs!"); 935 return Cost; 936 } 937 938 InstructionCost TargetTransformInfo::getExtendedAddReductionCost( 939 bool IsMLA, bool IsUnsigned, Type *ResTy, VectorType *Ty, 940 TTI::TargetCostKind CostKind) const { 941 return TTIImpl->getExtendedAddReductionCost(IsMLA, IsUnsigned, ResTy, Ty, 942 CostKind); 943 } 944 945 InstructionCost 946 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const { 947 return TTIImpl->getCostOfKeepingLiveOverCall(Tys); 948 } 949 950 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst, 951 MemIntrinsicInfo &Info) const { 952 return TTIImpl->getTgtMemIntrinsic(Inst, Info); 953 } 954 955 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const { 956 return TTIImpl->getAtomicMemIntrinsicMaxElementSize(); 957 } 958 959 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic( 960 IntrinsicInst *Inst, Type *ExpectedType) const { 961 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType); 962 } 963 964 Type *TargetTransformInfo::getMemcpyLoopLoweringType( 965 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace, 966 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign) const { 967 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace, 968 DestAddrSpace, SrcAlign, DestAlign); 969 } 970 971 void TargetTransformInfo::getMemcpyLoopResidualLoweringType( 972 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context, 973 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace, 974 unsigned SrcAlign, unsigned DestAlign) const { 975 TTIImpl->getMemcpyLoopResidualLoweringType(OpsOut, Context, RemainingBytes, 976 SrcAddrSpace, DestAddrSpace, 977 SrcAlign, DestAlign); 978 } 979 980 bool TargetTransformInfo::areInlineCompatible(const Function *Caller, 981 const Function *Callee) const { 982 return TTIImpl->areInlineCompatible(Caller, Callee); 983 } 984 985 bool TargetTransformInfo::areFunctionArgsABICompatible( 986 const Function *Caller, const Function *Callee, 987 SmallPtrSetImpl<Argument *> &Args) const { 988 return TTIImpl->areFunctionArgsABICompatible(Caller, Callee, Args); 989 } 990 991 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode, 992 Type *Ty) const { 993 return TTIImpl->isIndexedLoadLegal(Mode, Ty); 994 } 995 996 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode, 997 Type *Ty) const { 998 return TTIImpl->isIndexedStoreLegal(Mode, Ty); 999 } 1000 1001 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const { 1002 return TTIImpl->getLoadStoreVecRegBitWidth(AS); 1003 } 1004 1005 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const { 1006 return TTIImpl->isLegalToVectorizeLoad(LI); 1007 } 1008 1009 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const { 1010 return TTIImpl->isLegalToVectorizeStore(SI); 1011 } 1012 1013 bool TargetTransformInfo::isLegalToVectorizeLoadChain( 1014 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1015 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment, 1016 AddrSpace); 1017 } 1018 1019 bool TargetTransformInfo::isLegalToVectorizeStoreChain( 1020 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const { 1021 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment, 1022 AddrSpace); 1023 } 1024 1025 bool TargetTransformInfo::isLegalToVectorizeReduction( 1026 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const { 1027 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF); 1028 } 1029 1030 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const { 1031 return TTIImpl->isElementTypeLegalForScalableVector(Ty); 1032 } 1033 1034 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF, 1035 unsigned LoadSize, 1036 unsigned ChainSizeInBytes, 1037 VectorType *VecTy) const { 1038 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy); 1039 } 1040 1041 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF, 1042 unsigned StoreSize, 1043 unsigned ChainSizeInBytes, 1044 VectorType *VecTy) const { 1045 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy); 1046 } 1047 1048 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty, 1049 ReductionFlags Flags) const { 1050 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags); 1051 } 1052 1053 bool TargetTransformInfo::preferPredicatedReductionSelect( 1054 unsigned Opcode, Type *Ty, ReductionFlags Flags) const { 1055 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags); 1056 } 1057 1058 TargetTransformInfo::VPLegalization 1059 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const { 1060 return TTIImpl->getVPLegalizationStrategy(VPI); 1061 } 1062 1063 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const { 1064 return TTIImpl->shouldExpandReduction(II); 1065 } 1066 1067 unsigned TargetTransformInfo::getGISelRematGlobalCost() const { 1068 return TTIImpl->getGISelRematGlobalCost(); 1069 } 1070 1071 bool TargetTransformInfo::supportsScalableVectors() const { 1072 return TTIImpl->supportsScalableVectors(); 1073 } 1074 1075 bool TargetTransformInfo::hasActiveVectorLength() const { 1076 return TTIImpl->hasActiveVectorLength(); 1077 } 1078 1079 InstructionCost 1080 TargetTransformInfo::getInstructionLatency(const Instruction *I) const { 1081 return TTIImpl->getInstructionLatency(I); 1082 } 1083 1084 InstructionCost 1085 TargetTransformInfo::getInstructionThroughput(const Instruction *I) const { 1086 TTI::TargetCostKind CostKind = TTI::TCK_RecipThroughput; 1087 1088 switch (I->getOpcode()) { 1089 case Instruction::GetElementPtr: 1090 case Instruction::Ret: 1091 case Instruction::PHI: 1092 case Instruction::Br: 1093 case Instruction::Add: 1094 case Instruction::FAdd: 1095 case Instruction::Sub: 1096 case Instruction::FSub: 1097 case Instruction::Mul: 1098 case Instruction::FMul: 1099 case Instruction::UDiv: 1100 case Instruction::SDiv: 1101 case Instruction::FDiv: 1102 case Instruction::URem: 1103 case Instruction::SRem: 1104 case Instruction::FRem: 1105 case Instruction::Shl: 1106 case Instruction::LShr: 1107 case Instruction::AShr: 1108 case Instruction::And: 1109 case Instruction::Or: 1110 case Instruction::Xor: 1111 case Instruction::FNeg: 1112 case Instruction::Select: 1113 case Instruction::ICmp: 1114 case Instruction::FCmp: 1115 case Instruction::Store: 1116 case Instruction::Load: 1117 case Instruction::ZExt: 1118 case Instruction::SExt: 1119 case Instruction::FPToUI: 1120 case Instruction::FPToSI: 1121 case Instruction::FPExt: 1122 case Instruction::PtrToInt: 1123 case Instruction::IntToPtr: 1124 case Instruction::SIToFP: 1125 case Instruction::UIToFP: 1126 case Instruction::Trunc: 1127 case Instruction::FPTrunc: 1128 case Instruction::BitCast: 1129 case Instruction::AddrSpaceCast: 1130 case Instruction::ExtractElement: 1131 case Instruction::InsertElement: 1132 case Instruction::ExtractValue: 1133 case Instruction::ShuffleVector: 1134 case Instruction::Call: 1135 case Instruction::Switch: 1136 return getUserCost(I, CostKind); 1137 default: 1138 // We don't have any information on this instruction. 1139 return -1; 1140 } 1141 } 1142 1143 TargetTransformInfo::Concept::~Concept() {} 1144 1145 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {} 1146 1147 TargetIRAnalysis::TargetIRAnalysis( 1148 std::function<Result(const Function &)> TTICallback) 1149 : TTICallback(std::move(TTICallback)) {} 1150 1151 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F, 1152 FunctionAnalysisManager &) { 1153 return TTICallback(F); 1154 } 1155 1156 AnalysisKey TargetIRAnalysis::Key; 1157 1158 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) { 1159 return Result(F.getParent()->getDataLayout()); 1160 } 1161 1162 // Register the basic pass. 1163 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti", 1164 "Target Transform Information", false, true) 1165 char TargetTransformInfoWrapperPass::ID = 0; 1166 1167 void TargetTransformInfoWrapperPass::anchor() {} 1168 1169 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass() 1170 : ImmutablePass(ID) { 1171 initializeTargetTransformInfoWrapperPassPass( 1172 *PassRegistry::getPassRegistry()); 1173 } 1174 1175 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass( 1176 TargetIRAnalysis TIRA) 1177 : ImmutablePass(ID), TIRA(std::move(TIRA)) { 1178 initializeTargetTransformInfoWrapperPassPass( 1179 *PassRegistry::getPassRegistry()); 1180 } 1181 1182 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) { 1183 FunctionAnalysisManager DummyFAM; 1184 TTI = TIRA.run(F, DummyFAM); 1185 return *TTI; 1186 } 1187 1188 ImmutablePass * 1189 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) { 1190 return new TargetTransformInfoWrapperPass(std::move(TIRA)); 1191 } 1192