xref: /freebsd/contrib/llvm-project/llvm/lib/Analysis/TargetTransformInfo.cpp (revision 1db9f3b21e39176dd5b67cf8ac378633b172463e) 
1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "llvm/Analysis/TargetTransformInfo.h"
10 #include "llvm/Analysis/CFG.h"
11 #include "llvm/Analysis/LoopIterator.h"
12 #include "llvm/Analysis/TargetTransformInfoImpl.h"
13 #include "llvm/IR/CFG.h"
14 #include "llvm/IR/Dominators.h"
15 #include "llvm/IR/Instruction.h"
16 #include "llvm/IR/Instructions.h"
17 #include "llvm/IR/IntrinsicInst.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/Operator.h"
20 #include "llvm/IR/PatternMatch.h"
21 #include "llvm/InitializePasses.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <optional>
24 #include <utility>
25 
26 using namespace llvm;
27 using namespace PatternMatch;
28 
29 #define DEBUG_TYPE "tti"
30 
31 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
32                                      cl::Hidden,
33                                      cl::desc("Recognize reduction patterns."));
34 
35 static cl::opt<unsigned> CacheLineSize(
36     "cache-line-size", cl::init(0), cl::Hidden,
37     cl::desc("Use this to override the target cache line size when "
38              "specified by the user."));
39 
40 static cl::opt<unsigned> MinPageSize(
41     "min-page-size", cl::init(0), cl::Hidden,
42     cl::desc("Use this to override the target's minimum page size."));
43 
44 static cl::opt<unsigned> PredictableBranchThreshold(
45     "predictable-branch-threshold", cl::init(99), cl::Hidden,
46     cl::desc(
47         "Use this to override the target's predictable branch threshold (%)."));
48 
49 namespace {
50 /// No-op implementation of the TTI interface using the utility base
51 /// classes.
52 ///
53 /// This is used when no target specific information is available.
54 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
55   explicit NoTTIImpl(const DataLayout &DL)
56       : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
57 };
58 } // namespace
59 
60 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
61   // If the loop has irreducible control flow, it can not be converted to
62   // Hardware loop.
63   LoopBlocksRPO RPOT(L);
64   RPOT.perform(&LI);
65   if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
66     return false;
67   return true;
68 }
69 
70 IntrinsicCostAttributes::IntrinsicCostAttributes(
71     Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
72     bool TypeBasedOnly)
73     : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
74       ScalarizationCost(ScalarizationCost) {
75 
76   if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
77     FMF = FPMO->getFastMathFlags();
78 
79   if (!TypeBasedOnly)
80     Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
81   FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
82   ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
83 }
84 
85 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
86                                                  ArrayRef<Type *> Tys,
87                                                  FastMathFlags Flags,
88                                                  const IntrinsicInst *I,
89                                                  InstructionCost ScalarCost)
90     : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
91   ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
92 }
93 
94 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
95                                                  ArrayRef<const Value *> Args)
96     : RetTy(Ty), IID(Id) {
97 
98   Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
99   ParamTys.reserve(Arguments.size());
100   for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx)
101     ParamTys.push_back(Arguments[Idx]->getType());
102 }
103 
104 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
105                                                  ArrayRef<const Value *> Args,
106                                                  ArrayRef<Type *> Tys,
107                                                  FastMathFlags Flags,
108                                                  const IntrinsicInst *I,
109                                                  InstructionCost ScalarCost)
110     : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
111   ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
112   Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
113 }
114 
115 HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
116   // Match default options:
117   // - hardware-loop-counter-bitwidth = 32
118   // - hardware-loop-decrement = 1
119   CountType = Type::getInt32Ty(L->getHeader()->getContext());
120   LoopDecrement = ConstantInt::get(CountType, 1);
121 }
122 
123 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
124                                                LoopInfo &LI, DominatorTree &DT,
125                                                bool ForceNestedLoop,
126                                                bool ForceHardwareLoopPHI) {
127   SmallVector<BasicBlock *, 4> ExitingBlocks;
128   L->getExitingBlocks(ExitingBlocks);
129 
130   for (BasicBlock *BB : ExitingBlocks) {
131     // If we pass the updated counter back through a phi, we need to know
132     // which latch the updated value will be coming from.
133     if (!L->isLoopLatch(BB)) {
134       if (ForceHardwareLoopPHI || CounterInReg)
135         continue;
136     }
137 
138     const SCEV *EC = SE.getExitCount(L, BB);
139     if (isa<SCEVCouldNotCompute>(EC))
140       continue;
141     if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
142       if (ConstEC->getValue()->isZero())
143         continue;
144     } else if (!SE.isLoopInvariant(EC, L))
145       continue;
146 
147     if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
148       continue;
149 
150     // If this exiting block is contained in a nested loop, it is not eligible
151     // for insertion of the branch-and-decrement since the inner loop would
152     // end up messing up the value in the CTR.
153     if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
154       continue;
155 
156     // We now have a loop-invariant count of loop iterations (which is not the
157     // constant zero) for which we know that this loop will not exit via this
158     // existing block.
159 
160     // We need to make sure that this block will run on every loop iteration.
161     // For this to be true, we must dominate all blocks with backedges. Such
162     // blocks are in-loop predecessors to the header block.
163     bool NotAlways = false;
164     for (BasicBlock *Pred : predecessors(L->getHeader())) {
165       if (!L->contains(Pred))
166         continue;
167 
168       if (!DT.dominates(BB, Pred)) {
169         NotAlways = true;
170         break;
171       }
172     }
173 
174     if (NotAlways)
175       continue;
176 
177     // Make sure this blocks ends with a conditional branch.
178     Instruction *TI = BB->getTerminator();
179     if (!TI)
180       continue;
181 
182     if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
183       if (!BI->isConditional())
184         continue;
185 
186       ExitBranch = BI;
187     } else
188       continue;
189 
190     // Note that this block may not be the loop latch block, even if the loop
191     // has a latch block.
192     ExitBlock = BB;
193     ExitCount = EC;
194     break;
195   }
196 
197   if (!ExitBlock)
198     return false;
199   return true;
200 }
201 
202 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
203     : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
204 
205 TargetTransformInfo::~TargetTransformInfo() = default;
206 
207 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
208     : TTIImpl(std::move(Arg.TTIImpl)) {}
209 
210 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
211   TTIImpl = std::move(RHS.TTIImpl);
212   return *this;
213 }
214 
215 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
216   return TTIImpl->getInliningThresholdMultiplier();
217 }
218 
219 unsigned
220 TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
221   return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
222 }
223 
224 unsigned
225 TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
226     const {
227   return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
228 }
229 
230 unsigned
231 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
232   return TTIImpl->adjustInliningThreshold(CB);
233 }
234 
235 unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
236                                                   const AllocaInst *AI) const {
237   return TTIImpl->getCallerAllocaCost(CB, AI);
238 }
239 
240 int TargetTransformInfo::getInlinerVectorBonusPercent() const {
241   return TTIImpl->getInlinerVectorBonusPercent();
242 }
243 
244 InstructionCost TargetTransformInfo::getGEPCost(
245     Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
246     Type *AccessType, TTI::TargetCostKind CostKind) const {
247   return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
248 }
249 
250 InstructionCost TargetTransformInfo::getPointersChainCost(
251     ArrayRef<const Value *> Ptrs, const Value *Base,
252     const TTI::PointersChainInfo &Info, Type *AccessTy,
253     TTI::TargetCostKind CostKind) const {
254   assert((Base || !Info.isSameBase()) &&
255          "If pointers have same base address it has to be provided.");
256   return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
257 }
258 
259 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
260     const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
261     BlockFrequencyInfo *BFI) const {
262   return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
263 }
264 
265 InstructionCost
266 TargetTransformInfo::getInstructionCost(const User *U,
267                                         ArrayRef<const Value *> Operands,
268                                         enum TargetCostKind CostKind) const {
269   InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
270   assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
271          "TTI should not produce negative costs!");
272   return Cost;
273 }
274 
275 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
276   return PredictableBranchThreshold.getNumOccurrences() > 0
277              ? BranchProbability(PredictableBranchThreshold, 100)
278              : TTIImpl->getPredictableBranchThreshold();
279 }
280 
281 bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
282   return TTIImpl->hasBranchDivergence(F);
283 }
284 
285 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
286   return TTIImpl->isSourceOfDivergence(V);
287 }
288 
289 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
290   return TTIImpl->isAlwaysUniform(V);
291 }
292 
293 bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
294                                                      unsigned ToAS) const {
295   return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
296 }
297 
298 bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
299                                                    unsigned ToAS) const {
300   return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
301 }
302 
303 unsigned TargetTransformInfo::getFlatAddressSpace() const {
304   return TTIImpl->getFlatAddressSpace();
305 }
306 
307 bool TargetTransformInfo::collectFlatAddressOperands(
308     SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
309   return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
310 }
311 
312 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
313                                               unsigned ToAS) const {
314   return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
315 }
316 
317 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
318     unsigned AS) const {
319   return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
320 }
321 
322 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
323   return TTIImpl->getAssumedAddrSpace(V);
324 }
325 
326 bool TargetTransformInfo::isSingleThreaded() const {
327   return TTIImpl->isSingleThreaded();
328 }
329 
330 std::pair<const Value *, unsigned>
331 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
332   return TTIImpl->getPredicatedAddrSpace(V);
333 }
334 
335 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
336     IntrinsicInst *II, Value *OldV, Value *NewV) const {
337   return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
338 }
339 
340 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
341   return TTIImpl->isLoweredToCall(F);
342 }
343 
344 bool TargetTransformInfo::isHardwareLoopProfitable(
345     Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
346     TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
347   return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
348 }
349 
350 bool TargetTransformInfo::preferPredicateOverEpilogue(
351     TailFoldingInfo *TFI) const {
352   return TTIImpl->preferPredicateOverEpilogue(TFI);
353 }
354 
355 TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle(
356     bool IVUpdateMayOverflow) const {
357   return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
358 }
359 
360 std::optional<Instruction *>
361 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
362                                           IntrinsicInst &II) const {
363   return TTIImpl->instCombineIntrinsic(IC, II);
364 }
365 
366 std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
367     InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
368     bool &KnownBitsComputed) const {
369   return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
370                                                    KnownBitsComputed);
371 }
372 
373 std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
374     InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
375     APInt &UndefElts2, APInt &UndefElts3,
376     std::function<void(Instruction *, unsigned, APInt, APInt &)>
377         SimplifyAndSetOp) const {
378   return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
379       IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
380       SimplifyAndSetOp);
381 }
382 
383 void TargetTransformInfo::getUnrollingPreferences(
384     Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
385     OptimizationRemarkEmitter *ORE) const {
386   return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
387 }
388 
389 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
390                                                 PeelingPreferences &PP) const {
391   return TTIImpl->getPeelingPreferences(L, SE, PP);
392 }
393 
394 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
395   return TTIImpl->isLegalAddImmediate(Imm);
396 }
397 
398 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
399   return TTIImpl->isLegalICmpImmediate(Imm);
400 }
401 
402 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
403                                                 int64_t BaseOffset,
404                                                 bool HasBaseReg, int64_t Scale,
405                                                 unsigned AddrSpace,
406                                                 Instruction *I) const {
407   return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
408                                         Scale, AddrSpace, I);
409 }
410 
411 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
412                                         const LSRCost &C2) const {
413   return TTIImpl->isLSRCostLess(C1, C2);
414 }
415 
416 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
417   return TTIImpl->isNumRegsMajorCostOfLSR();
418 }
419 
420 bool TargetTransformInfo::shouldFoldTerminatingConditionAfterLSR() const {
421   return TTIImpl->shouldFoldTerminatingConditionAfterLSR();
422 }
423 
424 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
425   return TTIImpl->isProfitableLSRChainElement(I);
426 }
427 
428 bool TargetTransformInfo::canMacroFuseCmp() const {
429   return TTIImpl->canMacroFuseCmp();
430 }
431 
432 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI,
433                                      ScalarEvolution *SE, LoopInfo *LI,
434                                      DominatorTree *DT, AssumptionCache *AC,
435                                      TargetLibraryInfo *LibInfo) const {
436   return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
437 }
438 
439 TTI::AddressingModeKind
440 TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
441                                                 ScalarEvolution *SE) const {
442   return TTIImpl->getPreferredAddressingMode(L, SE);
443 }
444 
445 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
446                                              Align Alignment) const {
447   return TTIImpl->isLegalMaskedStore(DataType, Alignment);
448 }
449 
450 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
451                                             Align Alignment) const {
452   return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
453 }
454 
455 bool TargetTransformInfo::isLegalNTStore(Type *DataType,
456                                          Align Alignment) const {
457   return TTIImpl->isLegalNTStore(DataType, Alignment);
458 }
459 
460 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
461   return TTIImpl->isLegalNTLoad(DataType, Alignment);
462 }
463 
464 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
465                                                ElementCount NumElements) const {
466   return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
467 }
468 
469 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
470                                               Align Alignment) const {
471   return TTIImpl->isLegalMaskedGather(DataType, Alignment);
472 }
473 
474 bool TargetTransformInfo::isLegalAltInstr(
475     VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
476     const SmallBitVector &OpcodeMask) const {
477   return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
478 }
479 
480 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
481                                                Align Alignment) const {
482   return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
483 }
484 
485 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
486                                                      Align Alignment) const {
487   return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
488 }
489 
490 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
491                                                       Align Alignment) const {
492   return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
493 }
494 
495 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
496   return TTIImpl->isLegalMaskedCompressStore(DataType);
497 }
498 
499 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
500   return TTIImpl->isLegalMaskedExpandLoad(DataType);
501 }
502 
503 bool TargetTransformInfo::enableOrderedReductions() const {
504   return TTIImpl->enableOrderedReductions();
505 }
506 
507 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
508   return TTIImpl->hasDivRemOp(DataType, IsSigned);
509 }
510 
511 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
512                                              unsigned AddrSpace) const {
513   return TTIImpl->hasVolatileVariant(I, AddrSpace);
514 }
515 
516 bool TargetTransformInfo::prefersVectorizedAddressing() const {
517   return TTIImpl->prefersVectorizedAddressing();
518 }
519 
520 InstructionCost TargetTransformInfo::getScalingFactorCost(
521     Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
522     int64_t Scale, unsigned AddrSpace) const {
523   InstructionCost Cost = TTIImpl->getScalingFactorCost(
524       Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
525   assert(Cost >= 0 && "TTI should not produce negative costs!");
526   return Cost;
527 }
528 
529 bool TargetTransformInfo::LSRWithInstrQueries() const {
530   return TTIImpl->LSRWithInstrQueries();
531 }
532 
533 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
534   return TTIImpl->isTruncateFree(Ty1, Ty2);
535 }
536 
537 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
538   return TTIImpl->isProfitableToHoist(I);
539 }
540 
541 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
542 
543 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
544   return TTIImpl->isTypeLegal(Ty);
545 }
546 
547 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
548   return TTIImpl->getRegUsageForType(Ty);
549 }
550 
551 bool TargetTransformInfo::shouldBuildLookupTables() const {
552   return TTIImpl->shouldBuildLookupTables();
553 }
554 
555 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
556     Constant *C) const {
557   return TTIImpl->shouldBuildLookupTablesForConstant(C);
558 }
559 
560 bool TargetTransformInfo::shouldBuildRelLookupTables() const {
561   return TTIImpl->shouldBuildRelLookupTables();
562 }
563 
564 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
565   return TTIImpl->useColdCCForColdCall(F);
566 }
567 
568 InstructionCost TargetTransformInfo::getScalarizationOverhead(
569     VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
570     TTI::TargetCostKind CostKind) const {
571   return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
572                                            CostKind);
573 }
574 
575 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
576     ArrayRef<const Value *> Args, ArrayRef<Type *> Tys,
577     TTI::TargetCostKind CostKind) const {
578   return TTIImpl->getOperandsScalarizationOverhead(Args, Tys, CostKind);
579 }
580 
581 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
582   return TTIImpl->supportsEfficientVectorElementLoadStore();
583 }
584 
585 bool TargetTransformInfo::supportsTailCalls() const {
586   return TTIImpl->supportsTailCalls();
587 }
588 
589 bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
590   return TTIImpl->supportsTailCallFor(CB);
591 }
592 
593 bool TargetTransformInfo::enableAggressiveInterleaving(
594     bool LoopHasReductions) const {
595   return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
596 }
597 
598 TargetTransformInfo::MemCmpExpansionOptions
599 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
600   return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
601 }
602 
603 bool TargetTransformInfo::enableSelectOptimize() const {
604   return TTIImpl->enableSelectOptimize();
605 }
606 
607 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
608   return TTIImpl->enableInterleavedAccessVectorization();
609 }
610 
611 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
612   return TTIImpl->enableMaskedInterleavedAccessVectorization();
613 }
614 
615 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
616   return TTIImpl->isFPVectorizationPotentiallyUnsafe();
617 }
618 
619 bool
620 TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
621                                                     unsigned BitWidth,
622                                                     unsigned AddressSpace,
623                                                     Align Alignment,
624                                                     unsigned *Fast) const {
625   return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
626                                                  AddressSpace, Alignment, Fast);
627 }
628 
629 TargetTransformInfo::PopcntSupportKind
630 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
631   return TTIImpl->getPopcntSupport(IntTyWidthInBit);
632 }
633 
634 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
635   return TTIImpl->haveFastSqrt(Ty);
636 }
637 
638 bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
639     const Instruction *I) const {
640   return TTIImpl->isExpensiveToSpeculativelyExecute(I);
641 }
642 
643 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
644   return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
645 }
646 
647 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
648   InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
649   assert(Cost >= 0 && "TTI should not produce negative costs!");
650   return Cost;
651 }
652 
653 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
654                                                            unsigned Idx,
655                                                            const APInt &Imm,
656                                                            Type *Ty) const {
657   InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
658   assert(Cost >= 0 && "TTI should not produce negative costs!");
659   return Cost;
660 }
661 
662 InstructionCost
663 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
664                                    TTI::TargetCostKind CostKind) const {
665   InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
666   assert(Cost >= 0 && "TTI should not produce negative costs!");
667   return Cost;
668 }
669 
670 InstructionCost TargetTransformInfo::getIntImmCostInst(
671     unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
672     TTI::TargetCostKind CostKind, Instruction *Inst) const {
673   InstructionCost Cost =
674       TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
675   assert(Cost >= 0 && "TTI should not produce negative costs!");
676   return Cost;
677 }
678 
679 InstructionCost
680 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
681                                          const APInt &Imm, Type *Ty,
682                                          TTI::TargetCostKind CostKind) const {
683   InstructionCost Cost =
684       TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
685   assert(Cost >= 0 && "TTI should not produce negative costs!");
686   return Cost;
687 }
688 
689 bool TargetTransformInfo::preferToKeepConstantsAttached(
690     const Instruction &Inst, const Function &Fn) const {
691   return TTIImpl->preferToKeepConstantsAttached(Inst, Fn);
692 }
693 
694 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
695   return TTIImpl->getNumberOfRegisters(ClassID);
696 }
697 
698 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
699                                                       Type *Ty) const {
700   return TTIImpl->getRegisterClassForType(Vector, Ty);
701 }
702 
703 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
704   return TTIImpl->getRegisterClassName(ClassID);
705 }
706 
707 TypeSize TargetTransformInfo::getRegisterBitWidth(
708     TargetTransformInfo::RegisterKind K) const {
709   return TTIImpl->getRegisterBitWidth(K);
710 }
711 
712 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
713   return TTIImpl->getMinVectorRegisterBitWidth();
714 }
715 
716 std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
717   return TTIImpl->getMaxVScale();
718 }
719 
720 std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
721   return TTIImpl->getVScaleForTuning();
722 }
723 
724 bool TargetTransformInfo::isVScaleKnownToBeAPowerOfTwo() const {
725   return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
726 }
727 
728 bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
729     TargetTransformInfo::RegisterKind K) const {
730   return TTIImpl->shouldMaximizeVectorBandwidth(K);
731 }
732 
733 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
734                                                bool IsScalable) const {
735   return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
736 }
737 
738 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
739                                            unsigned Opcode) const {
740   return TTIImpl->getMaximumVF(ElemWidth, Opcode);
741 }
742 
743 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
744                                                 Type *ScalarValTy) const {
745   return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
746 }
747 
748 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
749     const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
750   return TTIImpl->shouldConsiderAddressTypePromotion(
751       I, AllowPromotionWithoutCommonHeader);
752 }
753 
754 unsigned TargetTransformInfo::getCacheLineSize() const {
755   return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
756                                                : TTIImpl->getCacheLineSize();
757 }
758 
759 std::optional<unsigned>
760 TargetTransformInfo::getCacheSize(CacheLevel Level) const {
761   return TTIImpl->getCacheSize(Level);
762 }
763 
764 std::optional<unsigned>
765 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
766   return TTIImpl->getCacheAssociativity(Level);
767 }
768 
769 std::optional<unsigned> TargetTransformInfo::getMinPageSize() const {
770   return MinPageSize.getNumOccurrences() > 0 ? MinPageSize
771                                              : TTIImpl->getMinPageSize();
772 }
773 
774 unsigned TargetTransformInfo::getPrefetchDistance() const {
775   return TTIImpl->getPrefetchDistance();
776 }
777 
778 unsigned TargetTransformInfo::getMinPrefetchStride(
779     unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
780     unsigned NumPrefetches, bool HasCall) const {
781   return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
782                                        NumPrefetches, HasCall);
783 }
784 
785 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
786   return TTIImpl->getMaxPrefetchIterationsAhead();
787 }
788 
789 bool TargetTransformInfo::enableWritePrefetching() const {
790   return TTIImpl->enableWritePrefetching();
791 }
792 
793 bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
794   return TTIImpl->shouldPrefetchAddressSpace(AS);
795 }
796 
797 unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
798   return TTIImpl->getMaxInterleaveFactor(VF);
799 }
800 
801 TargetTransformInfo::OperandValueInfo
802 TargetTransformInfo::getOperandInfo(const Value *V) {
803   OperandValueKind OpInfo = OK_AnyValue;
804   OperandValueProperties OpProps = OP_None;
805 
806   if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
807     if (const auto *CI = dyn_cast<ConstantInt>(V)) {
808       if (CI->getValue().isPowerOf2())
809         OpProps = OP_PowerOf2;
810       else if (CI->getValue().isNegatedPowerOf2())
811         OpProps = OP_NegatedPowerOf2;
812     }
813     return {OK_UniformConstantValue, OpProps};
814   }
815 
816   // A broadcast shuffle creates a uniform value.
817   // TODO: Add support for non-zero index broadcasts.
818   // TODO: Add support for different source vector width.
819   if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
820     if (ShuffleInst->isZeroEltSplat())
821       OpInfo = OK_UniformValue;
822 
823   const Value *Splat = getSplatValue(V);
824 
825   // Check for a splat of a constant or for a non uniform vector of constants
826   // and check if the constant(s) are all powers of two.
827   if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
828     OpInfo = OK_NonUniformConstantValue;
829     if (Splat) {
830       OpInfo = OK_UniformConstantValue;
831       if (auto *CI = dyn_cast<ConstantInt>(Splat)) {
832         if (CI->getValue().isPowerOf2())
833           OpProps = OP_PowerOf2;
834         else if (CI->getValue().isNegatedPowerOf2())
835           OpProps = OP_NegatedPowerOf2;
836       }
837     } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
838       bool AllPow2 = true, AllNegPow2 = true;
839       for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
840         if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) {
841           AllPow2 &= CI->getValue().isPowerOf2();
842           AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
843           if (AllPow2 || AllNegPow2)
844             continue;
845         }
846         AllPow2 = AllNegPow2 = false;
847         break;
848       }
849       OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
850       OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
851     }
852   }
853 
854   // Check for a splat of a uniform value. This is not loop aware, so return
855   // true only for the obviously uniform cases (argument, globalvalue)
856   if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
857     OpInfo = OK_UniformValue;
858 
859   return {OpInfo, OpProps};
860 }
861 
862 InstructionCost TargetTransformInfo::getArithmeticInstrCost(
863     unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
864     OperandValueInfo Op1Info, OperandValueInfo Op2Info,
865     ArrayRef<const Value *> Args, const Instruction *CxtI) const {
866   InstructionCost Cost =
867       TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind,
868                                       Op1Info, Op2Info,
869                                       Args, CxtI);
870   assert(Cost >= 0 && "TTI should not produce negative costs!");
871   return Cost;
872 }
873 
874 InstructionCost TargetTransformInfo::getAltInstrCost(
875     VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
876     const SmallBitVector &OpcodeMask, TTI::TargetCostKind CostKind) const {
877   InstructionCost Cost =
878       TTIImpl->getAltInstrCost(VecTy, Opcode0, Opcode1, OpcodeMask, CostKind);
879   assert(Cost >= 0 && "TTI should not produce negative costs!");
880   return Cost;
881 }
882 
883 InstructionCost TargetTransformInfo::getShuffleCost(
884     ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask,
885     TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
886     ArrayRef<const Value *> Args) const {
887   InstructionCost Cost =
888       TTIImpl->getShuffleCost(Kind, Ty, Mask, CostKind, Index, SubTp, Args);
889   assert(Cost >= 0 && "TTI should not produce negative costs!");
890   return Cost;
891 }
892 
893 TTI::CastContextHint
894 TargetTransformInfo::getCastContextHint(const Instruction *I) {
895   if (!I)
896     return CastContextHint::None;
897 
898   auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
899                              unsigned GatScatOp) {
900     const Instruction *I = dyn_cast<Instruction>(V);
901     if (!I)
902       return CastContextHint::None;
903 
904     if (I->getOpcode() == LdStOp)
905       return CastContextHint::Normal;
906 
907     if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
908       if (II->getIntrinsicID() == MaskedOp)
909         return TTI::CastContextHint::Masked;
910       if (II->getIntrinsicID() == GatScatOp)
911         return TTI::CastContextHint::GatherScatter;
912     }
913 
914     return TTI::CastContextHint::None;
915   };
916 
917   switch (I->getOpcode()) {
918   case Instruction::ZExt:
919   case Instruction::SExt:
920   case Instruction::FPExt:
921     return getLoadStoreKind(I->getOperand(0), Instruction::Load,
922                             Intrinsic::masked_load, Intrinsic::masked_gather);
923   case Instruction::Trunc:
924   case Instruction::FPTrunc:
925     if (I->hasOneUse())
926       return getLoadStoreKind(*I->user_begin(), Instruction::Store,
927                               Intrinsic::masked_store,
928                               Intrinsic::masked_scatter);
929     break;
930   default:
931     return CastContextHint::None;
932   }
933 
934   return TTI::CastContextHint::None;
935 }
936 
937 InstructionCost TargetTransformInfo::getCastInstrCost(
938     unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
939     TTI::TargetCostKind CostKind, const Instruction *I) const {
940   assert((I == nullptr || I->getOpcode() == Opcode) &&
941          "Opcode should reflect passed instruction.");
942   InstructionCost Cost =
943       TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
944   assert(Cost >= 0 && "TTI should not produce negative costs!");
945   return Cost;
946 }
947 
948 InstructionCost TargetTransformInfo::getExtractWithExtendCost(
949     unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const {
950   InstructionCost Cost =
951       TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
952   assert(Cost >= 0 && "TTI should not produce negative costs!");
953   return Cost;
954 }
955 
956 InstructionCost TargetTransformInfo::getCFInstrCost(
957     unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
958   assert((I == nullptr || I->getOpcode() == Opcode) &&
959          "Opcode should reflect passed instruction.");
960   InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
961   assert(Cost >= 0 && "TTI should not produce negative costs!");
962   return Cost;
963 }
964 
965 InstructionCost TargetTransformInfo::getCmpSelInstrCost(
966     unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
967     TTI::TargetCostKind CostKind, const Instruction *I) const {
968   assert((I == nullptr || I->getOpcode() == Opcode) &&
969          "Opcode should reflect passed instruction.");
970   InstructionCost Cost =
971       TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
972   assert(Cost >= 0 && "TTI should not produce negative costs!");
973   return Cost;
974 }
975 
976 InstructionCost TargetTransformInfo::getVectorInstrCost(
977     unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
978     Value *Op0, Value *Op1) const {
979   // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
980   // This is mentioned in the interface description and respected by all
981   // callers, but never asserted upon.
982   InstructionCost Cost =
983       TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
984   assert(Cost >= 0 && "TTI should not produce negative costs!");
985   return Cost;
986 }
987 
988 InstructionCost
989 TargetTransformInfo::getVectorInstrCost(const Instruction &I, Type *Val,
990                                         TTI::TargetCostKind CostKind,
991                                         unsigned Index) const {
992   // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
993   // This is mentioned in the interface description and respected by all
994   // callers, but never asserted upon.
995   InstructionCost Cost = TTIImpl->getVectorInstrCost(I, Val, CostKind, Index);
996   assert(Cost >= 0 && "TTI should not produce negative costs!");
997   return Cost;
998 }
999 
1000 InstructionCost TargetTransformInfo::getReplicationShuffleCost(
1001     Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
1002     TTI::TargetCostKind CostKind) {
1003   InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
1004       EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
1005   assert(Cost >= 0 && "TTI should not produce negative costs!");
1006   return Cost;
1007 }
1008 
1009 InstructionCost TargetTransformInfo::getMemoryOpCost(
1010     unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1011     TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
1012     const Instruction *I) const {
1013   assert((I == nullptr || I->getOpcode() == Opcode) &&
1014          "Opcode should reflect passed instruction.");
1015   InstructionCost Cost = TTIImpl->getMemoryOpCost(
1016       Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
1017   assert(Cost >= 0 && "TTI should not produce negative costs!");
1018   return Cost;
1019 }
1020 
1021 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost(
1022     unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
1023     TTI::TargetCostKind CostKind) const {
1024   InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,
1025                                                         AddressSpace, CostKind);
1026   assert(Cost >= 0 && "TTI should not produce negative costs!");
1027   return Cost;
1028 }
1029 
1030 InstructionCost TargetTransformInfo::getGatherScatterOpCost(
1031     unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
1032     Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
1033   InstructionCost Cost = TTIImpl->getGatherScatterOpCost(
1034       Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
1035   assert(Cost >= 0 && "TTI should not produce negative costs!");
1036   return Cost;
1037 }
1038 
1039 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1040     unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1041     Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1042     bool UseMaskForCond, bool UseMaskForGaps) const {
1043   InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1044       Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1045       UseMaskForCond, UseMaskForGaps);
1046   assert(Cost >= 0 && "TTI should not produce negative costs!");
1047   return Cost;
1048 }
1049 
1050 InstructionCost
1051 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1052                                            TTI::TargetCostKind CostKind) const {
1053   InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1054   assert(Cost >= 0 && "TTI should not produce negative costs!");
1055   return Cost;
1056 }
1057 
1058 InstructionCost
1059 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1060                                       ArrayRef<Type *> Tys,
1061                                       TTI::TargetCostKind CostKind) const {
1062   InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1063   assert(Cost >= 0 && "TTI should not produce negative costs!");
1064   return Cost;
1065 }
1066 
1067 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1068   return TTIImpl->getNumberOfParts(Tp);
1069 }
1070 
1071 InstructionCost
1072 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
1073                                                const SCEV *Ptr) const {
1074   InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
1075   assert(Cost >= 0 && "TTI should not produce negative costs!");
1076   return Cost;
1077 }
1078 
1079 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1080   InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1081   assert(Cost >= 0 && "TTI should not produce negative costs!");
1082   return Cost;
1083 }
1084 
1085 uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1086   return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1087 }
1088 
1089 InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1090     unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1091     TTI::TargetCostKind CostKind) const {
1092   InstructionCost Cost =
1093       TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1094   assert(Cost >= 0 && "TTI should not produce negative costs!");
1095   return Cost;
1096 }
1097 
1098 InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1099     Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1100     TTI::TargetCostKind CostKind) const {
1101   InstructionCost Cost =
1102       TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1103   assert(Cost >= 0 && "TTI should not produce negative costs!");
1104   return Cost;
1105 }
1106 
1107 InstructionCost TargetTransformInfo::getExtendedReductionCost(
1108     unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1109     FastMathFlags FMF, TTI::TargetCostKind CostKind) const {
1110   return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1111                                            CostKind);
1112 }
1113 
1114 InstructionCost TargetTransformInfo::getMulAccReductionCost(
1115     bool IsUnsigned, Type *ResTy, VectorType *Ty,
1116     TTI::TargetCostKind CostKind) const {
1117   return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
1118 }
1119 
1120 InstructionCost
1121 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1122   return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1123 }
1124 
1125 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1126                                              MemIntrinsicInfo &Info) const {
1127   return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1128 }
1129 
1130 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1131   return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1132 }
1133 
1134 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1135     IntrinsicInst *Inst, Type *ExpectedType) const {
1136   return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1137 }
1138 
1139 Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1140     LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1141     unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
1142     std::optional<uint32_t> AtomicElementSize) const {
1143   return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1144                                             DestAddrSpace, SrcAlign, DestAlign,
1145                                             AtomicElementSize);
1146 }
1147 
1148 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1149     SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1150     unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1151     unsigned SrcAlign, unsigned DestAlign,
1152     std::optional<uint32_t> AtomicCpySize) const {
1153   TTIImpl->getMemcpyLoopResidualLoweringType(
1154       OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1155       DestAlign, AtomicCpySize);
1156 }
1157 
1158 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1159                                               const Function *Callee) const {
1160   return TTIImpl->areInlineCompatible(Caller, Callee);
1161 }
1162 
1163 unsigned
1164 TargetTransformInfo::getInlineCallPenalty(const Function *F,
1165                                           const CallBase &Call,
1166                                           unsigned DefaultCallPenalty) const {
1167   return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1168 }
1169 
1170 bool TargetTransformInfo::areTypesABICompatible(
1171     const Function *Caller, const Function *Callee,
1172     const ArrayRef<Type *> &Types) const {
1173   return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1174 }
1175 
1176 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1177                                              Type *Ty) const {
1178   return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1179 }
1180 
1181 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1182                                               Type *Ty) const {
1183   return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1184 }
1185 
1186 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1187   return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1188 }
1189 
1190 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1191   return TTIImpl->isLegalToVectorizeLoad(LI);
1192 }
1193 
1194 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1195   return TTIImpl->isLegalToVectorizeStore(SI);
1196 }
1197 
1198 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1199     unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1200   return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1201                                               AddrSpace);
1202 }
1203 
1204 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1205     unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1206   return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1207                                                AddrSpace);
1208 }
1209 
1210 bool TargetTransformInfo::isLegalToVectorizeReduction(
1211     const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1212   return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1213 }
1214 
1215 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1216   return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1217 }
1218 
1219 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1220                                                   unsigned LoadSize,
1221                                                   unsigned ChainSizeInBytes,
1222                                                   VectorType *VecTy) const {
1223   return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1224 }
1225 
1226 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1227                                                    unsigned StoreSize,
1228                                                    unsigned ChainSizeInBytes,
1229                                                    VectorType *VecTy) const {
1230   return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1231 }
1232 
1233 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty,
1234                                                 ReductionFlags Flags) const {
1235   return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1236 }
1237 
1238 bool TargetTransformInfo::preferPredicatedReductionSelect(
1239     unsigned Opcode, Type *Ty, ReductionFlags Flags) const {
1240   return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1241 }
1242 
1243 bool TargetTransformInfo::preferEpilogueVectorization() const {
1244   return TTIImpl->preferEpilogueVectorization();
1245 }
1246 
1247 TargetTransformInfo::VPLegalization
1248 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1249   return TTIImpl->getVPLegalizationStrategy(VPI);
1250 }
1251 
1252 bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1253   return TTIImpl->hasArmWideBranch(Thumb);
1254 }
1255 
1256 unsigned TargetTransformInfo::getMaxNumArgs() const {
1257   return TTIImpl->getMaxNumArgs();
1258 }
1259 
1260 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1261   return TTIImpl->shouldExpandReduction(II);
1262 }
1263 
1264 unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1265   return TTIImpl->getGISelRematGlobalCost();
1266 }
1267 
1268 unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1269   return TTIImpl->getMinTripCountTailFoldingThreshold();
1270 }
1271 
1272 bool TargetTransformInfo::supportsScalableVectors() const {
1273   return TTIImpl->supportsScalableVectors();
1274 }
1275 
1276 bool TargetTransformInfo::enableScalableVectorization() const {
1277   return TTIImpl->enableScalableVectorization();
1278 }
1279 
1280 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType,
1281                                                 Align Alignment) const {
1282   return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1283 }
1284 
1285 TargetTransformInfo::Concept::~Concept() = default;
1286 
1287 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1288 
1289 TargetIRAnalysis::TargetIRAnalysis(
1290     std::function<Result(const Function &)> TTICallback)
1291     : TTICallback(std::move(TTICallback)) {}
1292 
1293 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1294                                                FunctionAnalysisManager &) {
1295   return TTICallback(F);
1296 }
1297 
1298 AnalysisKey TargetIRAnalysis::Key;
1299 
1300 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1301   return Result(F.getParent()->getDataLayout());
1302 }
1303 
1304 // Register the basic pass.
1305 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1306                 "Target Transform Information", false, true)
1307 char TargetTransformInfoWrapperPass::ID = 0;
1308 
1309 void TargetTransformInfoWrapperPass::anchor() {}
1310 
1311 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1312     : ImmutablePass(ID) {
1313   initializeTargetTransformInfoWrapperPassPass(
1314       *PassRegistry::getPassRegistry());
1315 }
1316 
1317 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1318     TargetIRAnalysis TIRA)
1319     : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1320   initializeTargetTransformInfoWrapperPassPass(
1321       *PassRegistry::getPassRegistry());
1322 }
1323 
1324 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1325   FunctionAnalysisManager DummyFAM;
1326   TTI = TIRA.run(F, DummyFAM);
1327   return *TTI;
1328 }
1329 
1330 ImmutablePass *
1331 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1332   return new TargetTransformInfoWrapperPass(std::move(TIRA));
1333 }
1334