1 //===- StackMaps.h - StackMaps ----------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_CODEGEN_STACKMAPS_H 10 #define LLVM_CODEGEN_STACKMAPS_H 11 12 #include "llvm/ADT/MapVector.h" 13 #include "llvm/ADT/SmallVector.h" 14 #include "llvm/CodeGen/MachineInstr.h" 15 #include "llvm/IR/CallingConv.h" 16 #include "llvm/MC/MCSymbol.h" 17 #include "llvm/Support/Debug.h" 18 #include <algorithm> 19 #include <cassert> 20 #include <cstdint> 21 #include <vector> 22 23 namespace llvm { 24 25 class AsmPrinter; 26 class MCExpr; 27 class MCStreamer; 28 class raw_ostream; 29 class TargetRegisterInfo; 30 31 /// MI-level stackmap operands. 32 /// 33 /// MI stackmap operations take the form: 34 /// <id>, <numBytes>, live args... 35 class StackMapOpers { 36 public: 37 /// Enumerate the meta operands. 38 enum { IDPos, NBytesPos }; 39 40 private: 41 const MachineInstr* MI; 42 43 public: 44 explicit StackMapOpers(const MachineInstr *MI); 45 46 /// Return the ID for the given stackmap 47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } 48 49 /// Return the number of patchable bytes the given stackmap should emit. 50 uint32_t getNumPatchBytes() const { 51 return MI->getOperand(NBytesPos).getImm(); 52 } 53 54 /// Get the operand index of the variable list of non-argument operands. 55 /// These hold the "live state". 56 unsigned getVarIdx() const { 57 // Skip ID, nShadowBytes. 58 return 2; 59 } 60 }; 61 62 /// MI-level patchpoint operands. 63 /// 64 /// MI patchpoint operations take the form: 65 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ... 66 /// 67 /// IR patchpoint intrinsics do not have the <cc> operand because calling 68 /// convention is part of the subclass data. 69 /// 70 /// SD patchpoint nodes do not have a def operand because it is part of the 71 /// SDValue. 72 /// 73 /// Patchpoints following the anyregcc convention are handled specially. For 74 /// these, the stack map also records the location of the return value and 75 /// arguments. 76 class PatchPointOpers { 77 public: 78 /// Enumerate the meta operands. 79 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd }; 80 81 private: 82 const MachineInstr *MI; 83 bool HasDef; 84 85 unsigned getMetaIdx(unsigned Pos = 0) const { 86 assert(Pos < MetaEnd && "Meta operand index out of range."); 87 return (HasDef ? 1 : 0) + Pos; 88 } 89 90 const MachineOperand &getMetaOper(unsigned Pos) const { 91 return MI->getOperand(getMetaIdx(Pos)); 92 } 93 94 public: 95 explicit PatchPointOpers(const MachineInstr *MI); 96 97 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); } 98 bool hasDef() const { return HasDef; } 99 100 /// Return the ID for the given patchpoint. 101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } 102 103 /// Return the number of patchable bytes the given patchpoint should emit. 104 uint32_t getNumPatchBytes() const { 105 return getMetaOper(NBytesPos).getImm(); 106 } 107 108 /// Returns the target of the underlying call. 109 const MachineOperand &getCallTarget() const { 110 return getMetaOper(TargetPos); 111 } 112 113 /// Returns the calling convention 114 CallingConv::ID getCallingConv() const { 115 return getMetaOper(CCPos).getImm(); 116 } 117 118 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; } 119 120 /// Return the number of call arguments 121 uint32_t getNumCallArgs() const { 122 return MI->getOperand(getMetaIdx(NArgPos)).getImm(); 123 } 124 125 /// Get the operand index of the variable list of non-argument operands. 126 /// These hold the "live state". 127 unsigned getVarIdx() const { 128 return getMetaIdx() + MetaEnd + getNumCallArgs(); 129 } 130 131 /// Get the index at which stack map locations will be recorded. 132 /// Arguments are not recorded unless the anyregcc convention is used. 133 unsigned getStackMapStartIdx() const { 134 if (isAnyReg()) 135 return getArgIdx(); 136 return getVarIdx(); 137 } 138 139 /// Get the next scratch register operand index. 140 unsigned getNextScratchIdx(unsigned StartIdx = 0) const; 141 }; 142 143 /// MI-level Statepoint operands 144 /// 145 /// Statepoint operands take the form: 146 /// <id>, <num patch bytes >, <num call arguments>, <call target>, 147 /// [call arguments...], 148 /// <StackMaps::ConstantOp>, <calling convention>, 149 /// <StackMaps::ConstantOp>, <statepoint flags>, 150 /// <StackMaps::ConstantOp>, <num deopt args>, [deopt args...], 151 /// <gc base/derived pairs...> <gc allocas...> 152 /// Note that the last two sets of arguments are not currently length 153 /// prefixed. 154 class StatepointOpers { 155 // TODO:: we should change the STATEPOINT representation so that CC and 156 // Flags should be part of meta operands, with args and deopt operands, and 157 // gc operands all prefixed by their length and a type code. This would be 158 // much more consistent. 159 160 // These values are absolute offsets into the operands of the statepoint 161 // instruction. 162 enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd }; 163 164 // These values are relative offsets from the start of the statepoint meta 165 // arguments (i.e. the end of the call arguments). 166 enum { CCOffset = 1, FlagsOffset = 3, NumDeoptOperandsOffset = 5 }; 167 168 public: 169 explicit StatepointOpers(const MachineInstr *MI) : MI(MI) {} 170 171 /// Get index of statepoint ID operand. 172 unsigned getIDPos() const { return IDPos; } 173 174 /// Get index of Num Patch Bytes operand. 175 unsigned getNBytesPos() const { return NBytesPos; } 176 177 /// Get index of Num Call Arguments operand. 178 unsigned getNCallArgsPos() const { return NCallArgsPos; } 179 180 /// Get starting index of non call related arguments 181 /// (calling convention, statepoint flags, vm state and gc state). 182 unsigned getVarIdx() const { 183 return MI->getOperand(NCallArgsPos).getImm() + MetaEnd; 184 } 185 186 /// Get index of Calling Convention operand. 187 unsigned getCCIdx() const { return getVarIdx() + CCOffset; } 188 189 /// Get index of Flags operand. 190 unsigned getFlagsIdx() const { return getVarIdx() + FlagsOffset; } 191 192 /// Get index of Number Deopt Arguments operand. 193 unsigned getNumDeoptArgsIdx() const { 194 return getVarIdx() + NumDeoptOperandsOffset; 195 } 196 197 /// Return the ID for the given statepoint. 198 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } 199 200 /// Return the number of patchable bytes the given statepoint should emit. 201 uint32_t getNumPatchBytes() const { 202 return MI->getOperand(NBytesPos).getImm(); 203 } 204 205 /// Return the target of the underlying call. 206 const MachineOperand &getCallTarget() const { 207 return MI->getOperand(CallTargetPos); 208 } 209 210 /// Return the calling convention. 211 CallingConv::ID getCallingConv() const { 212 return MI->getOperand(getCCIdx()).getImm(); 213 } 214 215 /// Return the statepoint flags. 216 uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); } 217 218 private: 219 const MachineInstr *MI; 220 }; 221 222 class StackMaps { 223 public: 224 struct Location { 225 enum LocationType { 226 Unprocessed, 227 Register, 228 Direct, 229 Indirect, 230 Constant, 231 ConstantIndex 232 }; 233 LocationType Type = Unprocessed; 234 unsigned Size = 0; 235 unsigned Reg = 0; 236 int64_t Offset = 0; 237 238 Location() = default; 239 Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset) 240 : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {} 241 }; 242 243 struct LiveOutReg { 244 unsigned short Reg = 0; 245 unsigned short DwarfRegNum = 0; 246 unsigned short Size = 0; 247 248 LiveOutReg() = default; 249 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum, 250 unsigned short Size) 251 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {} 252 }; 253 254 // OpTypes are used to encode information about the following logical 255 // operand (which may consist of several MachineOperands) for the 256 // OpParser. 257 using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp }; 258 259 StackMaps(AsmPrinter &AP); 260 261 void reset() { 262 CSInfos.clear(); 263 ConstPool.clear(); 264 FnInfos.clear(); 265 } 266 267 using LocationVec = SmallVector<Location, 8>; 268 using LiveOutVec = SmallVector<LiveOutReg, 8>; 269 using ConstantPool = MapVector<uint64_t, uint64_t>; 270 271 struct FunctionInfo { 272 uint64_t StackSize = 0; 273 uint64_t RecordCount = 1; 274 275 FunctionInfo() = default; 276 explicit FunctionInfo(uint64_t StackSize) : StackSize(StackSize) {} 277 }; 278 279 struct CallsiteInfo { 280 const MCExpr *CSOffsetExpr = nullptr; 281 uint64_t ID = 0; 282 LocationVec Locations; 283 LiveOutVec LiveOuts; 284 285 CallsiteInfo() = default; 286 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID, 287 LocationVec &&Locations, LiveOutVec &&LiveOuts) 288 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)), 289 LiveOuts(std::move(LiveOuts)) {} 290 }; 291 292 using FnInfoMap = MapVector<const MCSymbol *, FunctionInfo>; 293 using CallsiteInfoList = std::vector<CallsiteInfo>; 294 295 /// Generate a stackmap record for a stackmap instruction. 296 /// 297 /// MI must be a raw STACKMAP, not a PATCHPOINT. 298 void recordStackMap(const MCSymbol &L, 299 const MachineInstr &MI); 300 301 /// Generate a stackmap record for a patchpoint instruction. 302 void recordPatchPoint(const MCSymbol &L, 303 const MachineInstr &MI); 304 305 /// Generate a stackmap record for a statepoint instruction. 306 void recordStatepoint(const MCSymbol &L, 307 const MachineInstr &MI); 308 309 /// If there is any stack map data, create a stack map section and serialize 310 /// the map info into it. This clears the stack map data structures 311 /// afterwards. 312 void serializeToStackMapSection(); 313 314 /// Get call site info. 315 CallsiteInfoList &getCSInfos() { return CSInfos; } 316 317 /// Get function info. 318 FnInfoMap &getFnInfos() { return FnInfos; } 319 320 private: 321 static const char *WSMP; 322 323 AsmPrinter &AP; 324 CallsiteInfoList CSInfos; 325 ConstantPool ConstPool; 326 FnInfoMap FnInfos; 327 328 MachineInstr::const_mop_iterator 329 parseOperand(MachineInstr::const_mop_iterator MOI, 330 MachineInstr::const_mop_iterator MOE, LocationVec &Locs, 331 LiveOutVec &LiveOuts) const; 332 333 /// Create a live-out register record for the given register @p Reg. 334 LiveOutReg createLiveOutReg(unsigned Reg, 335 const TargetRegisterInfo *TRI) const; 336 337 /// Parse the register live-out mask and return a vector of live-out 338 /// registers that need to be recorded in the stackmap. 339 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const; 340 341 /// Record the locations of the operands of the provided instruction in a 342 /// record keyed by the provided label. For instructions w/AnyReg calling 343 /// convention the return register is also recorded if requested. For 344 /// STACKMAP, and PATCHPOINT the label is expected to immediately *preceed* 345 /// lowering of the MI to MCInsts. For STATEPOINT, it expected to 346 /// immediately *follow*. It's not clear this difference was intentional, 347 /// but it exists today. 348 void recordStackMapOpers(const MCSymbol &L, 349 const MachineInstr &MI, uint64_t ID, 350 MachineInstr::const_mop_iterator MOI, 351 MachineInstr::const_mop_iterator MOE, 352 bool recordResult = false); 353 354 /// Emit the stackmap header. 355 void emitStackmapHeader(MCStreamer &OS); 356 357 /// Emit the function frame record for each function. 358 void emitFunctionFrameRecords(MCStreamer &OS); 359 360 /// Emit the constant pool. 361 void emitConstantPoolEntries(MCStreamer &OS); 362 363 /// Emit the callsite info for each stackmap/patchpoint intrinsic call. 364 void emitCallsiteEntries(MCStreamer &OS); 365 366 void print(raw_ostream &OS); 367 void debug() { print(dbgs()); } 368 }; 369 370 } // end namespace llvm 371 372 #endif // LLVM_CODEGEN_STACKMAPS_H 373