1 //===- Target.h -------------------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLD_ELF_TARGET_H 10 #define LLD_ELF_TARGET_H 11 12 #include "Config.h" 13 #include "InputSection.h" 14 #include "lld/Common/ErrorHandler.h" 15 #include "llvm/ADT/StringExtras.h" 16 #include "llvm/Object/ELF.h" 17 #include "llvm/Object/ELFTypes.h" 18 #include "llvm/Support/Compiler.h" 19 #include "llvm/Support/MathExtras.h" 20 #include <array> 21 22 namespace lld { 23 std::string toString(elf::RelType type); 24 25 namespace elf { 26 class Defined; 27 class InputFile; 28 class Symbol; 29 30 class TargetInfo { 31 public: 32 virtual uint32_t calcEFlags() const { return 0; } 33 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 34 const uint8_t *loc) const = 0; 35 virtual RelType getDynRel(RelType type) const { return 0; } 36 virtual void writeGotPltHeader(uint8_t *buf) const {} 37 virtual void writeGotHeader(uint8_t *buf) const {} 38 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {}; 39 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {} 40 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 41 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 42 43 // If lazy binding is supported, the first entry of the PLT has code 44 // to call the dynamic linker to resolve PLT entries the first time 45 // they are called. This function writes that code. 46 virtual void writePltHeader(uint8_t *buf) const {} 47 48 virtual void writePlt(uint8_t *buf, const Symbol &sym, 49 uint64_t pltEntryAddr) const {} 50 virtual void writeIplt(uint8_t *buf, const Symbol &sym, 51 uint64_t pltEntryAddr) const { 52 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries. 53 writePlt(buf, sym, pltEntryAddr); 54 } 55 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {} 56 virtual void addPltHeaderSymbols(InputSection &isec) const {} 57 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {} 58 59 // Returns true if a relocation only uses the low bits of a value such that 60 // all those bits are in the same page. For example, if the relocation 61 // only uses the low 12 bits in a system with 4k pages. If this is true, the 62 // bits will always have the same value at runtime and we don't have to emit 63 // a dynamic relocation. 64 virtual bool usesOnlyLowPageBits(RelType type) const; 65 66 // Decide whether a Thunk is needed for the relocation from File 67 // targeting S. 68 virtual bool needsThunk(RelExpr expr, RelType relocType, 69 const InputFile *file, uint64_t branchAddr, 70 const Symbol &s, int64_t a) const; 71 72 // On systems with range extensions we place collections of Thunks at 73 // regular spacings that enable the majority of branches reach the Thunks. 74 // a value of 0 means range extension thunks are not supported. 75 virtual uint32_t getThunkSectionSpacing() const { return 0; } 76 77 // The function with a prologue starting at Loc was compiled with 78 // -fsplit-stack and it calls a function compiled without. Adjust the prologue 79 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks. 80 // The symbols st_other flags are needed on PowerPC64 for determining the 81 // offset to the split-stack prologue. 82 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 83 uint8_t stOther) const; 84 85 // Return true if we can reach dst from src with RelType type. 86 virtual bool inBranchRange(RelType type, uint64_t src, 87 uint64_t dst) const; 88 89 virtual void relocate(uint8_t *loc, const Relocation &rel, 90 uint64_t val) const = 0; 91 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const { 92 relocate(loc, Relocation{R_NONE, type, 0, 0, nullptr}, val); 93 } 94 virtual void relocateAlloc(InputSectionBase &sec, uint8_t *buf) const; 95 96 // Do a linker relaxation pass and return true if we changed something. 97 virtual bool relaxOnce(int pass) const { return false; } 98 99 virtual void applyJumpInstrMod(uint8_t *loc, JumpModType type, 100 JumpModType val) const {} 101 102 virtual ~TargetInfo(); 103 104 // This deletes a jump insn at the end of the section if it is a fall thru to 105 // the next section. Further, if there is a conditional jump and a direct 106 // jump consecutively, it tries to flip the conditional jump to convert the 107 // direct jump into a fall thru and delete it. Returns true if a jump 108 // instruction can be deleted. 109 virtual bool deleteFallThruJmpInsn(InputSection &is, InputFile *file, 110 InputSection *nextIS) const { 111 return false; 112 } 113 114 unsigned defaultCommonPageSize = 4096; 115 unsigned defaultMaxPageSize = 4096; 116 117 uint64_t getImageBase() const; 118 119 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got. 120 bool gotBaseSymInGotPlt = false; 121 122 static constexpr RelType noneRel = 0; 123 RelType copyRel; 124 RelType gotRel; 125 RelType pltRel; 126 RelType relativeRel; 127 RelType iRelativeRel; 128 RelType symbolicRel; 129 RelType tlsDescRel; 130 RelType tlsGotRel; 131 RelType tlsModuleIndexRel; 132 RelType tlsOffsetRel; 133 unsigned gotEntrySize = config->wordsize; 134 unsigned pltEntrySize; 135 unsigned pltHeaderSize; 136 unsigned ipltEntrySize; 137 138 // At least on x86_64 positions 1 and 2 are used by the first plt entry 139 // to support lazy loading. 140 unsigned gotPltHeaderEntriesNum = 3; 141 142 // On PPC ELF V2 abi, the first entry in the .got is the .TOC. 143 unsigned gotHeaderEntriesNum = 0; 144 145 // On PPC ELF V2 abi, the dynamic section needs DT_PPC64_OPT (DT_LOPROC + 3) 146 // to be set to 0x2 if there can be multiple TOC's. Although we do not emit 147 // multiple TOC's, there can be a mix of TOC and NOTOC addressing which 148 // is functionally equivalent. 149 int ppc64DynamicSectionOpt = 0; 150 151 bool needsThunks = false; 152 153 // A 4-byte field corresponding to one or more trap instructions, used to pad 154 // executable OutputSections. 155 std::array<uint8_t, 4> trapInstr; 156 157 // Stores the NOP instructions of different sizes for the target and is used 158 // to pad sections that are relaxed. 159 std::optional<std::vector<std::vector<uint8_t>>> nopInstrs; 160 161 // If a target needs to rewrite calls to __morestack to instead call 162 // __morestack_non_split when a split-stack enabled caller calls a 163 // non-split-stack callee this will return true. Otherwise returns false. 164 bool needsMoreStackNonSplit = true; 165 166 virtual RelExpr adjustTlsExpr(RelType type, RelExpr expr) const; 167 virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend, 168 const uint8_t *loc) const; 169 170 protected: 171 // On FreeBSD x86_64 the first page cannot be mmaped. 172 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64 173 // installs this is set to 65536, so the first 15 pages cannot be used. 174 // Given that, the smallest value that can be used in here is 0x10000. 175 uint64_t defaultImageBase = 0x10000; 176 }; 177 178 TargetInfo *getAArch64TargetInfo(); 179 TargetInfo *getAMDGPUTargetInfo(); 180 TargetInfo *getARMTargetInfo(); 181 TargetInfo *getAVRTargetInfo(); 182 TargetInfo *getHexagonTargetInfo(); 183 TargetInfo *getLoongArchTargetInfo(); 184 TargetInfo *getMSP430TargetInfo(); 185 TargetInfo *getPPC64TargetInfo(); 186 TargetInfo *getPPCTargetInfo(); 187 TargetInfo *getRISCVTargetInfo(); 188 TargetInfo *getSPARCV9TargetInfo(); 189 TargetInfo *getX86TargetInfo(); 190 TargetInfo *getX86_64TargetInfo(); 191 template <class ELFT> TargetInfo *getMipsTargetInfo(); 192 193 struct ErrorPlace { 194 InputSectionBase *isec; 195 std::string loc; 196 std::string srcLoc; 197 }; 198 199 // Returns input section and corresponding source string for the given location. 200 ErrorPlace getErrorPlace(const uint8_t *loc); 201 202 static inline std::string getErrorLocation(const uint8_t *loc) { 203 return getErrorPlace(loc).loc; 204 } 205 206 void processArmCmseSymbols(); 207 208 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries); 209 210 unsigned getPPCDFormOp(unsigned secondaryOp); 211 unsigned getPPCDSFormOp(unsigned secondaryOp); 212 213 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first 214 // is a global entry point (GEP) which typically is used to initialize the TOC 215 // pointer in general purpose register 2. The second is a local entry 216 // point (LEP) which bypasses the TOC pointer initialization code. The 217 // offset between GEP and LEP is encoded in a function's st_other flags. 218 // This function will return the offset (in bytes) from the global entry-point 219 // to the local entry-point. 220 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther); 221 222 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte 223 // instruction (regardless of endianness). Therefore, the prefix is always in 224 // lower memory than the instruction. 225 void writePrefixedInstruction(uint8_t *loc, uint64_t insn); 226 227 void addPPC64SaveRestore(); 228 uint64_t getPPC64TocBase(); 229 uint64_t getAArch64Page(uint64_t expr); 230 template <typename ELFT> void writeARMCmseImportLib(); 231 uint64_t getLoongArchPageDelta(uint64_t dest, uint64_t pc, RelType type); 232 void riscvFinalizeRelax(int passes); 233 void mergeRISCVAttributesSections(); 234 void addArmInputSectionMappingSymbols(); 235 void addArmSyntheticSectionMappingSymbol(Defined *); 236 void sortArmMappingSymbols(); 237 void convertArmInstructionstoBE8(InputSection *sec, uint8_t *buf); 238 void createTaggedSymbols(const SmallVector<ELFFileBase *, 0> &files); 239 240 LLVM_LIBRARY_VISIBILITY extern const TargetInfo *target; 241 TargetInfo *getTarget(); 242 243 template <class ELFT> bool isMipsPIC(const Defined *sym); 244 245 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v, 246 int64_t min, uint64_t max); 247 void reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym, 248 const Twine &msg); 249 250 // Make sure that V can be represented as an N bit signed integer. 251 inline void checkInt(uint8_t *loc, int64_t v, int n, const Relocation &rel) { 252 if (v != llvm::SignExtend64(v, n)) 253 reportRangeError(loc, rel, Twine(v), llvm::minIntN(n), llvm::maxIntN(n)); 254 } 255 256 // Make sure that V can be represented as an N bit unsigned integer. 257 inline void checkUInt(uint8_t *loc, uint64_t v, int n, const Relocation &rel) { 258 if ((v >> n) != 0) 259 reportRangeError(loc, rel, Twine(v), 0, llvm::maxUIntN(n)); 260 } 261 262 // Make sure that V can be represented as an N bit signed or unsigned integer. 263 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, 264 const Relocation &rel) { 265 // For the error message we should cast V to a signed integer so that error 266 // messages show a small negative value rather than an extremely large one 267 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) 268 reportRangeError(loc, rel, Twine((int64_t)v), llvm::minIntN(n), 269 llvm::maxUIntN(n)); 270 } 271 272 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, 273 const Relocation &rel) { 274 if ((v & (n - 1)) != 0) 275 error(getErrorLocation(loc) + "improper alignment for relocation " + 276 lld::toString(rel.type) + ": 0x" + llvm::utohexstr(v) + 277 " is not aligned to " + Twine(n) + " bytes"); 278 } 279 280 // Endianness-aware read/write. 281 inline uint16_t read16(const void *p) { 282 return llvm::support::endian::read16(p, config->endianness); 283 } 284 285 inline uint32_t read32(const void *p) { 286 return llvm::support::endian::read32(p, config->endianness); 287 } 288 289 inline uint64_t read64(const void *p) { 290 return llvm::support::endian::read64(p, config->endianness); 291 } 292 293 inline void write16(void *p, uint16_t v) { 294 llvm::support::endian::write16(p, v, config->endianness); 295 } 296 297 inline void write32(void *p, uint32_t v) { 298 llvm::support::endian::write32(p, v, config->endianness); 299 } 300 301 inline void write64(void *p, uint64_t v) { 302 llvm::support::endian::write64(p, v, config->endianness); 303 } 304 305 // Overwrite a ULEB128 value and keep the original length. 306 inline uint64_t overwriteULEB128(uint8_t *bufLoc, uint64_t val) { 307 while (*bufLoc & 0x80) { 308 *bufLoc++ = 0x80 | (val & 0x7f); 309 val >>= 7; 310 } 311 *bufLoc = val; 312 return val; 313 } 314 } // namespace elf 315 } // namespace lld 316 317 #ifdef __clang__ 318 #pragma clang diagnostic ignored "-Wgnu-zero-variadic-macro-arguments" 319 #endif 320 #define invokeELFT(f, ...) \ 321 switch (config->ekind) { \ 322 case lld::elf::ELF32LEKind: \ 323 f<llvm::object::ELF32LE>(__VA_ARGS__); \ 324 break; \ 325 case lld::elf::ELF32BEKind: \ 326 f<llvm::object::ELF32BE>(__VA_ARGS__); \ 327 break; \ 328 case lld::elf::ELF64LEKind: \ 329 f<llvm::object::ELF64LE>(__VA_ARGS__); \ 330 break; \ 331 case lld::elf::ELF64BEKind: \ 332 f<llvm::object::ELF64BE>(__VA_ARGS__); \ 333 break; \ 334 default: \ 335 llvm_unreachable("unknown config->ekind"); \ 336 } 337 338 #endif 339