1 //===- Target.h -------------------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLD_ELF_TARGET_H 10 #define LLD_ELF_TARGET_H 11 12 #include "InputSection.h" 13 #include "lld/Common/ErrorHandler.h" 14 #include "llvm/Object/ELF.h" 15 #include "llvm/Support/MathExtras.h" 16 #include <array> 17 18 namespace lld { 19 std::string toString(elf::RelType type); 20 21 namespace elf { 22 class Defined; 23 class InputFile; 24 class Symbol; 25 26 class TargetInfo { 27 public: 28 virtual uint32_t calcEFlags() const { return 0; } 29 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 30 const uint8_t *loc) const = 0; 31 virtual RelType getDynRel(RelType type) const { return 0; } 32 virtual void writeGotPltHeader(uint8_t *buf) const {} 33 virtual void writeGotHeader(uint8_t *buf) const {} 34 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {}; 35 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {} 36 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 37 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 38 39 // If lazy binding is supported, the first entry of the PLT has code 40 // to call the dynamic linker to resolve PLT entries the first time 41 // they are called. This function writes that code. 42 virtual void writePltHeader(uint8_t *buf) const {} 43 44 virtual void writePlt(uint8_t *buf, const Symbol &sym, 45 uint64_t pltEntryAddr) const {} 46 virtual void writeIplt(uint8_t *buf, const Symbol &sym, 47 uint64_t pltEntryAddr) const { 48 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries. 49 writePlt(buf, sym, pltEntryAddr); 50 } 51 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {} 52 virtual void addPltHeaderSymbols(InputSection &isec) const {} 53 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {} 54 55 // Returns true if a relocation only uses the low bits of a value such that 56 // all those bits are in the same page. For example, if the relocation 57 // only uses the low 12 bits in a system with 4k pages. If this is true, the 58 // bits will always have the same value at runtime and we don't have to emit 59 // a dynamic relocation. 60 virtual bool usesOnlyLowPageBits(RelType type) const; 61 62 // Decide whether a Thunk is needed for the relocation from File 63 // targeting S. 64 virtual bool needsThunk(RelExpr expr, RelType relocType, 65 const InputFile *file, uint64_t branchAddr, 66 const Symbol &s, int64_t a) const; 67 68 // On systems with range extensions we place collections of Thunks at 69 // regular spacings that enable the majority of branches reach the Thunks. 70 // a value of 0 means range extension thunks are not supported. 71 virtual uint32_t getThunkSectionSpacing() const { return 0; } 72 73 // The function with a prologue starting at Loc was compiled with 74 // -fsplit-stack and it calls a function compiled without. Adjust the prologue 75 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks. 76 // The symbols st_other flags are needed on PowerPC64 for determining the 77 // offset to the split-stack prologue. 78 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 79 uint8_t stOther) const; 80 81 // Return true if we can reach dst from src with RelType type. 82 virtual bool inBranchRange(RelType type, uint64_t src, 83 uint64_t dst) const; 84 85 virtual void relocate(uint8_t *loc, const Relocation &rel, 86 uint64_t val) const = 0; 87 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const { 88 relocate(loc, Relocation{R_NONE, type, 0, 0, nullptr}, val); 89 } 90 91 virtual void applyJumpInstrMod(uint8_t *loc, JumpModType type, 92 JumpModType val) const {} 93 94 virtual ~TargetInfo(); 95 96 // This deletes a jump insn at the end of the section if it is a fall thru to 97 // the next section. Further, if there is a conditional jump and a direct 98 // jump consecutively, it tries to flip the conditional jump to convert the 99 // direct jump into a fall thru and delete it. Returns true if a jump 100 // instruction can be deleted. 101 virtual bool deleteFallThruJmpInsn(InputSection &is, InputFile *file, 102 InputSection *nextIS) const { 103 return false; 104 } 105 106 unsigned defaultCommonPageSize = 4096; 107 unsigned defaultMaxPageSize = 4096; 108 109 uint64_t getImageBase() const; 110 111 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got. 112 bool gotBaseSymInGotPlt = false; 113 114 static constexpr RelType noneRel = 0; 115 RelType copyRel; 116 RelType gotRel; 117 RelType pltRel; 118 RelType relativeRel; 119 RelType iRelativeRel; 120 RelType symbolicRel; 121 RelType tlsDescRel; 122 RelType tlsGotRel; 123 RelType tlsModuleIndexRel; 124 RelType tlsOffsetRel; 125 unsigned gotEntrySize = config->wordsize; 126 unsigned pltEntrySize; 127 unsigned pltHeaderSize; 128 unsigned ipltEntrySize; 129 130 // At least on x86_64 positions 1 and 2 are used by the first plt entry 131 // to support lazy loading. 132 unsigned gotPltHeaderEntriesNum = 3; 133 134 // On PPC ELF V2 abi, the first entry in the .got is the .TOC. 135 unsigned gotHeaderEntriesNum = 0; 136 137 bool needsThunks = false; 138 139 // A 4-byte field corresponding to one or more trap instructions, used to pad 140 // executable OutputSections. 141 std::array<uint8_t, 4> trapInstr; 142 143 // Stores the NOP instructions of different sizes for the target and is used 144 // to pad sections that are relaxed. 145 llvm::Optional<std::vector<std::vector<uint8_t>>> nopInstrs; 146 147 // If a target needs to rewrite calls to __morestack to instead call 148 // __morestack_non_split when a split-stack enabled caller calls a 149 // non-split-stack callee this will return true. Otherwise returns false. 150 bool needsMoreStackNonSplit = true; 151 152 virtual RelExpr adjustTlsExpr(RelType type, RelExpr expr) const; 153 virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend, 154 const uint8_t *loc) const; 155 virtual void relaxGot(uint8_t *loc, const Relocation &rel, 156 uint64_t val) const; 157 virtual void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, 158 uint64_t val) const; 159 virtual void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, 160 uint64_t val) const; 161 virtual void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, 162 uint64_t val) const; 163 virtual void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, 164 uint64_t val) const; 165 166 protected: 167 // On FreeBSD x86_64 the first page cannot be mmaped. 168 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64 169 // installs this is set to 65536, so the first 15 pages cannot be used. 170 // Given that, the smallest value that can be used in here is 0x10000. 171 uint64_t defaultImageBase = 0x10000; 172 }; 173 174 TargetInfo *getAArch64TargetInfo(); 175 TargetInfo *getAMDGPUTargetInfo(); 176 TargetInfo *getARMTargetInfo(); 177 TargetInfo *getAVRTargetInfo(); 178 TargetInfo *getHexagonTargetInfo(); 179 TargetInfo *getMSP430TargetInfo(); 180 TargetInfo *getPPC64TargetInfo(); 181 TargetInfo *getPPCTargetInfo(); 182 TargetInfo *getRISCVTargetInfo(); 183 TargetInfo *getSPARCV9TargetInfo(); 184 TargetInfo *getX86TargetInfo(); 185 TargetInfo *getX86_64TargetInfo(); 186 template <class ELFT> TargetInfo *getMipsTargetInfo(); 187 188 struct ErrorPlace { 189 InputSectionBase *isec; 190 std::string loc; 191 std::string srcLoc; 192 }; 193 194 // Returns input section and corresponding source string for the given location. 195 ErrorPlace getErrorPlace(const uint8_t *loc); 196 197 static inline std::string getErrorLocation(const uint8_t *loc) { 198 return getErrorPlace(loc).loc; 199 } 200 201 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries); 202 203 bool tryRelaxPPC64TocIndirection(const Relocation &rel, uint8_t *bufLoc); 204 unsigned getPPCDFormOp(unsigned secondaryOp); 205 206 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first 207 // is a global entry point (GEP) which typically is used to initialize the TOC 208 // pointer in general purpose register 2. The second is a local entry 209 // point (LEP) which bypasses the TOC pointer initialization code. The 210 // offset between GEP and LEP is encoded in a function's st_other flags. 211 // This function will return the offset (in bytes) from the global entry-point 212 // to the local entry-point. 213 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther); 214 215 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte 216 // instruction (regardless of endianness). Therefore, the prefix is always in 217 // lower memory than the instruction. 218 void writePrefixedInstruction(uint8_t *loc, uint64_t insn); 219 220 void addPPC64SaveRestore(); 221 uint64_t getPPC64TocBase(); 222 uint64_t getAArch64Page(uint64_t expr); 223 224 class AArch64Relaxer { 225 bool safeToRelaxAdrpLdr = true; 226 227 public: 228 explicit AArch64Relaxer(ArrayRef<Relocation> relocs); 229 230 bool tryRelaxAdrpAdd(const Relocation &adrpRel, const Relocation &addRel, 231 uint64_t secAddr, uint8_t *buf) const; 232 bool tryRelaxAdrpLdr(const Relocation &adrpRel, const Relocation &ldrRel, 233 uint64_t secAddr, uint8_t *buf) const; 234 }; 235 236 extern const TargetInfo *target; 237 TargetInfo *getTarget(); 238 239 template <class ELFT> bool isMipsPIC(const Defined *sym); 240 241 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v, 242 int64_t min, uint64_t max); 243 void reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym, 244 const Twine &msg); 245 246 // Make sure that V can be represented as an N bit signed integer. 247 inline void checkInt(uint8_t *loc, int64_t v, int n, const Relocation &rel) { 248 if (v != llvm::SignExtend64(v, n)) 249 reportRangeError(loc, rel, Twine(v), llvm::minIntN(n), llvm::maxIntN(n)); 250 } 251 252 // Make sure that V can be represented as an N bit unsigned integer. 253 inline void checkUInt(uint8_t *loc, uint64_t v, int n, const Relocation &rel) { 254 if ((v >> n) != 0) 255 reportRangeError(loc, rel, Twine(v), 0, llvm::maxUIntN(n)); 256 } 257 258 // Make sure that V can be represented as an N bit signed or unsigned integer. 259 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, 260 const Relocation &rel) { 261 // For the error message we should cast V to a signed integer so that error 262 // messages show a small negative value rather than an extremely large one 263 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) 264 reportRangeError(loc, rel, Twine((int64_t)v), llvm::minIntN(n), 265 llvm::maxUIntN(n)); 266 } 267 268 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, 269 const Relocation &rel) { 270 if ((v & (n - 1)) != 0) 271 error(getErrorLocation(loc) + "improper alignment for relocation " + 272 lld::toString(rel.type) + ": 0x" + llvm::utohexstr(v) + 273 " is not aligned to " + Twine(n) + " bytes"); 274 } 275 276 // Endianness-aware read/write. 277 inline uint16_t read16(const void *p) { 278 return llvm::support::endian::read16(p, config->endianness); 279 } 280 281 inline uint32_t read32(const void *p) { 282 return llvm::support::endian::read32(p, config->endianness); 283 } 284 285 inline uint64_t read64(const void *p) { 286 return llvm::support::endian::read64(p, config->endianness); 287 } 288 289 inline void write16(void *p, uint16_t v) { 290 llvm::support::endian::write16(p, v, config->endianness); 291 } 292 293 inline void write32(void *p, uint32_t v) { 294 llvm::support::endian::write32(p, v, config->endianness); 295 } 296 297 inline void write64(void *p, uint64_t v) { 298 llvm::support::endian::write64(p, v, config->endianness); 299 } 300 } // namespace elf 301 } // namespace lld 302 303 #ifdef __clang__ 304 #pragma clang diagnostic ignored "-Wgnu-zero-variadic-macro-arguments" 305 #endif 306 #define invokeELFT(f, ...) \ 307 switch (config->ekind) { \ 308 case ELF32LEKind: \ 309 f<ELF32LE>(__VA_ARGS__); \ 310 break; \ 311 case ELF32BEKind: \ 312 f<ELF32BE>(__VA_ARGS__); \ 313 break; \ 314 case ELF64LEKind: \ 315 f<ELF64LE>(__VA_ARGS__); \ 316 break; \ 317 case ELF64BEKind: \ 318 f<ELF64BE>(__VA_ARGS__); \ 319 break; \ 320 default: \ 321 llvm_unreachable("unknown config->ekind"); \ 322 } 323 324 #endif 325