1 //===- Target.h -------------------------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLD_ELF_TARGET_H 10 #define LLD_ELF_TARGET_H 11 12 #include "Config.h" 13 #include "InputSection.h" 14 #include "lld/Common/ErrorHandler.h" 15 #include "llvm/ADT/StringExtras.h" 16 #include "llvm/Object/ELF.h" 17 #include "llvm/Support/Compiler.h" 18 #include "llvm/Support/MathExtras.h" 19 #include <array> 20 21 namespace lld { 22 std::string toString(elf::RelType type); 23 24 namespace elf { 25 class Defined; 26 class InputFile; 27 class Symbol; 28 29 class TargetInfo { 30 public: 31 virtual uint32_t calcEFlags() const { return 0; } 32 virtual RelExpr getRelExpr(RelType type, const Symbol &s, 33 const uint8_t *loc) const = 0; 34 virtual RelType getDynRel(RelType type) const { return 0; } 35 virtual void writeGotPltHeader(uint8_t *buf) const {} 36 virtual void writeGotHeader(uint8_t *buf) const {} 37 virtual void writeGotPlt(uint8_t *buf, const Symbol &s) const {}; 38 virtual void writeIgotPlt(uint8_t *buf, const Symbol &s) const {} 39 virtual int64_t getImplicitAddend(const uint8_t *buf, RelType type) const; 40 virtual int getTlsGdRelaxSkip(RelType type) const { return 1; } 41 42 // If lazy binding is supported, the first entry of the PLT has code 43 // to call the dynamic linker to resolve PLT entries the first time 44 // they are called. This function writes that code. 45 virtual void writePltHeader(uint8_t *buf) const {} 46 47 virtual void writePlt(uint8_t *buf, const Symbol &sym, 48 uint64_t pltEntryAddr) const {} 49 virtual void writeIplt(uint8_t *buf, const Symbol &sym, 50 uint64_t pltEntryAddr) const { 51 // All but PPC32 and PPC64 use the same format for .plt and .iplt entries. 52 writePlt(buf, sym, pltEntryAddr); 53 } 54 virtual void writeIBTPlt(uint8_t *buf, size_t numEntries) const {} 55 virtual void addPltHeaderSymbols(InputSection &isec) const {} 56 virtual void addPltSymbols(InputSection &isec, uint64_t off) const {} 57 58 // Returns true if a relocation only uses the low bits of a value such that 59 // all those bits are in the same page. For example, if the relocation 60 // only uses the low 12 bits in a system with 4k pages. If this is true, the 61 // bits will always have the same value at runtime and we don't have to emit 62 // a dynamic relocation. 63 virtual bool usesOnlyLowPageBits(RelType type) const; 64 65 // Decide whether a Thunk is needed for the relocation from File 66 // targeting S. 67 virtual bool needsThunk(RelExpr expr, RelType relocType, 68 const InputFile *file, uint64_t branchAddr, 69 const Symbol &s, int64_t a) const; 70 71 // On systems with range extensions we place collections of Thunks at 72 // regular spacings that enable the majority of branches reach the Thunks. 73 // a value of 0 means range extension thunks are not supported. 74 virtual uint32_t getThunkSectionSpacing() const { return 0; } 75 76 // The function with a prologue starting at Loc was compiled with 77 // -fsplit-stack and it calls a function compiled without. Adjust the prologue 78 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks. 79 // The symbols st_other flags are needed on PowerPC64 for determining the 80 // offset to the split-stack prologue. 81 virtual bool adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 82 uint8_t stOther) const; 83 84 // Return true if we can reach dst from src with RelType type. 85 virtual bool inBranchRange(RelType type, uint64_t src, 86 uint64_t dst) const; 87 88 virtual void relocate(uint8_t *loc, const Relocation &rel, 89 uint64_t val) const = 0; 90 void relocateNoSym(uint8_t *loc, RelType type, uint64_t val) const { 91 relocate(loc, Relocation{R_NONE, type, 0, 0, nullptr}, val); 92 } 93 virtual void relocateAlloc(InputSectionBase &sec, uint8_t *buf) const; 94 95 // Do a linker relaxation pass and return true if we changed something. 96 virtual bool relaxOnce(int pass) const { return false; } 97 98 virtual void applyJumpInstrMod(uint8_t *loc, JumpModType type, 99 JumpModType val) const {} 100 101 virtual ~TargetInfo(); 102 103 // This deletes a jump insn at the end of the section if it is a fall thru to 104 // the next section. Further, if there is a conditional jump and a direct 105 // jump consecutively, it tries to flip the conditional jump to convert the 106 // direct jump into a fall thru and delete it. Returns true if a jump 107 // instruction can be deleted. 108 virtual bool deleteFallThruJmpInsn(InputSection &is, InputFile *file, 109 InputSection *nextIS) const { 110 return false; 111 } 112 113 unsigned defaultCommonPageSize = 4096; 114 unsigned defaultMaxPageSize = 4096; 115 116 uint64_t getImageBase() const; 117 118 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got. 119 bool gotBaseSymInGotPlt = false; 120 121 static constexpr RelType noneRel = 0; 122 RelType copyRel; 123 RelType gotRel; 124 RelType pltRel; 125 RelType relativeRel; 126 RelType iRelativeRel; 127 RelType symbolicRel; 128 RelType tlsDescRel; 129 RelType tlsGotRel; 130 RelType tlsModuleIndexRel; 131 RelType tlsOffsetRel; 132 unsigned gotEntrySize = config->wordsize; 133 unsigned pltEntrySize; 134 unsigned pltHeaderSize; 135 unsigned ipltEntrySize; 136 137 // At least on x86_64 positions 1 and 2 are used by the first plt entry 138 // to support lazy loading. 139 unsigned gotPltHeaderEntriesNum = 3; 140 141 // On PPC ELF V2 abi, the first entry in the .got is the .TOC. 142 unsigned gotHeaderEntriesNum = 0; 143 144 // On PPC ELF V2 abi, the dynamic section needs DT_PPC64_OPT (DT_LOPROC + 3) 145 // to be set to 0x2 if there can be multiple TOC's. Although we do not emit 146 // multiple TOC's, there can be a mix of TOC and NOTOC addressing which 147 // is functionally equivalent. 148 int ppc64DynamicSectionOpt = 0; 149 150 bool needsThunks = false; 151 152 // A 4-byte field corresponding to one or more trap instructions, used to pad 153 // executable OutputSections. 154 std::array<uint8_t, 4> trapInstr; 155 156 // Stores the NOP instructions of different sizes for the target and is used 157 // to pad sections that are relaxed. 158 std::optional<std::vector<std::vector<uint8_t>>> nopInstrs; 159 160 // If a target needs to rewrite calls to __morestack to instead call 161 // __morestack_non_split when a split-stack enabled caller calls a 162 // non-split-stack callee this will return true. Otherwise returns false. 163 bool needsMoreStackNonSplit = true; 164 165 virtual RelExpr adjustTlsExpr(RelType type, RelExpr expr) const; 166 virtual RelExpr adjustGotPcExpr(RelType type, int64_t addend, 167 const uint8_t *loc) const; 168 169 protected: 170 // On FreeBSD x86_64 the first page cannot be mmaped. 171 // On Linux this is controlled by vm.mmap_min_addr. At least on some x86_64 172 // installs this is set to 65536, so the first 15 pages cannot be used. 173 // Given that, the smallest value that can be used in here is 0x10000. 174 uint64_t defaultImageBase = 0x10000; 175 }; 176 177 TargetInfo *getAArch64TargetInfo(); 178 TargetInfo *getAMDGPUTargetInfo(); 179 TargetInfo *getARMTargetInfo(); 180 TargetInfo *getAVRTargetInfo(); 181 TargetInfo *getHexagonTargetInfo(); 182 TargetInfo *getLoongArchTargetInfo(); 183 TargetInfo *getMSP430TargetInfo(); 184 TargetInfo *getPPC64TargetInfo(); 185 TargetInfo *getPPCTargetInfo(); 186 TargetInfo *getRISCVTargetInfo(); 187 TargetInfo *getSPARCV9TargetInfo(); 188 TargetInfo *getX86TargetInfo(); 189 TargetInfo *getX86_64TargetInfo(); 190 template <class ELFT> TargetInfo *getMipsTargetInfo(); 191 192 struct ErrorPlace { 193 InputSectionBase *isec; 194 std::string loc; 195 std::string srcLoc; 196 }; 197 198 // Returns input section and corresponding source string for the given location. 199 ErrorPlace getErrorPlace(const uint8_t *loc); 200 201 static inline std::string getErrorLocation(const uint8_t *loc) { 202 return getErrorPlace(loc).loc; 203 } 204 205 void processArmCmseSymbols(); 206 207 void writePPC32GlinkSection(uint8_t *buf, size_t numEntries); 208 209 unsigned getPPCDFormOp(unsigned secondaryOp); 210 unsigned getPPCDSFormOp(unsigned secondaryOp); 211 212 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first 213 // is a global entry point (GEP) which typically is used to initialize the TOC 214 // pointer in general purpose register 2. The second is a local entry 215 // point (LEP) which bypasses the TOC pointer initialization code. The 216 // offset between GEP and LEP is encoded in a function's st_other flags. 217 // This function will return the offset (in bytes) from the global entry-point 218 // to the local entry-point. 219 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t stOther); 220 221 // Write a prefixed instruction, which is a 4-byte prefix followed by a 4-byte 222 // instruction (regardless of endianness). Therefore, the prefix is always in 223 // lower memory than the instruction. 224 void writePrefixedInstruction(uint8_t *loc, uint64_t insn); 225 226 void addPPC64SaveRestore(); 227 uint64_t getPPC64TocBase(); 228 uint64_t getAArch64Page(uint64_t expr); 229 template <typename ELFT> void writeARMCmseImportLib(); 230 uint64_t getLoongArchPageDelta(uint64_t dest, uint64_t pc); 231 void riscvFinalizeRelax(int passes); 232 void mergeRISCVAttributesSections(); 233 void addArmInputSectionMappingSymbols(); 234 void addArmSyntheticSectionMappingSymbol(Defined *); 235 void sortArmMappingSymbols(); 236 void convertArmInstructionstoBE8(InputSection *sec, uint8_t *buf); 237 238 LLVM_LIBRARY_VISIBILITY extern const TargetInfo *target; 239 TargetInfo *getTarget(); 240 241 template <class ELFT> bool isMipsPIC(const Defined *sym); 242 243 void reportRangeError(uint8_t *loc, const Relocation &rel, const Twine &v, 244 int64_t min, uint64_t max); 245 void reportRangeError(uint8_t *loc, int64_t v, int n, const Symbol &sym, 246 const Twine &msg); 247 248 // Make sure that V can be represented as an N bit signed integer. 249 inline void checkInt(uint8_t *loc, int64_t v, int n, const Relocation &rel) { 250 if (v != llvm::SignExtend64(v, n)) 251 reportRangeError(loc, rel, Twine(v), llvm::minIntN(n), llvm::maxIntN(n)); 252 } 253 254 // Make sure that V can be represented as an N bit unsigned integer. 255 inline void checkUInt(uint8_t *loc, uint64_t v, int n, const Relocation &rel) { 256 if ((v >> n) != 0) 257 reportRangeError(loc, rel, Twine(v), 0, llvm::maxUIntN(n)); 258 } 259 260 // Make sure that V can be represented as an N bit signed or unsigned integer. 261 inline void checkIntUInt(uint8_t *loc, uint64_t v, int n, 262 const Relocation &rel) { 263 // For the error message we should cast V to a signed integer so that error 264 // messages show a small negative value rather than an extremely large one 265 if (v != (uint64_t)llvm::SignExtend64(v, n) && (v >> n) != 0) 266 reportRangeError(loc, rel, Twine((int64_t)v), llvm::minIntN(n), 267 llvm::maxUIntN(n)); 268 } 269 270 inline void checkAlignment(uint8_t *loc, uint64_t v, int n, 271 const Relocation &rel) { 272 if ((v & (n - 1)) != 0) 273 error(getErrorLocation(loc) + "improper alignment for relocation " + 274 lld::toString(rel.type) + ": 0x" + llvm::utohexstr(v) + 275 " is not aligned to " + Twine(n) + " bytes"); 276 } 277 278 // Endianness-aware read/write. 279 inline uint16_t read16(const void *p) { 280 return llvm::support::endian::read16(p, config->endianness); 281 } 282 283 inline uint32_t read32(const void *p) { 284 return llvm::support::endian::read32(p, config->endianness); 285 } 286 287 inline uint64_t read64(const void *p) { 288 return llvm::support::endian::read64(p, config->endianness); 289 } 290 291 inline void write16(void *p, uint16_t v) { 292 llvm::support::endian::write16(p, v, config->endianness); 293 } 294 295 inline void write32(void *p, uint32_t v) { 296 llvm::support::endian::write32(p, v, config->endianness); 297 } 298 299 inline void write64(void *p, uint64_t v) { 300 llvm::support::endian::write64(p, v, config->endianness); 301 } 302 } // namespace elf 303 } // namespace lld 304 305 #ifdef __clang__ 306 #pragma clang diagnostic ignored "-Wgnu-zero-variadic-macro-arguments" 307 #endif 308 #define invokeELFT(f, ...) \ 309 switch (config->ekind) { \ 310 case ELF32LEKind: \ 311 f<ELF32LE>(__VA_ARGS__); \ 312 break; \ 313 case ELF32BEKind: \ 314 f<ELF32BE>(__VA_ARGS__); \ 315 break; \ 316 case ELF64LEKind: \ 317 f<ELF64LE>(__VA_ARGS__); \ 318 break; \ 319 case ELF64BEKind: \ 320 f<ELF64BE>(__VA_ARGS__); \ 321 break; \ 322 default: \ 323 llvm_unreachable("unknown config->ekind"); \ 324 } 325 326 #endif 327