1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Machine-specific things, such as applying relocations, creation of 10 // GOT or PLT entries, etc., are handled in this file. 11 // 12 // Refer the ELF spec for the single letter variables, S, A or P, used 13 // in this file. 14 // 15 // Some functions defined in this file has "relaxTls" as part of their names. 16 // They do peephole optimization for TLS variables by rewriting instructions. 17 // They are not part of the ABI but optional optimization, so you can skip 18 // them if you are not interested in how TLS variables are optimized. 19 // See the following paper for the details. 20 // 21 // Ulrich Drepper, ELF Handling For Thread-Local Storage 22 // http://www.akkadia.org/drepper/tls.pdf 23 // 24 //===----------------------------------------------------------------------===// 25 26 #include "Target.h" 27 #include "InputFiles.h" 28 #include "OutputSections.h" 29 #include "SymbolTable.h" 30 #include "Symbols.h" 31 #include "SyntheticSections.h" 32 #include "lld/Common/ErrorHandler.h" 33 #include "llvm/Object/ELF.h" 34 35 using namespace llvm; 36 using namespace llvm::object; 37 using namespace llvm::ELF; 38 using namespace lld; 39 using namespace lld::elf; 40 41 const TargetInfo *elf::target; 42 43 std::string lld::toString(RelType type) { 44 StringRef s = getELFRelocationTypeName(elf::config->emachine, type); 45 if (s == "Unknown") 46 return ("Unknown (" + Twine(type) + ")").str(); 47 return std::string(s); 48 } 49 50 TargetInfo *elf::getTarget() { 51 switch (config->emachine) { 52 case EM_386: 53 case EM_IAMCU: 54 return getX86TargetInfo(); 55 case EM_AARCH64: 56 return getAArch64TargetInfo(); 57 case EM_AMDGPU: 58 return getAMDGPUTargetInfo(); 59 case EM_ARM: 60 return getARMTargetInfo(); 61 case EM_AVR: 62 return getAVRTargetInfo(); 63 case EM_HEXAGON: 64 return getHexagonTargetInfo(); 65 case EM_LOONGARCH: 66 return getLoongArchTargetInfo(); 67 case EM_MIPS: 68 switch (config->ekind) { 69 case ELF32LEKind: 70 return getMipsTargetInfo<ELF32LE>(); 71 case ELF32BEKind: 72 return getMipsTargetInfo<ELF32BE>(); 73 case ELF64LEKind: 74 return getMipsTargetInfo<ELF64LE>(); 75 case ELF64BEKind: 76 return getMipsTargetInfo<ELF64BE>(); 77 default: 78 llvm_unreachable("unsupported MIPS target"); 79 } 80 case EM_MSP430: 81 return getMSP430TargetInfo(); 82 case EM_PPC: 83 return getPPCTargetInfo(); 84 case EM_PPC64: 85 return getPPC64TargetInfo(); 86 case EM_RISCV: 87 return getRISCVTargetInfo(); 88 case EM_SPARCV9: 89 return getSPARCV9TargetInfo(); 90 case EM_S390: 91 return getSystemZTargetInfo(); 92 case EM_X86_64: 93 return getX86_64TargetInfo(); 94 } 95 llvm_unreachable("unknown target machine"); 96 } 97 98 ErrorPlace elf::getErrorPlace(const uint8_t *loc) { 99 assert(loc != nullptr); 100 for (InputSectionBase *d : ctx.inputSections) { 101 auto *isec = dyn_cast<InputSection>(d); 102 if (!isec || !isec->getParent() || (isec->type & SHT_NOBITS)) 103 continue; 104 105 const uint8_t *isecLoc = 106 Out::bufferStart 107 ? (Out::bufferStart + isec->getParent()->offset + isec->outSecOff) 108 : isec->contentMaybeDecompress().data(); 109 if (isecLoc == nullptr) { 110 assert(isa<SyntheticSection>(isec) && "No data but not synthetic?"); 111 continue; 112 } 113 if (isecLoc <= loc && loc < isecLoc + isec->getSize()) { 114 std::string objLoc = isec->getLocation(loc - isecLoc); 115 // Return object file location and source file location. 116 // TODO: Refactor getSrcMsg not to take a variable. 117 Undefined dummy(ctx.internalFile, "", STB_LOCAL, 0, 0); 118 return {isec, objLoc + ": ", 119 isec->file ? isec->getSrcMsg(dummy, loc - isecLoc) : ""}; 120 } 121 } 122 return {}; 123 } 124 125 TargetInfo::~TargetInfo() {} 126 127 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const { 128 internalLinkerError(getErrorLocation(buf), 129 "cannot read addend for relocation " + toString(type)); 130 return 0; 131 } 132 133 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; } 134 135 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file, 136 uint64_t branchAddr, const Symbol &s, 137 int64_t a) const { 138 return false; 139 } 140 141 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 142 uint8_t stOther) const { 143 llvm_unreachable("Target doesn't support split stacks."); 144 } 145 146 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 147 return true; 148 } 149 150 RelExpr TargetInfo::adjustTlsExpr(RelType type, RelExpr expr) const { 151 return expr; 152 } 153 154 RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend, 155 const uint8_t *data) const { 156 return R_GOT_PC; 157 } 158 159 void TargetInfo::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const { 160 const unsigned bits = config->is64 ? 64 : 32; 161 uint64_t secAddr = sec.getOutputSection()->addr; 162 if (auto *s = dyn_cast<InputSection>(&sec)) 163 secAddr += s->outSecOff; 164 else if (auto *ehIn = dyn_cast<EhInputSection>(&sec)) 165 secAddr += ehIn->getParent()->outSecOff; 166 for (const Relocation &rel : sec.relocs()) { 167 uint8_t *loc = buf + rel.offset; 168 const uint64_t val = SignExtend64( 169 sec.getRelocTargetVA(sec.file, rel.type, rel.addend, 170 secAddr + rel.offset, *rel.sym, rel.expr), 171 bits); 172 if (rel.expr != R_RELAX_HINT) 173 relocate(loc, rel, val); 174 } 175 } 176 177 uint64_t TargetInfo::getImageBase() const { 178 // Use --image-base if set. Fall back to the target default if not. 179 if (config->imageBase) 180 return *config->imageBase; 181 return config->isPic ? 0 : defaultImageBase; 182 } 183