1 //===- Target.cpp ---------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Machine-specific things, such as applying relocations, creation of 10 // GOT or PLT entries, etc., are handled in this file. 11 // 12 // Refer the ELF spec for the single letter variables, S, A or P, used 13 // in this file. 14 // 15 // Some functions defined in this file has "relaxTls" as part of their names. 16 // They do peephole optimization for TLS variables by rewriting instructions. 17 // They are not part of the ABI but optional optimization, so you can skip 18 // them if you are not interested in how TLS variables are optimized. 19 // See the following paper for the details. 20 // 21 // Ulrich Drepper, ELF Handling For Thread-Local Storage 22 // http://www.akkadia.org/drepper/tls.pdf 23 // 24 //===----------------------------------------------------------------------===// 25 26 #include "Target.h" 27 #include "InputFiles.h" 28 #include "OutputSections.h" 29 #include "SymbolTable.h" 30 #include "Symbols.h" 31 #include "SyntheticSections.h" 32 #include "lld/Common/ErrorHandler.h" 33 #include "llvm/Object/ELF.h" 34 35 using namespace llvm; 36 using namespace llvm::object; 37 using namespace llvm::ELF; 38 using namespace lld; 39 using namespace lld::elf; 40 41 const TargetInfo *elf::target; 42 43 std::string lld::toString(RelType type) { 44 StringRef s = getELFRelocationTypeName(elf::config->emachine, type); 45 if (s == "Unknown") 46 return ("Unknown (" + Twine(type) + ")").str(); 47 return std::string(s); 48 } 49 50 TargetInfo *elf::getTarget() { 51 switch (config->emachine) { 52 case EM_386: 53 case EM_IAMCU: 54 return getX86TargetInfo(); 55 case EM_AARCH64: 56 return getAArch64TargetInfo(); 57 case EM_AMDGPU: 58 return getAMDGPUTargetInfo(); 59 case EM_ARM: 60 return getARMTargetInfo(); 61 case EM_AVR: 62 return getAVRTargetInfo(); 63 case EM_HEXAGON: 64 return getHexagonTargetInfo(); 65 case EM_MIPS: 66 switch (config->ekind) { 67 case ELF32LEKind: 68 return getMipsTargetInfo<ELF32LE>(); 69 case ELF32BEKind: 70 return getMipsTargetInfo<ELF32BE>(); 71 case ELF64LEKind: 72 return getMipsTargetInfo<ELF64LE>(); 73 case ELF64BEKind: 74 return getMipsTargetInfo<ELF64BE>(); 75 default: 76 llvm_unreachable("unsupported MIPS target"); 77 } 78 case EM_MSP430: 79 return getMSP430TargetInfo(); 80 case EM_PPC: 81 return getPPCTargetInfo(); 82 case EM_PPC64: 83 return getPPC64TargetInfo(); 84 case EM_RISCV: 85 return getRISCVTargetInfo(); 86 case EM_SPARCV9: 87 return getSPARCV9TargetInfo(); 88 case EM_X86_64: 89 return getX86_64TargetInfo(); 90 } 91 llvm_unreachable("unknown target machine"); 92 } 93 94 template <class ELFT> static ErrorPlace getErrPlace(const uint8_t *loc) { 95 assert(loc != nullptr); 96 for (InputSectionBase *d : inputSections) { 97 auto *isec = cast<InputSection>(d); 98 if (!isec->getParent() || (isec->type & SHT_NOBITS)) 99 continue; 100 101 const uint8_t *isecLoc = 102 Out::bufferStart 103 ? (Out::bufferStart + isec->getParent()->offset + isec->outSecOff) 104 : isec->data().data(); 105 if (isecLoc == nullptr) { 106 assert(isa<SyntheticSection>(isec) && "No data but not synthetic?"); 107 continue; 108 } 109 if (isecLoc <= loc && loc < isecLoc + isec->getSize()) 110 return {isec, isec->template getLocation<ELFT>(loc - isecLoc) + ": "}; 111 } 112 return {}; 113 } 114 115 ErrorPlace elf::getErrorPlace(const uint8_t *loc) { 116 switch (config->ekind) { 117 case ELF32LEKind: 118 return getErrPlace<ELF32LE>(loc); 119 case ELF32BEKind: 120 return getErrPlace<ELF32BE>(loc); 121 case ELF64LEKind: 122 return getErrPlace<ELF64LE>(loc); 123 case ELF64BEKind: 124 return getErrPlace<ELF64BE>(loc); 125 default: 126 llvm_unreachable("unknown ELF type"); 127 } 128 } 129 130 TargetInfo::~TargetInfo() {} 131 132 int64_t TargetInfo::getImplicitAddend(const uint8_t *buf, RelType type) const { 133 return 0; 134 } 135 136 bool TargetInfo::usesOnlyLowPageBits(RelType type) const { return false; } 137 138 bool TargetInfo::needsThunk(RelExpr expr, RelType type, const InputFile *file, 139 uint64_t branchAddr, const Symbol &s, 140 int64_t a) const { 141 return false; 142 } 143 144 bool TargetInfo::adjustPrologueForCrossSplitStack(uint8_t *loc, uint8_t *end, 145 uint8_t stOther) const { 146 llvm_unreachable("Target doesn't support split stacks."); 147 } 148 149 bool TargetInfo::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 150 return true; 151 } 152 153 RelExpr TargetInfo::adjustTlsExpr(RelType type, RelExpr expr) const { 154 return expr; 155 } 156 157 RelExpr TargetInfo::adjustGotPcExpr(RelType type, int64_t addend, 158 const uint8_t *data) const { 159 return R_GOT_PC; 160 } 161 162 void TargetInfo::relaxGot(uint8_t *loc, const Relocation &rel, 163 uint64_t val) const { 164 llvm_unreachable("Should not have claimed to be relaxable"); 165 } 166 167 void TargetInfo::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, 168 uint64_t val) const { 169 llvm_unreachable("Should not have claimed to be relaxable"); 170 } 171 172 void TargetInfo::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, 173 uint64_t val) const { 174 llvm_unreachable("Should not have claimed to be relaxable"); 175 } 176 177 void TargetInfo::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, 178 uint64_t val) const { 179 llvm_unreachable("Should not have claimed to be relaxable"); 180 } 181 182 void TargetInfo::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, 183 uint64_t val) const { 184 llvm_unreachable("Should not have claimed to be relaxable"); 185 } 186 187 uint64_t TargetInfo::getImageBase() const { 188 // Use -image-base if set. Fall back to the target default if not. 189 if (config->imageBase) 190 return *config->imageBase; 191 return config->isPic ? 0 : defaultImageBase; 192 } 193