1 //===- RISCV.cpp ----------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "InputFiles.h" 10 #include "SyntheticSections.h" 11 #include "Target.h" 12 13 using namespace llvm; 14 using namespace llvm::object; 15 using namespace llvm::support::endian; 16 using namespace llvm::ELF; 17 using namespace lld; 18 using namespace lld::elf; 19 20 namespace { 21 22 class RISCV final : public TargetInfo { 23 public: 24 RISCV(); 25 uint32_t calcEFlags() const override; 26 void writeGotHeader(uint8_t *buf) const override; 27 void writeGotPlt(uint8_t *buf, const Symbol &s) const override; 28 void writePltHeader(uint8_t *buf) const override; 29 void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr, 30 int32_t index, unsigned relOff) const override; 31 RelType getDynRel(RelType type) const override; 32 RelExpr getRelExpr(RelType type, const Symbol &s, 33 const uint8_t *loc) const override; 34 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override; 35 }; 36 37 } // end anonymous namespace 38 39 const uint64_t dtpOffset = 0x800; 40 41 enum Op { 42 ADDI = 0x13, 43 AUIPC = 0x17, 44 JALR = 0x67, 45 LD = 0x3003, 46 LW = 0x2003, 47 SRLI = 0x5013, 48 SUB = 0x40000033, 49 }; 50 51 enum Reg { 52 X_RA = 1, 53 X_T0 = 5, 54 X_T1 = 6, 55 X_T2 = 7, 56 X_T3 = 28, 57 }; 58 59 static uint32_t hi20(uint32_t val) { return (val + 0x800) >> 12; } 60 static uint32_t lo12(uint32_t val) { return val & 4095; } 61 62 static uint32_t itype(uint32_t op, uint32_t rd, uint32_t rs1, uint32_t imm) { 63 return op | (rd << 7) | (rs1 << 15) | (imm << 20); 64 } 65 static uint32_t rtype(uint32_t op, uint32_t rd, uint32_t rs1, uint32_t rs2) { 66 return op | (rd << 7) | (rs1 << 15) | (rs2 << 20); 67 } 68 static uint32_t utype(uint32_t op, uint32_t rd, uint32_t imm) { 69 return op | (rd << 7) | (imm << 12); 70 } 71 72 RISCV::RISCV() { 73 copyRel = R_RISCV_COPY; 74 noneRel = R_RISCV_NONE; 75 pltRel = R_RISCV_JUMP_SLOT; 76 relativeRel = R_RISCV_RELATIVE; 77 if (config->is64) { 78 symbolicRel = R_RISCV_64; 79 tlsModuleIndexRel = R_RISCV_TLS_DTPMOD64; 80 tlsOffsetRel = R_RISCV_TLS_DTPREL64; 81 tlsGotRel = R_RISCV_TLS_TPREL64; 82 } else { 83 symbolicRel = R_RISCV_32; 84 tlsModuleIndexRel = R_RISCV_TLS_DTPMOD32; 85 tlsOffsetRel = R_RISCV_TLS_DTPREL32; 86 tlsGotRel = R_RISCV_TLS_TPREL32; 87 } 88 gotRel = symbolicRel; 89 90 // .got[0] = _DYNAMIC 91 gotBaseSymInGotPlt = false; 92 gotHeaderEntriesNum = 1; 93 94 // .got.plt[0] = _dl_runtime_resolve, .got.plt[1] = link_map 95 gotPltHeaderEntriesNum = 2; 96 97 pltEntrySize = 16; 98 pltHeaderSize = 32; 99 } 100 101 static uint32_t getEFlags(InputFile *f) { 102 if (config->is64) 103 return cast<ObjFile<ELF64LE>>(f)->getObj().getHeader()->e_flags; 104 return cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags; 105 } 106 107 uint32_t RISCV::calcEFlags() const { 108 // If there are only binary input files (from -b binary), use a 109 // value of 0 for the ELF header flags. 110 if (objectFiles.empty()) 111 return 0; 112 113 uint32_t target = getEFlags(objectFiles.front()); 114 115 for (InputFile *f : objectFiles) { 116 uint32_t eflags = getEFlags(f); 117 if (eflags & EF_RISCV_RVC) 118 target |= EF_RISCV_RVC; 119 120 if ((eflags & EF_RISCV_FLOAT_ABI) != (target & EF_RISCV_FLOAT_ABI)) 121 error(toString(f) + 122 ": cannot link object files with different floating-point ABI"); 123 124 if ((eflags & EF_RISCV_RVE) != (target & EF_RISCV_RVE)) 125 error(toString(f) + 126 ": cannot link object files with different EF_RISCV_RVE"); 127 } 128 129 return target; 130 } 131 132 void RISCV::writeGotHeader(uint8_t *buf) const { 133 if (config->is64) 134 write64le(buf, mainPart->dynamic->getVA()); 135 else 136 write32le(buf, mainPart->dynamic->getVA()); 137 } 138 139 void RISCV::writeGotPlt(uint8_t *buf, const Symbol &s) const { 140 if (config->is64) 141 write64le(buf, in.plt->getVA()); 142 else 143 write32le(buf, in.plt->getVA()); 144 } 145 146 void RISCV::writePltHeader(uint8_t *buf) const { 147 // 1: auipc t2, %pcrel_hi(.got.plt) 148 // sub t1, t1, t3 149 // l[wd] t3, %pcrel_lo(1b)(t2); t3 = _dl_runtime_resolve 150 // addi t1, t1, -pltHeaderSize-12; t1 = &.plt[i] - &.plt[0] 151 // addi t0, t2, %pcrel_lo(1b) 152 // srli t1, t1, (rv64?1:2); t1 = &.got.plt[i] - &.got.plt[0] 153 // l[wd] t0, Wordsize(t0); t0 = link_map 154 // jr t3 155 uint32_t offset = in.gotPlt->getVA() - in.plt->getVA(); 156 uint32_t load = config->is64 ? LD : LW; 157 write32le(buf + 0, utype(AUIPC, X_T2, hi20(offset))); 158 write32le(buf + 4, rtype(SUB, X_T1, X_T1, X_T3)); 159 write32le(buf + 8, itype(load, X_T3, X_T2, lo12(offset))); 160 write32le(buf + 12, itype(ADDI, X_T1, X_T1, -target->pltHeaderSize - 12)); 161 write32le(buf + 16, itype(ADDI, X_T0, X_T2, lo12(offset))); 162 write32le(buf + 20, itype(SRLI, X_T1, X_T1, config->is64 ? 1 : 2)); 163 write32le(buf + 24, itype(load, X_T0, X_T0, config->wordsize)); 164 write32le(buf + 28, itype(JALR, 0, X_T3, 0)); 165 } 166 167 void RISCV::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, 168 uint64_t pltEntryAddr, int32_t index, 169 unsigned relOff) const { 170 // 1: auipc t3, %pcrel_hi(f@.got.plt) 171 // l[wd] t3, %pcrel_lo(1b)(t3) 172 // jalr t1, t3 173 // nop 174 uint32_t offset = gotPltEntryAddr - pltEntryAddr; 175 write32le(buf + 0, utype(AUIPC, X_T3, hi20(offset))); 176 write32le(buf + 4, itype(config->is64 ? LD : LW, X_T3, X_T3, lo12(offset))); 177 write32le(buf + 8, itype(JALR, X_T1, X_T3, 0)); 178 write32le(buf + 12, itype(ADDI, 0, 0, 0)); 179 } 180 181 RelType RISCV::getDynRel(RelType type) const { 182 return type == target->symbolicRel ? type 183 : static_cast<RelType>(R_RISCV_NONE); 184 } 185 186 RelExpr RISCV::getRelExpr(const RelType type, const Symbol &s, 187 const uint8_t *loc) const { 188 switch (type) { 189 case R_RISCV_ADD8: 190 case R_RISCV_ADD16: 191 case R_RISCV_ADD32: 192 case R_RISCV_ADD64: 193 case R_RISCV_SET6: 194 case R_RISCV_SET8: 195 case R_RISCV_SET16: 196 case R_RISCV_SET32: 197 case R_RISCV_SUB6: 198 case R_RISCV_SUB8: 199 case R_RISCV_SUB16: 200 case R_RISCV_SUB32: 201 case R_RISCV_SUB64: 202 return R_RISCV_ADD; 203 case R_RISCV_JAL: 204 case R_RISCV_BRANCH: 205 case R_RISCV_PCREL_HI20: 206 case R_RISCV_RVC_BRANCH: 207 case R_RISCV_RVC_JUMP: 208 case R_RISCV_32_PCREL: 209 return R_PC; 210 case R_RISCV_CALL: 211 case R_RISCV_CALL_PLT: 212 return R_PLT_PC; 213 case R_RISCV_GOT_HI20: 214 return R_GOT_PC; 215 case R_RISCV_PCREL_LO12_I: 216 case R_RISCV_PCREL_LO12_S: 217 return R_RISCV_PC_INDIRECT; 218 case R_RISCV_TLS_GD_HI20: 219 return R_TLSGD_PC; 220 case R_RISCV_TLS_GOT_HI20: 221 config->hasStaticTlsModel = true; 222 return R_GOT_PC; 223 case R_RISCV_TPREL_HI20: 224 case R_RISCV_TPREL_LO12_I: 225 case R_RISCV_TPREL_LO12_S: 226 return R_TLS; 227 case R_RISCV_RELAX: 228 case R_RISCV_ALIGN: 229 case R_RISCV_TPREL_ADD: 230 return R_HINT; 231 default: 232 return R_ABS; 233 } 234 } 235 236 // Extract bits V[Begin:End], where range is inclusive, and Begin must be < 63. 237 static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) { 238 return (v & ((1ULL << (begin + 1)) - 1)) >> end; 239 } 240 241 void RISCV::relocateOne(uint8_t *loc, const RelType type, 242 const uint64_t val) const { 243 const unsigned bits = config->wordsize * 8; 244 245 switch (type) { 246 case R_RISCV_32: 247 write32le(loc, val); 248 return; 249 case R_RISCV_64: 250 write64le(loc, val); 251 return; 252 253 case R_RISCV_RVC_BRANCH: { 254 checkInt(loc, static_cast<int64_t>(val) >> 1, 8, type); 255 checkAlignment(loc, val, 2, type); 256 uint16_t insn = read16le(loc) & 0xE383; 257 uint16_t imm8 = extractBits(val, 8, 8) << 12; 258 uint16_t imm4_3 = extractBits(val, 4, 3) << 10; 259 uint16_t imm7_6 = extractBits(val, 7, 6) << 5; 260 uint16_t imm2_1 = extractBits(val, 2, 1) << 3; 261 uint16_t imm5 = extractBits(val, 5, 5) << 2; 262 insn |= imm8 | imm4_3 | imm7_6 | imm2_1 | imm5; 263 264 write16le(loc, insn); 265 return; 266 } 267 268 case R_RISCV_RVC_JUMP: { 269 checkInt(loc, static_cast<int64_t>(val) >> 1, 11, type); 270 checkAlignment(loc, val, 2, type); 271 uint16_t insn = read16le(loc) & 0xE003; 272 uint16_t imm11 = extractBits(val, 11, 11) << 12; 273 uint16_t imm4 = extractBits(val, 4, 4) << 11; 274 uint16_t imm9_8 = extractBits(val, 9, 8) << 9; 275 uint16_t imm10 = extractBits(val, 10, 10) << 8; 276 uint16_t imm6 = extractBits(val, 6, 6) << 7; 277 uint16_t imm7 = extractBits(val, 7, 7) << 6; 278 uint16_t imm3_1 = extractBits(val, 3, 1) << 3; 279 uint16_t imm5 = extractBits(val, 5, 5) << 2; 280 insn |= imm11 | imm4 | imm9_8 | imm10 | imm6 | imm7 | imm3_1 | imm5; 281 282 write16le(loc, insn); 283 return; 284 } 285 286 case R_RISCV_RVC_LUI: { 287 int64_t imm = SignExtend64(val + 0x800, bits) >> 12; 288 checkInt(loc, imm, 6, type); 289 if (imm == 0) { // `c.lui rd, 0` is illegal, convert to `c.li rd, 0` 290 write16le(loc, (read16le(loc) & 0x0F83) | 0x4000); 291 } else { 292 uint16_t imm17 = extractBits(val + 0x800, 17, 17) << 12; 293 uint16_t imm16_12 = extractBits(val + 0x800, 16, 12) << 2; 294 write16le(loc, (read16le(loc) & 0xEF83) | imm17 | imm16_12); 295 } 296 return; 297 } 298 299 case R_RISCV_JAL: { 300 checkInt(loc, static_cast<int64_t>(val) >> 1, 20, type); 301 checkAlignment(loc, val, 2, type); 302 303 uint32_t insn = read32le(loc) & 0xFFF; 304 uint32_t imm20 = extractBits(val, 20, 20) << 31; 305 uint32_t imm10_1 = extractBits(val, 10, 1) << 21; 306 uint32_t imm11 = extractBits(val, 11, 11) << 20; 307 uint32_t imm19_12 = extractBits(val, 19, 12) << 12; 308 insn |= imm20 | imm10_1 | imm11 | imm19_12; 309 310 write32le(loc, insn); 311 return; 312 } 313 314 case R_RISCV_BRANCH: { 315 checkInt(loc, static_cast<int64_t>(val) >> 1, 12, type); 316 checkAlignment(loc, val, 2, type); 317 318 uint32_t insn = read32le(loc) & 0x1FFF07F; 319 uint32_t imm12 = extractBits(val, 12, 12) << 31; 320 uint32_t imm10_5 = extractBits(val, 10, 5) << 25; 321 uint32_t imm4_1 = extractBits(val, 4, 1) << 8; 322 uint32_t imm11 = extractBits(val, 11, 11) << 7; 323 insn |= imm12 | imm10_5 | imm4_1 | imm11; 324 325 write32le(loc, insn); 326 return; 327 } 328 329 // auipc + jalr pair 330 case R_RISCV_CALL: 331 case R_RISCV_CALL_PLT: { 332 int64_t hi = SignExtend64(val + 0x800, bits) >> 12; 333 checkInt(loc, hi, 20, type); 334 if (isInt<20>(hi)) { 335 relocateOne(loc, R_RISCV_PCREL_HI20, val); 336 relocateOne(loc + 4, R_RISCV_PCREL_LO12_I, val); 337 } 338 return; 339 } 340 341 case R_RISCV_GOT_HI20: 342 case R_RISCV_PCREL_HI20: 343 case R_RISCV_TLS_GD_HI20: 344 case R_RISCV_TLS_GOT_HI20: 345 case R_RISCV_TPREL_HI20: 346 case R_RISCV_HI20: { 347 uint64_t hi = val + 0x800; 348 checkInt(loc, SignExtend64(hi, bits) >> 12, 20, type); 349 write32le(loc, (read32le(loc) & 0xFFF) | (hi & 0xFFFFF000)); 350 return; 351 } 352 353 case R_RISCV_PCREL_LO12_I: 354 case R_RISCV_TPREL_LO12_I: 355 case R_RISCV_LO12_I: { 356 uint64_t hi = (val + 0x800) >> 12; 357 uint64_t lo = val - (hi << 12); 358 write32le(loc, (read32le(loc) & 0xFFFFF) | ((lo & 0xFFF) << 20)); 359 return; 360 } 361 362 case R_RISCV_PCREL_LO12_S: 363 case R_RISCV_TPREL_LO12_S: 364 case R_RISCV_LO12_S: { 365 uint64_t hi = (val + 0x800) >> 12; 366 uint64_t lo = val - (hi << 12); 367 uint32_t imm11_5 = extractBits(lo, 11, 5) << 25; 368 uint32_t imm4_0 = extractBits(lo, 4, 0) << 7; 369 write32le(loc, (read32le(loc) & 0x1FFF07F) | imm11_5 | imm4_0); 370 return; 371 } 372 373 case R_RISCV_ADD8: 374 *loc += val; 375 return; 376 case R_RISCV_ADD16: 377 write16le(loc, read16le(loc) + val); 378 return; 379 case R_RISCV_ADD32: 380 write32le(loc, read32le(loc) + val); 381 return; 382 case R_RISCV_ADD64: 383 write64le(loc, read64le(loc) + val); 384 return; 385 case R_RISCV_SUB6: 386 *loc = (*loc & 0xc0) | (((*loc & 0x3f) - val) & 0x3f); 387 return; 388 case R_RISCV_SUB8: 389 *loc -= val; 390 return; 391 case R_RISCV_SUB16: 392 write16le(loc, read16le(loc) - val); 393 return; 394 case R_RISCV_SUB32: 395 write32le(loc, read32le(loc) - val); 396 return; 397 case R_RISCV_SUB64: 398 write64le(loc, read64le(loc) - val); 399 return; 400 case R_RISCV_SET6: 401 *loc = (*loc & 0xc0) | (val & 0x3f); 402 return; 403 case R_RISCV_SET8: 404 *loc = val; 405 return; 406 case R_RISCV_SET16: 407 write16le(loc, val); 408 return; 409 case R_RISCV_SET32: 410 case R_RISCV_32_PCREL: 411 write32le(loc, val); 412 return; 413 414 case R_RISCV_TLS_DTPREL32: 415 write32le(loc, val - dtpOffset); 416 break; 417 case R_RISCV_TLS_DTPREL64: 418 write64le(loc, val - dtpOffset); 419 break; 420 421 case R_RISCV_ALIGN: 422 case R_RISCV_RELAX: 423 return; // Ignored (for now) 424 case R_RISCV_NONE: 425 return; // Do nothing 426 427 // These are handled by the dynamic linker 428 case R_RISCV_RELATIVE: 429 case R_RISCV_COPY: 430 case R_RISCV_JUMP_SLOT: 431 // GP-relative relocations are only produced after relaxation, which 432 // we don't support for now 433 case R_RISCV_GPREL_I: 434 case R_RISCV_GPREL_S: 435 default: 436 error(getErrorLocation(loc) + 437 "unimplemented relocation: " + toString(type)); 438 return; 439 } 440 } 441 442 TargetInfo *elf::getRISCVTargetInfo() { 443 static RISCV target; 444 return ⌖ 445 } 446