1 //===- PPC.cpp ------------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "OutputSections.h" 10 #include "Symbols.h" 11 #include "SyntheticSections.h" 12 #include "Target.h" 13 #include "Thunks.h" 14 15 using namespace llvm; 16 using namespace llvm::support::endian; 17 using namespace llvm::ELF; 18 using namespace lld; 19 using namespace lld::elf; 20 21 // Undefine the macro predefined by GCC powerpc32. 22 #undef PPC 23 24 namespace { 25 class PPC final : public TargetInfo { 26 public: 27 PPC(Ctx &); 28 RelExpr getRelExpr(RelType type, const Symbol &s, 29 const uint8_t *loc) const override; 30 RelType getDynRel(RelType type) const override; 31 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override; 32 void writeGotHeader(uint8_t *buf) const override; 33 void writePltHeader(uint8_t *buf) const override { 34 llvm_unreachable("should call writePPC32GlinkSection() instead"); 35 } 36 void writePlt(uint8_t *buf, const Symbol &sym, 37 uint64_t pltEntryAddr) const override { 38 llvm_unreachable("should call writePPC32GlinkSection() instead"); 39 } 40 void writeIplt(uint8_t *buf, const Symbol &sym, 41 uint64_t pltEntryAddr) const override; 42 void writeGotPlt(uint8_t *buf, const Symbol &s) const override; 43 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file, 44 uint64_t branchAddr, const Symbol &s, 45 int64_t a) const override; 46 uint32_t getThunkSectionSpacing() const override; 47 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override; 48 void relocate(uint8_t *loc, const Relocation &rel, 49 uint64_t val) const override; 50 RelExpr adjustTlsExpr(RelType type, RelExpr expr) const override; 51 int getTlsGdRelaxSkip(RelType type) const override; 52 void relocateAlloc(InputSectionBase &sec, uint8_t *buf) const override; 53 54 private: 55 void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, uint64_t val) const; 56 void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const; 57 void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const; 58 void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const; 59 }; 60 } // namespace 61 62 static uint16_t lo(uint32_t v) { return v; } 63 static uint16_t ha(uint32_t v) { return (v + 0x8000) >> 16; } 64 65 static uint32_t readFromHalf16(Ctx &ctx, const uint8_t *loc) { 66 return read32(ctx, ctx.arg.isLE ? loc : loc - 2); 67 } 68 69 static void writeFromHalf16(Ctx &ctx, uint8_t *loc, uint32_t insn) { 70 write32(ctx, ctx.arg.isLE ? loc : loc - 2, insn); 71 } 72 73 void elf::writePPC32GlinkSection(Ctx &ctx, uint8_t *buf, size_t numEntries) { 74 // Create canonical PLT entries for non-PIE code. Compilers don't generate 75 // non-GOT-non-PLT relocations referencing external functions for -fpie/-fPIE. 76 uint32_t glink = ctx.in.plt->getVA(); // VA of .glink 77 if (!ctx.arg.isPic) { 78 for (const Symbol *sym : 79 cast<PPC32GlinkSection>(*ctx.in.plt).canonical_plts) { 80 writePPC32PltCallStub(ctx, buf, glink, sym->getGotPltVA(ctx), nullptr, 0); 81 buf += 16; 82 glink += 16; 83 } 84 } 85 86 // On PPC Secure PLT ABI, bl foo@plt jumps to a call stub, which loads an 87 // absolute address from a specific .plt slot (usually called .got.plt on 88 // other targets) and jumps there. 89 // 90 // a) With immediate binding (BIND_NOW), the .plt entry is resolved at load 91 // time. The .glink section is not used. 92 // b) With lazy binding, the .plt entry points to a `b PLTresolve` 93 // instruction in .glink, filled in by PPC::writeGotPlt(). 94 95 // Write N `b PLTresolve` first. 96 for (size_t i = 0; i != numEntries; ++i) 97 write32(ctx, buf + 4 * i, 0x48000000 | 4 * (numEntries - i)); 98 buf += 4 * numEntries; 99 100 // Then write PLTresolve(), which has two forms: PIC and non-PIC. PLTresolve() 101 // computes the PLT index (by computing the distance from the landing b to 102 // itself) and calls _dl_runtime_resolve() (in glibc). 103 uint32_t got = ctx.in.got->getVA(); 104 const uint8_t *end = buf + 64; 105 if (ctx.arg.isPic) { 106 uint32_t afterBcl = 4 * ctx.in.plt->getNumEntries() + 12; 107 uint32_t gotBcl = got + 4 - (glink + afterBcl); 108 write32(ctx, buf + 0, 109 0x3d6b0000 | ha(afterBcl)); // addis r11,r11,1f-glink@ha 110 write32(ctx, buf + 4, 0x7c0802a6); // mflr r0 111 write32(ctx, buf + 8, 0x429f0005); // bcl 20,30,.+4 112 write32(ctx, buf + 12, 113 0x396b0000 | lo(afterBcl)); // 1: addi r11,r11,1b-glink@l 114 write32(ctx, buf + 16, 0x7d8802a6); // mflr r12 115 write32(ctx, buf + 20, 0x7c0803a6); // mtlr r0 116 write32(ctx, buf + 24, 0x7d6c5850); // sub r11,r11,r12 117 write32(ctx, buf + 28, 0x3d8c0000 | ha(gotBcl)); // addis 12,12,GOT+4-1b@ha 118 if (ha(gotBcl) == ha(gotBcl + 4)) { 119 write32(ctx, buf + 32, 120 0x800c0000 | lo(gotBcl)); // lwz r0,r12,GOT+4-1b@l(r12) 121 write32(ctx, buf + 36, 122 0x818c0000 | lo(gotBcl + 4)); // lwz r12,r12,GOT+8-1b@l(r12) 123 } else { 124 write32(ctx, buf + 32, 125 0x840c0000 | lo(gotBcl)); // lwzu r0,r12,GOT+4-1b@l(r12) 126 write32(ctx, buf + 36, 0x818c0000 | 4); // lwz r12,r12,4(r12) 127 } 128 write32(ctx, buf + 40, 0x7c0903a6); // mtctr 0 129 write32(ctx, buf + 44, 0x7c0b5a14); // add r0,11,11 130 write32(ctx, buf + 48, 0x7d605a14); // add r11,0,11 131 write32(ctx, buf + 52, 0x4e800420); // bctr 132 buf += 56; 133 } else { 134 write32(ctx, buf + 0, 0x3d800000 | ha(got + 4)); // lis r12,GOT+4@ha 135 write32(ctx, buf + 4, 0x3d6b0000 | ha(-glink)); // addis r11,r11,-glink@ha 136 if (ha(got + 4) == ha(got + 8)) 137 write32(ctx, buf + 8, 0x800c0000 | lo(got + 4)); // lwz r0,GOT+4@l(r12) 138 else 139 write32(ctx, buf + 8, 0x840c0000 | lo(got + 4)); // lwzu r0,GOT+4@l(r12) 140 write32(ctx, buf + 12, 0x396b0000 | lo(-glink)); // addi r11,r11,-glink@l 141 write32(ctx, buf + 16, 0x7c0903a6); // mtctr r0 142 write32(ctx, buf + 20, 0x7c0b5a14); // add r0,r11,r11 143 if (ha(got + 4) == ha(got + 8)) 144 write32(ctx, buf + 24, 0x818c0000 | lo(got + 8)); // lwz r12,GOT+8@l(r12) 145 else 146 write32(ctx, buf + 24, 0x818c0000 | 4); // lwz r12,4(r12) 147 write32(ctx, buf + 28, 0x7d605a14); // add r11,r0,r11 148 write32(ctx, buf + 32, 0x4e800420); // bctr 149 buf += 36; 150 } 151 152 // Pad with nop. They should not be executed. 153 for (; buf < end; buf += 4) 154 write32(ctx, buf, 0x60000000); 155 } 156 157 PPC::PPC(Ctx &ctx) : TargetInfo(ctx) { 158 copyRel = R_PPC_COPY; 159 gotRel = R_PPC_GLOB_DAT; 160 pltRel = R_PPC_JMP_SLOT; 161 relativeRel = R_PPC_RELATIVE; 162 iRelativeRel = R_PPC_IRELATIVE; 163 symbolicRel = R_PPC_ADDR32; 164 gotHeaderEntriesNum = 3; 165 gotPltHeaderEntriesNum = 0; 166 pltHeaderSize = 0; 167 pltEntrySize = 4; 168 ipltEntrySize = ctx.arg.isPic ? 32 : 16; 169 170 needsThunks = true; 171 172 tlsModuleIndexRel = R_PPC_DTPMOD32; 173 tlsOffsetRel = R_PPC_DTPREL32; 174 tlsGotRel = R_PPC_TPREL32; 175 176 defaultMaxPageSize = 65536; 177 defaultImageBase = 0x10000000; 178 179 write32(ctx, trapInstr.data(), 0x7fe00008); 180 } 181 182 void PPC::writeIplt(uint8_t *buf, const Symbol &sym, 183 uint64_t pltEntryAddr) const { 184 // In -pie or -shared mode we can't rely on r30 for indirect calls, nor for 185 // direct calls with a different TOC base to the resolver. 186 writePPC32PltCallStub(ctx, buf, pltEntryAddr, sym.getGotPltVA(ctx), sym.file, 187 std::nullopt); 188 } 189 190 void PPC::writeGotHeader(uint8_t *buf) const { 191 // _GLOBAL_OFFSET_TABLE_[0] = _DYNAMIC 192 // glibc stores _dl_runtime_resolve in _GLOBAL_OFFSET_TABLE_[1], 193 // link_map in _GLOBAL_OFFSET_TABLE_[2]. 194 write32(ctx, buf, ctx.mainPart->dynamic->getVA()); 195 } 196 197 void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const { 198 // Address of the symbol resolver stub in .glink . 199 write32(ctx, buf, 200 ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx(ctx)); 201 } 202 203 bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file, 204 uint64_t branchAddr, const Symbol &s, int64_t a) const { 205 if (type != R_PPC_LOCAL24PC && type != R_PPC_REL24 && type != R_PPC_PLTREL24) 206 return false; 207 if (s.isInPlt(ctx)) 208 return true; 209 if (s.isUndefWeak()) 210 return false; 211 return !PPC::inBranchRange(type, branchAddr, s.getVA(ctx, a)); 212 } 213 214 uint32_t PPC::getThunkSectionSpacing() const { return 0x2000000; } 215 216 bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const { 217 uint64_t offset = dst - src; 218 if (type == R_PPC_LOCAL24PC || type == R_PPC_REL24 || type == R_PPC_PLTREL24) 219 return isInt<26>(offset); 220 llvm_unreachable("unsupported relocation type used in branch"); 221 } 222 223 RelExpr PPC::getRelExpr(RelType type, const Symbol &s, 224 const uint8_t *loc) const { 225 switch (type) { 226 case R_PPC_NONE: 227 return R_NONE; 228 case R_PPC_ADDR16_HA: 229 case R_PPC_ADDR16_HI: 230 case R_PPC_ADDR16_LO: 231 case R_PPC_ADDR24: 232 case R_PPC_ADDR32: 233 return R_ABS; 234 case R_PPC_DTPREL16: 235 case R_PPC_DTPREL16_HA: 236 case R_PPC_DTPREL16_HI: 237 case R_PPC_DTPREL16_LO: 238 case R_PPC_DTPREL32: 239 return R_DTPREL; 240 case R_PPC_REL14: 241 case R_PPC_REL32: 242 case R_PPC_REL16_LO: 243 case R_PPC_REL16_HI: 244 case R_PPC_REL16_HA: 245 return R_PC; 246 case R_PPC_GOT16: 247 return R_GOT_OFF; 248 case R_PPC_LOCAL24PC: 249 case R_PPC_REL24: 250 return R_PLT_PC; 251 case R_PPC_PLTREL24: 252 return RE_PPC32_PLTREL; 253 case R_PPC_GOT_TLSGD16: 254 return R_TLSGD_GOT; 255 case R_PPC_GOT_TLSLD16: 256 return R_TLSLD_GOT; 257 case R_PPC_GOT_TPREL16: 258 return R_GOT_OFF; 259 case R_PPC_TLS: 260 return R_TLSIE_HINT; 261 case R_PPC_TLSGD: 262 return R_TLSDESC_CALL; 263 case R_PPC_TLSLD: 264 return R_TLSLD_HINT; 265 case R_PPC_TPREL16: 266 case R_PPC_TPREL16_HA: 267 case R_PPC_TPREL16_LO: 268 case R_PPC_TPREL16_HI: 269 return R_TPREL; 270 default: 271 Err(ctx) << getErrorLoc(ctx, loc) << "unknown relocation (" << type.v 272 << ") against symbol " << &s; 273 return R_NONE; 274 } 275 } 276 277 RelType PPC::getDynRel(RelType type) const { 278 if (type == R_PPC_ADDR32) 279 return type; 280 return R_PPC_NONE; 281 } 282 283 int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const { 284 switch (type) { 285 case R_PPC_NONE: 286 case R_PPC_GLOB_DAT: 287 case R_PPC_JMP_SLOT: 288 return 0; 289 case R_PPC_ADDR32: 290 case R_PPC_REL32: 291 case R_PPC_RELATIVE: 292 case R_PPC_IRELATIVE: 293 case R_PPC_DTPMOD32: 294 case R_PPC_DTPREL32: 295 case R_PPC_TPREL32: 296 return SignExtend64<32>(read32(ctx, buf)); 297 default: 298 InternalErr(ctx, buf) << "cannot read addend for relocation " << type; 299 return 0; 300 } 301 } 302 303 static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) { 304 uint64_t dtpBiasedVal = val - 0x8000; 305 switch (type) { 306 case R_PPC_DTPREL16: 307 return {R_PPC64_ADDR16, dtpBiasedVal}; 308 case R_PPC_DTPREL16_HA: 309 return {R_PPC_ADDR16_HA, dtpBiasedVal}; 310 case R_PPC_DTPREL16_HI: 311 return {R_PPC_ADDR16_HI, dtpBiasedVal}; 312 case R_PPC_DTPREL16_LO: 313 return {R_PPC_ADDR16_LO, dtpBiasedVal}; 314 case R_PPC_DTPREL32: 315 return {R_PPC_ADDR32, dtpBiasedVal}; 316 default: 317 return {type, val}; 318 } 319 } 320 321 void PPC::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { 322 RelType newType; 323 std::tie(newType, val) = fromDTPREL(rel.type, val); 324 switch (newType) { 325 case R_PPC_ADDR16: 326 checkIntUInt(ctx, loc, val, 16, rel); 327 write16(ctx, loc, val); 328 break; 329 case R_PPC_GOT16: 330 case R_PPC_GOT_TLSGD16: 331 case R_PPC_GOT_TLSLD16: 332 case R_PPC_GOT_TPREL16: 333 case R_PPC_TPREL16: 334 checkInt(ctx, loc, val, 16, rel); 335 write16(ctx, loc, val); 336 break; 337 case R_PPC_ADDR16_HA: 338 case R_PPC_DTPREL16_HA: 339 case R_PPC_GOT_TLSGD16_HA: 340 case R_PPC_GOT_TLSLD16_HA: 341 case R_PPC_GOT_TPREL16_HA: 342 case R_PPC_REL16_HA: 343 case R_PPC_TPREL16_HA: 344 write16(ctx, loc, ha(val)); 345 break; 346 case R_PPC_ADDR16_HI: 347 case R_PPC_DTPREL16_HI: 348 case R_PPC_GOT_TLSGD16_HI: 349 case R_PPC_GOT_TLSLD16_HI: 350 case R_PPC_GOT_TPREL16_HI: 351 case R_PPC_REL16_HI: 352 case R_PPC_TPREL16_HI: 353 write16(ctx, loc, val >> 16); 354 break; 355 case R_PPC_ADDR16_LO: 356 case R_PPC_DTPREL16_LO: 357 case R_PPC_GOT_TLSGD16_LO: 358 case R_PPC_GOT_TLSLD16_LO: 359 case R_PPC_GOT_TPREL16_LO: 360 case R_PPC_REL16_LO: 361 case R_PPC_TPREL16_LO: 362 write16(ctx, loc, val); 363 break; 364 case R_PPC_ADDR32: 365 case R_PPC_REL32: 366 write32(ctx, loc, val); 367 break; 368 case R_PPC_REL14: { 369 uint32_t mask = 0x0000FFFC; 370 checkInt(ctx, loc, val, 16, rel); 371 checkAlignment(ctx, loc, val, 4, rel); 372 write32(ctx, loc, (read32(ctx, loc) & ~mask) | (val & mask)); 373 break; 374 } 375 case R_PPC_ADDR24: 376 case R_PPC_REL24: 377 case R_PPC_LOCAL24PC: 378 case R_PPC_PLTREL24: { 379 uint32_t mask = 0x03FFFFFC; 380 checkInt(ctx, loc, val, 26, rel); 381 checkAlignment(ctx, loc, val, 4, rel); 382 write32(ctx, loc, (read32(ctx, loc) & ~mask) | (val & mask)); 383 break; 384 } 385 default: 386 llvm_unreachable("unknown relocation"); 387 } 388 } 389 390 RelExpr PPC::adjustTlsExpr(RelType type, RelExpr expr) const { 391 if (expr == R_RELAX_TLS_GD_TO_IE) 392 return R_RELAX_TLS_GD_TO_IE_GOT_OFF; 393 if (expr == R_RELAX_TLS_LD_TO_LE) 394 return R_RELAX_TLS_LD_TO_LE_ABS; 395 return expr; 396 } 397 398 int PPC::getTlsGdRelaxSkip(RelType type) const { 399 // A __tls_get_addr call instruction is marked with 2 relocations: 400 // 401 // R_PPC_TLSGD / R_PPC_TLSLD: marker relocation 402 // R_PPC_REL24: __tls_get_addr 403 // 404 // After the relaxation we no longer call __tls_get_addr and should skip both 405 // relocations to not create a false dependence on __tls_get_addr being 406 // defined. 407 if (type == R_PPC_TLSGD || type == R_PPC_TLSLD) 408 return 2; 409 return 1; 410 } 411 412 void PPC::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, 413 uint64_t val) const { 414 switch (rel.type) { 415 case R_PPC_GOT_TLSGD16: { 416 // addi rT, rA, x@got@tlsgd --> lwz rT, x@got@tprel(rA) 417 uint32_t insn = readFromHalf16(ctx, loc); 418 writeFromHalf16(ctx, loc, 0x80000000 | (insn & 0x03ff0000)); 419 relocateNoSym(loc, R_PPC_GOT_TPREL16, val); 420 break; 421 } 422 case R_PPC_TLSGD: 423 // bl __tls_get_addr(x@tldgd) --> add r3, r3, r2 424 write32(ctx, loc, 0x7c631214); 425 break; 426 default: 427 llvm_unreachable("unsupported relocation for TLS GD to IE relaxation"); 428 } 429 } 430 431 void PPC::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, 432 uint64_t val) const { 433 switch (rel.type) { 434 case R_PPC_GOT_TLSGD16: 435 // addi r3, r31, x@got@tlsgd --> addis r3, r2, x@tprel@ha 436 writeFromHalf16(ctx, loc, 0x3c620000 | ha(val)); 437 break; 438 case R_PPC_TLSGD: 439 // bl __tls_get_addr(x@tldgd) --> add r3, r3, x@tprel@l 440 write32(ctx, loc, 0x38630000 | lo(val)); 441 break; 442 default: 443 llvm_unreachable("unsupported relocation for TLS GD to LE relaxation"); 444 } 445 } 446 447 void PPC::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, 448 uint64_t val) const { 449 switch (rel.type) { 450 case R_PPC_GOT_TLSLD16: 451 // addi r3, rA, x@got@tlsgd --> addis r3, r2, 0 452 writeFromHalf16(ctx, loc, 0x3c620000); 453 break; 454 case R_PPC_TLSLD: 455 // r3+x@dtprel computes r3+x-0x8000, while we want it to compute r3+x@tprel 456 // = r3+x-0x7000, so add 4096 to r3. 457 // bl __tls_get_addr(x@tlsld) --> addi r3, r3, 4096 458 write32(ctx, loc, 0x38631000); 459 break; 460 case R_PPC_DTPREL16: 461 case R_PPC_DTPREL16_HA: 462 case R_PPC_DTPREL16_HI: 463 case R_PPC_DTPREL16_LO: 464 relocate(loc, rel, val); 465 break; 466 default: 467 llvm_unreachable("unsupported relocation for TLS LD to LE relaxation"); 468 } 469 } 470 471 void PPC::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, 472 uint64_t val) const { 473 switch (rel.type) { 474 case R_PPC_GOT_TPREL16: { 475 // lwz rT, x@got@tprel(rA) --> addis rT, r2, x@tprel@ha 476 uint32_t rt = readFromHalf16(ctx, loc) & 0x03e00000; 477 writeFromHalf16(ctx, loc, 0x3c020000 | rt | ha(val)); 478 break; 479 } 480 case R_PPC_TLS: { 481 uint32_t insn = read32(ctx, loc); 482 if (insn >> 26 != 31) 483 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS"; 484 // addi rT, rT, x@tls --> addi rT, rT, x@tprel@l 485 unsigned secondaryOp = (read32(ctx, loc) & 0x000007fe) >> 1; 486 uint32_t dFormOp = getPPCDFormOp(secondaryOp); 487 if (dFormOp == 0) { // Expecting a DS-Form instruction. 488 dFormOp = getPPCDSFormOp(secondaryOp); 489 if (dFormOp == 0) 490 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS"; 491 } 492 write32(ctx, loc, (dFormOp | (insn & 0x03ff0000) | lo(val))); 493 break; 494 } 495 default: 496 llvm_unreachable("unsupported relocation for TLS IE to LE relaxation"); 497 } 498 } 499 500 void PPC::relocateAlloc(InputSectionBase &sec, uint8_t *buf) const { 501 uint64_t secAddr = sec.getOutputSection()->addr; 502 if (auto *s = dyn_cast<InputSection>(&sec)) 503 secAddr += s->outSecOff; 504 for (const Relocation &rel : sec.relocs()) { 505 uint8_t *loc = buf + rel.offset; 506 const uint64_t val = 507 SignExtend64(sec.getRelocTargetVA(ctx, rel, secAddr + rel.offset), 32); 508 switch (rel.expr) { 509 case R_RELAX_TLS_GD_TO_IE_GOT_OFF: 510 relaxTlsGdToIe(loc, rel, val); 511 break; 512 case R_RELAX_TLS_GD_TO_LE: 513 relaxTlsGdToLe(loc, rel, val); 514 break; 515 case R_RELAX_TLS_LD_TO_LE_ABS: 516 relaxTlsLdToLe(loc, rel, val); 517 break; 518 case R_RELAX_TLS_IE_TO_LE: 519 relaxTlsIeToLe(loc, rel, val); 520 break; 521 default: 522 relocate(loc, rel, val); 523 break; 524 } 525 } 526 } 527 528 void elf::setPPCTargetInfo(Ctx &ctx) { ctx.target.reset(new PPC(ctx)); } 529