1 //===-- Hexagon.cpp -------------------------------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "InputFiles.h" 10 #include "Symbols.h" 11 #include "SyntheticSections.h" 12 #include "Target.h" 13 #include "lld/Common/ErrorHandler.h" 14 #include "llvm/BinaryFormat/ELF.h" 15 #include "llvm/Object/ELF.h" 16 #include "llvm/Support/Endian.h" 17 18 using namespace llvm; 19 using namespace llvm::object; 20 using namespace llvm::support::endian; 21 using namespace llvm::ELF; 22 using namespace lld; 23 using namespace lld::elf; 24 25 namespace { 26 class Hexagon final : public TargetInfo { 27 public: 28 Hexagon(); 29 uint32_t calcEFlags() const override; 30 RelExpr getRelExpr(RelType type, const Symbol &s, 31 const uint8_t *loc) const override; 32 void relocateOne(uint8_t *loc, RelType type, uint64_t val) const override; 33 void writePltHeader(uint8_t *buf) const override; 34 void writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, uint64_t pltEntryAddr, 35 int32_t index, unsigned relOff) const override; 36 }; 37 } // namespace 38 39 Hexagon::Hexagon() { 40 pltRel = R_HEX_JMP_SLOT; 41 relativeRel = R_HEX_RELATIVE; 42 gotRel = R_HEX_GLOB_DAT; 43 symbolicRel = R_HEX_32; 44 45 // The zero'th GOT entry is reserved for the address of _DYNAMIC. The 46 // next 3 are reserved for the dynamic loader. 47 gotPltHeaderEntriesNum = 4; 48 49 pltEntrySize = 16; 50 pltHeaderSize = 32; 51 52 // Hexagon Linux uses 64K pages by default. 53 defaultMaxPageSize = 0x10000; 54 noneRel = R_HEX_NONE; 55 } 56 57 uint32_t Hexagon::calcEFlags() const { 58 assert(!objectFiles.empty()); 59 60 // The architecture revision must always be equal to or greater than 61 // greatest revision in the list of inputs. 62 uint32_t ret = 0; 63 for (InputFile *f : objectFiles) { 64 uint32_t eflags = cast<ObjFile<ELF32LE>>(f)->getObj().getHeader()->e_flags; 65 if (eflags > ret) 66 ret = eflags; 67 } 68 return ret; 69 } 70 71 static uint32_t applyMask(uint32_t mask, uint32_t data) { 72 uint32_t result = 0; 73 size_t off = 0; 74 75 for (size_t bit = 0; bit != 32; ++bit) { 76 uint32_t valBit = (data >> off) & 1; 77 uint32_t maskBit = (mask >> bit) & 1; 78 if (maskBit) { 79 result |= (valBit << bit); 80 ++off; 81 } 82 } 83 return result; 84 } 85 86 RelExpr Hexagon::getRelExpr(RelType type, const Symbol &s, 87 const uint8_t *loc) const { 88 switch (type) { 89 case R_HEX_B9_PCREL: 90 case R_HEX_B9_PCREL_X: 91 case R_HEX_B13_PCREL: 92 case R_HEX_B15_PCREL: 93 case R_HEX_B15_PCREL_X: 94 case R_HEX_6_PCREL_X: 95 case R_HEX_32_PCREL: 96 return R_PC; 97 case R_HEX_B22_PCREL: 98 case R_HEX_PLT_B22_PCREL: 99 case R_HEX_B22_PCREL_X: 100 case R_HEX_B32_PCREL_X: 101 return R_PLT_PC; 102 case R_HEX_GOT_11_X: 103 case R_HEX_GOT_16_X: 104 case R_HEX_GOT_32_6_X: 105 return R_HEXAGON_GOT; 106 default: 107 return R_ABS; 108 } 109 } 110 111 static uint32_t findMaskR6(uint32_t insn) { 112 // There are (arguably too) many relocation masks for the DSP's 113 // R_HEX_6_X type. The table below is used to select the correct mask 114 // for the given instruction. 115 struct InstructionMask { 116 uint32_t cmpMask; 117 uint32_t relocMask; 118 }; 119 120 static const InstructionMask r6[] = { 121 {0x38000000, 0x0000201f}, {0x39000000, 0x0000201f}, 122 {0x3e000000, 0x00001f80}, {0x3f000000, 0x00001f80}, 123 {0x40000000, 0x000020f8}, {0x41000000, 0x000007e0}, 124 {0x42000000, 0x000020f8}, {0x43000000, 0x000007e0}, 125 {0x44000000, 0x000020f8}, {0x45000000, 0x000007e0}, 126 {0x46000000, 0x000020f8}, {0x47000000, 0x000007e0}, 127 {0x6a000000, 0x00001f80}, {0x7c000000, 0x001f2000}, 128 {0x9a000000, 0x00000f60}, {0x9b000000, 0x00000f60}, 129 {0x9c000000, 0x00000f60}, {0x9d000000, 0x00000f60}, 130 {0x9f000000, 0x001f0100}, {0xab000000, 0x0000003f}, 131 {0xad000000, 0x0000003f}, {0xaf000000, 0x00030078}, 132 {0xd7000000, 0x006020e0}, {0xd8000000, 0x006020e0}, 133 {0xdb000000, 0x006020e0}, {0xdf000000, 0x006020e0}}; 134 135 // Duplex forms have a fixed mask and parse bits 15:14 are always 136 // zero. Non-duplex insns will always have at least one bit set in the 137 // parse field. 138 if ((0xC000 & insn) == 0x0) 139 return 0x03f00000; 140 141 for (InstructionMask i : r6) 142 if ((0xff000000 & insn) == i.cmpMask) 143 return i.relocMask; 144 145 error("unrecognized instruction for R_HEX_6 relocation: 0x" + 146 utohexstr(insn)); 147 return 0; 148 } 149 150 static uint32_t findMaskR8(uint32_t insn) { 151 if ((0xff000000 & insn) == 0xde000000) 152 return 0x00e020e8; 153 if ((0xff000000 & insn) == 0x3c000000) 154 return 0x0000207f; 155 return 0x00001fe0; 156 } 157 158 static uint32_t findMaskR11(uint32_t insn) { 159 if ((0xff000000 & insn) == 0xa1000000) 160 return 0x060020ff; 161 return 0x06003fe0; 162 } 163 164 static uint32_t findMaskR16(uint32_t insn) { 165 if ((0xff000000 & insn) == 0x48000000) 166 return 0x061f20ff; 167 if ((0xff000000 & insn) == 0x49000000) 168 return 0x061f3fe0; 169 if ((0xff000000 & insn) == 0x78000000) 170 return 0x00df3fe0; 171 if ((0xff000000 & insn) == 0xb0000000) 172 return 0x0fe03fe0; 173 174 error("unrecognized instruction for R_HEX_16_X relocation: 0x" + 175 utohexstr(insn)); 176 return 0; 177 } 178 179 static void or32le(uint8_t *p, int32_t v) { write32le(p, read32le(p) | v); } 180 181 void Hexagon::relocateOne(uint8_t *loc, RelType type, uint64_t val) const { 182 switch (type) { 183 case R_HEX_NONE: 184 break; 185 case R_HEX_6_PCREL_X: 186 case R_HEX_6_X: 187 or32le(loc, applyMask(findMaskR6(read32le(loc)), val)); 188 break; 189 case R_HEX_8_X: 190 or32le(loc, applyMask(findMaskR8(read32le(loc)), val)); 191 break; 192 case R_HEX_9_X: 193 or32le(loc, applyMask(0x00003fe0, val & 0x3f)); 194 break; 195 case R_HEX_10_X: 196 or32le(loc, applyMask(0x00203fe0, val & 0x3f)); 197 break; 198 case R_HEX_11_X: 199 case R_HEX_GOT_11_X: 200 or32le(loc, applyMask(findMaskR11(read32le(loc)), val & 0x3f)); 201 break; 202 case R_HEX_12_X: 203 or32le(loc, applyMask(0x000007e0, val)); 204 break; 205 case R_HEX_16_X: // These relocs only have 6 effective bits. 206 case R_HEX_GOT_16_X: 207 or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0x3f)); 208 break; 209 case R_HEX_32: 210 case R_HEX_32_PCREL: 211 or32le(loc, val); 212 break; 213 case R_HEX_32_6_X: 214 case R_HEX_GOT_32_6_X: 215 or32le(loc, applyMask(0x0fff3fff, val >> 6)); 216 break; 217 case R_HEX_B9_PCREL: 218 or32le(loc, applyMask(0x003000fe, val >> 2)); 219 break; 220 case R_HEX_B9_PCREL_X: 221 or32le(loc, applyMask(0x003000fe, val & 0x3f)); 222 break; 223 case R_HEX_B13_PCREL: 224 or32le(loc, applyMask(0x00202ffe, val >> 2)); 225 break; 226 case R_HEX_B15_PCREL: 227 or32le(loc, applyMask(0x00df20fe, val >> 2)); 228 break; 229 case R_HEX_B15_PCREL_X: 230 or32le(loc, applyMask(0x00df20fe, val & 0x3f)); 231 break; 232 case R_HEX_B22_PCREL: 233 case R_HEX_PLT_B22_PCREL: 234 or32le(loc, applyMask(0x1ff3ffe, val >> 2)); 235 break; 236 case R_HEX_B22_PCREL_X: 237 or32le(loc, applyMask(0x1ff3ffe, val & 0x3f)); 238 break; 239 case R_HEX_B32_PCREL_X: 240 or32le(loc, applyMask(0x0fff3fff, val >> 6)); 241 break; 242 case R_HEX_HI16: 243 or32le(loc, applyMask(0x00c03fff, val >> 16)); 244 break; 245 case R_HEX_LO16: 246 or32le(loc, applyMask(0x00c03fff, val)); 247 break; 248 default: 249 error(getErrorLocation(loc) + "unrecognized relocation " + toString(type)); 250 break; 251 } 252 } 253 254 void Hexagon::writePltHeader(uint8_t *buf) const { 255 const uint8_t pltData[] = { 256 0x00, 0x40, 0x00, 0x00, // { immext (#0) 257 0x1c, 0xc0, 0x49, 0x6a, // r28 = add (pc, ##GOT0@PCREL) } # @GOT0 258 0x0e, 0x42, 0x9c, 0xe2, // { r14 -= add (r28, #16) # offset of GOTn 259 0x4f, 0x40, 0x9c, 0x91, // r15 = memw (r28 + #8) # object ID at GOT2 260 0x3c, 0xc0, 0x9c, 0x91, // r28 = memw (r28 + #4) }# dynamic link at GOT1 261 0x0e, 0x42, 0x0e, 0x8c, // { r14 = asr (r14, #2) # index of PLTn 262 0x00, 0xc0, 0x9c, 0x52, // jumpr r28 } # call dynamic linker 263 0x0c, 0xdb, 0x00, 0x54, // trap0(#0xdb) # bring plt0 into 16byte alignment 264 }; 265 memcpy(buf, pltData, sizeof(pltData)); 266 267 // Offset from PLT0 to the GOT. 268 uint64_t off = in.gotPlt->getVA() - in.plt->getVA(); 269 relocateOne(buf, R_HEX_B32_PCREL_X, off); 270 relocateOne(buf + 4, R_HEX_6_PCREL_X, off); 271 } 272 273 void Hexagon::writePlt(uint8_t *buf, uint64_t gotPltEntryAddr, 274 uint64_t pltEntryAddr, int32_t index, 275 unsigned relOff) const { 276 const uint8_t inst[] = { 277 0x00, 0x40, 0x00, 0x00, // { immext (#0) 278 0x0e, 0xc0, 0x49, 0x6a, // r14 = add (pc, ##GOTn@PCREL) } 279 0x1c, 0xc0, 0x8e, 0x91, // r28 = memw (r14) 280 0x00, 0xc0, 0x9c, 0x52, // jumpr r28 281 }; 282 memcpy(buf, inst, sizeof(inst)); 283 284 relocateOne(buf, R_HEX_B32_PCREL_X, gotPltEntryAddr - pltEntryAddr); 285 relocateOne(buf + 4, R_HEX_6_PCREL_X, gotPltEntryAddr - pltEntryAddr); 286 } 287 288 TargetInfo *elf::getHexagonTargetInfo() { 289 static Hexagon target; 290 return ⌖ 291 } 292