xref: /freebsd/contrib/llvm-project/compiler-rt/lib/orc/elfnix_tls.aarch64.S (revision fe75646a0234a261c0013bf1840fdac4acaf0cec) 
1//===-- elfnix_tlv.aarch64.s ---------------------------------------*- ASM -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file is a part of the ORC runtime support library.
10//
11//===----------------------------------------------------------------------===//
12
13// The content of this file is aarch64-only
14#if defined(__arm64__) || defined(__aarch64__)
15
16#define REGISTER_SAVE_SPACE_SIZE     32 * 24
17
18        .text
19
20  // returns address of TLV in x0, all other registers preserved
21  // TODO: add fast-path for repeat access
22  .globl ___orc_rt_elfnix_tlsdesc_resolver
23___orc_rt_elfnix_tlsdesc_resolver:
24        sub  sp,  sp, #REGISTER_SAVE_SPACE_SIZE
25        stp x29, x30, [sp, #16 * 1]
26        stp x27, x28, [sp, #16 * 2]
27        stp x25, x26, [sp, #16 * 3]
28        stp x23, x24, [sp, #16 * 4]
29        stp x21, x22, [sp, #16 * 5]
30        stp x19, x20, [sp, #16 * 6]
31        stp x17, x18, [sp, #16 * 7]
32        stp x15, x16, [sp, #16 * 8]
33        stp x13, x14, [sp, #16 * 9]
34        stp x11, x12, [sp, #16 * 10]
35        stp  x9, x10, [sp, #16 * 11]
36        stp  x7,  x8, [sp, #16 * 12]
37        stp  x5,  x6, [sp, #16 * 13]
38        stp  x3,  x4, [sp, #16 * 14]
39        stp  x1,  x2, [sp, #16 * 15]
40        stp q30, q31, [sp, #32 * 8]
41        stp q28, q29, [sp, #32 * 9]
42        stp q26, q27, [sp, #32 * 10]
43        stp q24, q25, [sp, #32 * 11]
44        stp q22, q23, [sp, #32 * 12]
45        stp q20, q21, [sp, #32 * 13]
46        stp q18, q19, [sp, #32 * 14]
47        stp q16, q17, [sp, #32 * 15]
48        stp q14, q15, [sp, #32 * 16]
49        stp q12, q13, [sp, #32 * 17]
50        stp q10, q11, [sp, #32 * 18]
51        stp  q8,  q9, [sp, #32 * 19]
52        stp  q6,  q7, [sp, #32 * 20]
53        stp  q4,  q5, [sp, #32 * 21]
54        stp  q2,  q3, [sp, #32 * 22]
55        stp  q0,  q1, [sp, #32 * 23]
56
57        mrs x1, TPIDR_EL0 // get thread pointer
58        bl ___orc_rt_elfnix_tlsdesc_resolver_impl
59
60        ldp  q0,  q1, [sp, #32 * 23]
61        ldp  q2,  q3, [sp, #32 * 22]
62        ldp  q4,  q5, [sp, #32 * 21]
63        ldp  q6,  q7, [sp, #32 * 20]
64        ldp  q8,  q9, [sp, #32 * 19]
65        ldp q10, q11, [sp, #32 * 18]
66        ldp q12, q13, [sp, #32 * 17]
67        ldp q14, q15, [sp, #32 * 16]
68        ldp q16, q17, [sp, #32 * 15]
69        ldp q18, q19, [sp, #32 * 14]
70        ldp q20, q21, [sp, #32 * 13]
71        ldp q22, q23, [sp, #32 * 12]
72        ldp q24, q25, [sp, #32 * 11]
73        ldp q26, q27, [sp, #32 * 10]
74        ldp q28, q29, [sp, #32 * 9]
75        ldp q30, q31, [sp, #32 * 8]
76        ldp  x1,  x2, [sp, #16 * 15]
77        ldp  x3,  x4, [sp, #16 * 14]
78        ldp  x5,  x6, [sp, #16 * 13]
79        ldp  x7,  x8, [sp, #16 * 12]
80        ldp  x9, x10, [sp, #16 * 11]
81        ldp x11, x12, [sp, #16 * 10]
82        ldp x13, x14, [sp, #16 * 9]
83        ldp x15, x16, [sp, #16 * 8]
84        ldp x17, x18, [sp, #16 * 7]
85        ldp x19, x20, [sp, #16 * 6]
86        ldp x21, x22, [sp, #16 * 5]
87        ldp x23, x24, [sp, #16 * 4]
88        ldp x25, x26, [sp, #16 * 3]
89        ldp x27, x28, [sp, #16 * 2]
90        ldp x29, x30, [sp, #16 * 1]
91        add  sp,  sp, #REGISTER_SAVE_SPACE_SIZE
92        ret
93
94#endif // defined(__arm64__) || defined(__aarch64__)
95