1*0b57cec5SDimitry Andric//===-- unordsf2vfp.S - Implement unordsf2vfp -----------------------------===// 2*0b57cec5SDimitry Andric// 3*0b57cec5SDimitry Andric// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*0b57cec5SDimitry Andric// See https://llvm.org/LICENSE.txt for license information. 5*0b57cec5SDimitry Andric// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*0b57cec5SDimitry Andric// 7*0b57cec5SDimitry Andric//===----------------------------------------------------------------------===// 8*0b57cec5SDimitry Andric 9*0b57cec5SDimitry Andric#include "../assembly.h" 10*0b57cec5SDimitry Andric 11*0b57cec5SDimitry Andric// 12*0b57cec5SDimitry Andric// extern int __unordsf2vfp(float a, float b); 13*0b57cec5SDimitry Andric// 14*0b57cec5SDimitry Andric// Returns one iff a or b is NaN 15*0b57cec5SDimitry Andric// Uses Darwin calling convention where single precision arguments are passsed 16*0b57cec5SDimitry Andric// like 32-bit ints 17*0b57cec5SDimitry Andric// 18*0b57cec5SDimitry Andric .syntax unified 19*0b57cec5SDimitry Andric .p2align 2 20*0b57cec5SDimitry AndricDEFINE_COMPILERRT_FUNCTION(__unordsf2vfp) 21*0b57cec5SDimitry Andric#if defined(COMPILER_RT_ARMHF_TARGET) 22*0b57cec5SDimitry Andric vcmp.f32 s0, s1 23*0b57cec5SDimitry Andric#else 24*0b57cec5SDimitry Andric vmov s14, r0 // move from GPR 0 to float register 25*0b57cec5SDimitry Andric vmov s15, r1 // move from GPR 1 to float register 26*0b57cec5SDimitry Andric vcmp.f32 s14, s15 27*0b57cec5SDimitry Andric#endif 28*0b57cec5SDimitry Andric vmrs apsr_nzcv, fpscr 29*0b57cec5SDimitry Andric ITE(vs) 30*0b57cec5SDimitry Andric movvs r0, #1 // set result register to 1 if "overflow" (any NaNs) 31*0b57cec5SDimitry Andric movvc r0, #0 32*0b57cec5SDimitry Andric bx lr 33*0b57cec5SDimitry AndricEND_COMPILERRT_FUNCTION(__unordsf2vfp) 34*0b57cec5SDimitry Andric 35*0b57cec5SDimitry AndricNO_EXEC_STACK_DIRECTIVE 36*0b57cec5SDimitry Andric 37