10b57cec5SDimitry Andric /*===---- xsavecintrin.h - XSAVEC intrinsic --------------------------------=== 20b57cec5SDimitry Andric * 30b57cec5SDimitry Andric * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric * See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric * 70b57cec5SDimitry Andric *===-----------------------------------------------------------------------=== 80b57cec5SDimitry Andric */ 90b57cec5SDimitry Andric 100b57cec5SDimitry Andric #ifndef __IMMINTRIN_H 110b57cec5SDimitry Andric #error "Never use <xsavecintrin.h> directly; include <immintrin.h> instead." 120b57cec5SDimitry Andric #endif 130b57cec5SDimitry Andric 140b57cec5SDimitry Andric #ifndef __XSAVECINTRIN_H 150b57cec5SDimitry Andric #define __XSAVECINTRIN_H 160b57cec5SDimitry Andric 170b57cec5SDimitry Andric /* Define the default attributes for the functions in this file. */ 180b57cec5SDimitry Andric #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("xsavec"))) 190b57cec5SDimitry Andric 20*06c3fb27SDimitry Andric /// Performs a full or partial save of processor state to the memory at 21*06c3fb27SDimitry Andric /// \a __p. The exact state saved depends on the 64-bit mask \a __m and 22*06c3fb27SDimitry Andric /// processor control register \c XCR0. 23*06c3fb27SDimitry Andric /// 24*06c3fb27SDimitry Andric /// \code{.operation} 25*06c3fb27SDimitry Andric /// mask[62:0] := __m[62:0] AND XCR0[62:0] 26*06c3fb27SDimitry Andric /// FOR i := 0 TO 62 27*06c3fb27SDimitry Andric /// IF mask[i] == 1 28*06c3fb27SDimitry Andric /// CASE (i) OF 29*06c3fb27SDimitry Andric /// 0: save X87 FPU state 30*06c3fb27SDimitry Andric /// 1: save SSE state 31*06c3fb27SDimitry Andric /// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] 32*06c3fb27SDimitry Andric /// FI 33*06c3fb27SDimitry Andric /// ENDFOR 34*06c3fb27SDimitry Andric /// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) 35*06c3fb27SDimitry Andric /// \endcode 36*06c3fb27SDimitry Andric /// 37*06c3fb27SDimitry Andric /// \headerfile <immintrin.h> 38*06c3fb27SDimitry Andric /// 39*06c3fb27SDimitry Andric /// This intrinsic corresponds to the \c XSAVEC instruction. 40*06c3fb27SDimitry Andric /// 41*06c3fb27SDimitry Andric /// \param __p 42*06c3fb27SDimitry Andric /// Pointer to the save area; must be 64-byte aligned. 43*06c3fb27SDimitry Andric /// \param __m 44*06c3fb27SDimitry Andric /// A 64-bit mask indicating what state should be saved. 450b57cec5SDimitry Andric static __inline__ void __DEFAULT_FN_ATTRS _xsavec(void * __p,unsigned long long __m)460b57cec5SDimitry Andric_xsavec(void *__p, unsigned long long __m) { 470b57cec5SDimitry Andric __builtin_ia32_xsavec(__p, __m); 480b57cec5SDimitry Andric } 490b57cec5SDimitry Andric 500b57cec5SDimitry Andric #ifdef __x86_64__ 51*06c3fb27SDimitry Andric /// Performs a full or partial save of processor state to the memory at 52*06c3fb27SDimitry Andric /// \a __p. The exact state saved depends on the 64-bit mask \a __m and 53*06c3fb27SDimitry Andric /// processor control register \c XCR0. 54*06c3fb27SDimitry Andric /// 55*06c3fb27SDimitry Andric /// \code{.operation} 56*06c3fb27SDimitry Andric /// mask[62:0] := __m[62:0] AND XCR0[62:0] 57*06c3fb27SDimitry Andric /// FOR i := 0 TO 62 58*06c3fb27SDimitry Andric /// IF mask[i] == 1 59*06c3fb27SDimitry Andric /// CASE (i) OF 60*06c3fb27SDimitry Andric /// 0: save X87 FPU state 61*06c3fb27SDimitry Andric /// 1: save SSE state 62*06c3fb27SDimitry Andric /// DEFAULT: __p.Ext_Save_Area[i] := ProcessorState[i] 63*06c3fb27SDimitry Andric /// FI 64*06c3fb27SDimitry Andric /// ENDFOR 65*06c3fb27SDimitry Andric /// __p.Header.XSTATE_BV[62:0] := INIT_FUNCTION(mask[62:0]) 66*06c3fb27SDimitry Andric /// \endcode 67*06c3fb27SDimitry Andric /// 68*06c3fb27SDimitry Andric /// \headerfile <immintrin.h> 69*06c3fb27SDimitry Andric /// 70*06c3fb27SDimitry Andric /// This intrinsic corresponds to the \c XSAVEC64 instruction. 71*06c3fb27SDimitry Andric /// 72*06c3fb27SDimitry Andric /// \param __p 73*06c3fb27SDimitry Andric /// Pointer to the save area; must be 64-byte aligned. 74*06c3fb27SDimitry Andric /// \param __m 75*06c3fb27SDimitry Andric /// A 64-bit mask indicating what state should be saved. 760b57cec5SDimitry Andric static __inline__ void __DEFAULT_FN_ATTRS _xsavec64(void * __p,unsigned long long __m)770b57cec5SDimitry Andric_xsavec64(void *__p, unsigned long long __m) { 780b57cec5SDimitry Andric __builtin_ia32_xsavec64(__p, __m); 790b57cec5SDimitry Andric } 800b57cec5SDimitry Andric #endif 810b57cec5SDimitry Andric 820b57cec5SDimitry Andric #undef __DEFAULT_FN_ATTRS 830b57cec5SDimitry Andric 840b57cec5SDimitry Andric #endif 85