1*bdd1243dSDimitry Andric /*===---- prfchiintrin.h - PREFETCHI intrinsic -----------------------------=== 2*bdd1243dSDimitry Andric * 3*bdd1243dSDimitry Andric * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*bdd1243dSDimitry Andric * See https://llvm.org/LICENSE.txt for license information. 5*bdd1243dSDimitry Andric * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*bdd1243dSDimitry Andric * 7*bdd1243dSDimitry Andric *===-----------------------------------------------------------------------=== 8*bdd1243dSDimitry Andric */ 9*bdd1243dSDimitry Andric 10*bdd1243dSDimitry Andric #ifndef __PRFCHIINTRIN_H 11*bdd1243dSDimitry Andric #define __PRFCHIINTRIN_H 12*bdd1243dSDimitry Andric 13*bdd1243dSDimitry Andric #ifdef __x86_64__ 14*bdd1243dSDimitry Andric 15*bdd1243dSDimitry Andric /* Define the default attributes for the functions in this file. */ 16*bdd1243dSDimitry Andric #define __DEFAULT_FN_ATTRS \ 17*bdd1243dSDimitry Andric __attribute__((__always_inline__, __nodebug__, __target__("prefetchi"))) 18*bdd1243dSDimitry Andric 19*bdd1243dSDimitry Andric /// Loads an instruction sequence containing the specified memory address into 20*bdd1243dSDimitry Andric /// all level cache. 21*bdd1243dSDimitry Andric /// 22*bdd1243dSDimitry Andric /// Note that the effect of this intrinsic is dependent on the processor 23*bdd1243dSDimitry Andric /// implementation. 24*bdd1243dSDimitry Andric /// 25*bdd1243dSDimitry Andric /// \headerfile <x86intrin.h> 26*bdd1243dSDimitry Andric /// 27*bdd1243dSDimitry Andric /// This intrinsic corresponds to the \c PREFETCHIT0 instruction. 28*bdd1243dSDimitry Andric /// 29*bdd1243dSDimitry Andric /// \param __P 30*bdd1243dSDimitry Andric /// A pointer specifying the memory address to be prefetched. 31*bdd1243dSDimitry Andric static __inline__ void __DEFAULT_FN_ATTRS _m_prefetchit0(volatile const void * __P)32*bdd1243dSDimitry Andric_m_prefetchit0(volatile const void *__P) { 33*bdd1243dSDimitry Andric #pragma clang diagnostic push 34*bdd1243dSDimitry Andric #pragma clang diagnostic ignored "-Wcast-qual" 35*bdd1243dSDimitry Andric __builtin_ia32_prefetchi((const void *)__P, 3 /* _MM_HINT_T0 */); 36*bdd1243dSDimitry Andric #pragma clang diagnostic pop 37*bdd1243dSDimitry Andric } 38*bdd1243dSDimitry Andric 39*bdd1243dSDimitry Andric /// Loads an instruction sequence containing the specified memory address into 40*bdd1243dSDimitry Andric /// all but the first-level cache. 41*bdd1243dSDimitry Andric /// 42*bdd1243dSDimitry Andric /// Note that the effect of this intrinsic is dependent on the processor 43*bdd1243dSDimitry Andric /// implementation. 44*bdd1243dSDimitry Andric /// 45*bdd1243dSDimitry Andric /// \headerfile <x86intrin.h> 46*bdd1243dSDimitry Andric /// 47*bdd1243dSDimitry Andric /// This intrinsic corresponds to the \c PREFETCHIT1 instruction. 48*bdd1243dSDimitry Andric /// 49*bdd1243dSDimitry Andric /// \param __P 50*bdd1243dSDimitry Andric /// A pointer specifying the memory address to be prefetched. 51*bdd1243dSDimitry Andric static __inline__ void __DEFAULT_FN_ATTRS _m_prefetchit1(volatile const void * __P)52*bdd1243dSDimitry Andric_m_prefetchit1(volatile const void *__P) { 53*bdd1243dSDimitry Andric #pragma clang diagnostic push 54*bdd1243dSDimitry Andric #pragma clang diagnostic ignored "-Wcast-qual" 55*bdd1243dSDimitry Andric __builtin_ia32_prefetchi((const void *)__P, 2 /* _MM_HINT_T1 */); 56*bdd1243dSDimitry Andric #pragma clang diagnostic pop 57*bdd1243dSDimitry Andric } 58*bdd1243dSDimitry Andric #endif /* __x86_64__ */ 59*bdd1243dSDimitry Andric #undef __DEFAULT_FN_ATTRS 60*bdd1243dSDimitry Andric 61*bdd1243dSDimitry Andric #endif /* __PRFCHWINTRIN_H */ 62