1 /*===---- immintrin.h - Intel intrinsics -----------------------------------=== 2 * 3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 * See https://llvm.org/LICENSE.txt for license information. 5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 * 7 *===-----------------------------------------------------------------------=== 8 */ 9 10 #ifndef __IMMINTRIN_H 11 #define __IMMINTRIN_H 12 13 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 14 defined(__MMX__) 15 #include <mmintrin.h> 16 #endif 17 18 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 19 defined(__SSE__) 20 #include <xmmintrin.h> 21 #endif 22 23 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 24 defined(__SSE2__) 25 #include <emmintrin.h> 26 #endif 27 28 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 29 defined(__SSE3__) 30 #include <pmmintrin.h> 31 #endif 32 33 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 34 defined(__SSSE3__) 35 #include <tmmintrin.h> 36 #endif 37 38 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 39 (defined(__SSE4_2__) || defined(__SSE4_1__)) 40 #include <smmintrin.h> 41 #endif 42 43 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 44 (defined(__AES__) || defined(__PCLMUL__)) 45 #include <wmmintrin.h> 46 #endif 47 48 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 49 defined(__CLFLUSHOPT__) 50 #include <clflushoptintrin.h> 51 #endif 52 53 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 54 defined(__CLWB__) 55 #include <clwbintrin.h> 56 #endif 57 58 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 59 defined(__AVX__) 60 #include <avxintrin.h> 61 #endif 62 63 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 64 defined(__AVX2__) 65 #include <avx2intrin.h> 66 #endif 67 68 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 69 defined(__F16C__) 70 #include <f16cintrin.h> 71 #endif 72 73 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 74 defined(__VPCLMULQDQ__) 75 #include <vpclmulqdqintrin.h> 76 #endif 77 78 /* No feature check desired due to internal checks */ 79 #include <bmiintrin.h> 80 81 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 82 defined(__BMI2__) 83 #include <bmi2intrin.h> 84 #endif 85 86 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 87 defined(__LZCNT__) 88 #include <lzcntintrin.h> 89 #endif 90 91 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 92 defined(__POPCNT__) 93 #include <popcntintrin.h> 94 #endif 95 96 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 97 defined(__FMA__) 98 #include <fmaintrin.h> 99 #endif 100 101 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 102 defined(__AVX512F__) 103 #include <avx512fintrin.h> 104 #endif 105 106 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 107 defined(__AVX512VL__) 108 #include <avx512vlintrin.h> 109 #endif 110 111 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 112 defined(__AVX512BW__) 113 #include <avx512bwintrin.h> 114 #endif 115 116 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 117 defined(__AVX512BITALG__) 118 #include <avx512bitalgintrin.h> 119 #endif 120 121 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 122 defined(__AVX512CD__) 123 #include <avx512cdintrin.h> 124 #endif 125 126 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 127 defined(__AVX512VPOPCNTDQ__) 128 #include <avx512vpopcntdqintrin.h> 129 #endif 130 131 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 132 (defined(__AVX512VL__) && defined(__AVX512VPOPCNTDQ__)) 133 #include <avx512vpopcntdqvlintrin.h> 134 #endif 135 136 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 137 defined(__AVX512VNNI__) 138 #include <avx512vnniintrin.h> 139 #endif 140 141 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 142 (defined(__AVX512VL__) && defined(__AVX512VNNI__)) 143 #include <avx512vlvnniintrin.h> 144 #endif 145 146 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 147 defined(__AVX512DQ__) 148 #include <avx512dqintrin.h> 149 #endif 150 151 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 152 (defined(__AVX512VL__) && defined(__AVX512BITALG__)) 153 #include <avx512vlbitalgintrin.h> 154 #endif 155 156 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 157 (defined(__AVX512VL__) && defined(__AVX512BW__)) 158 #include <avx512vlbwintrin.h> 159 #endif 160 161 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 162 (defined(__AVX512VL__) && defined(__AVX512CD__)) 163 #include <avx512vlcdintrin.h> 164 #endif 165 166 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 167 (defined(__AVX512VL__) && defined(__AVX512DQ__)) 168 #include <avx512vldqintrin.h> 169 #endif 170 171 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 172 defined(__AVX512ER__) 173 #include <avx512erintrin.h> 174 #endif 175 176 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 177 defined(__AVX512IFMA__) 178 #include <avx512ifmaintrin.h> 179 #endif 180 181 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 182 (defined(__AVX512IFMA__) && defined(__AVX512VL__)) 183 #include <avx512ifmavlintrin.h> 184 #endif 185 186 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 187 defined(__AVX512VBMI__) 188 #include <avx512vbmiintrin.h> 189 #endif 190 191 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 192 (defined(__AVX512VBMI__) && defined(__AVX512VL__)) 193 #include <avx512vbmivlintrin.h> 194 #endif 195 196 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 197 defined(__AVX512VBMI2__) 198 #include <avx512vbmi2intrin.h> 199 #endif 200 201 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 202 (defined(__AVX512VBMI2__) && defined(__AVX512VL__)) 203 #include <avx512vlvbmi2intrin.h> 204 #endif 205 206 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 207 defined(__AVX512PF__) 208 #include <avx512pfintrin.h> 209 #endif 210 211 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 212 defined(__AVX512BF16__) 213 #include <avx512bf16intrin.h> 214 #endif 215 216 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 217 (defined(__AVX512VL__) && defined(__AVX512BF16__)) 218 #include <avx512vlbf16intrin.h> 219 #endif 220 221 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 222 defined(__PKU__) 223 #include <pkuintrin.h> 224 #endif 225 226 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 227 defined(__VAES__) 228 #include <vaesintrin.h> 229 #endif 230 231 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 232 defined(__GFNI__) 233 #include <gfniintrin.h> 234 #endif 235 236 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 237 defined(__RDPID__) 238 /// Returns the value of the IA32_TSC_AUX MSR (0xc0000103). 239 /// 240 /// \headerfile <immintrin.h> 241 /// 242 /// This intrinsic corresponds to the <c> RDPID </c> instruction. 243 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("rdpid"))) 244 _rdpid_u32(void) { 245 return __builtin_ia32_rdpid(); 246 } 247 #endif // __RDPID__ 248 249 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 250 defined(__RDRND__) 251 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) 252 _rdrand16_step(unsigned short *__p) 253 { 254 return __builtin_ia32_rdrand16_step(__p); 255 } 256 257 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) 258 _rdrand32_step(unsigned int *__p) 259 { 260 return __builtin_ia32_rdrand32_step(__p); 261 } 262 263 #ifdef __x86_64__ 264 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("rdrnd"))) 265 _rdrand64_step(unsigned long long *__p) 266 { 267 return __builtin_ia32_rdrand64_step(__p); 268 } 269 #endif 270 #endif /* __RDRND__ */ 271 272 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 273 defined(__FSGSBASE__) 274 #ifdef __x86_64__ 275 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 276 _readfsbase_u32(void) 277 { 278 return __builtin_ia32_rdfsbase32(); 279 } 280 281 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 282 _readfsbase_u64(void) 283 { 284 return __builtin_ia32_rdfsbase64(); 285 } 286 287 static __inline__ unsigned int __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 288 _readgsbase_u32(void) 289 { 290 return __builtin_ia32_rdgsbase32(); 291 } 292 293 static __inline__ unsigned long long __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 294 _readgsbase_u64(void) 295 { 296 return __builtin_ia32_rdgsbase64(); 297 } 298 299 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 300 _writefsbase_u32(unsigned int __V) 301 { 302 __builtin_ia32_wrfsbase32(__V); 303 } 304 305 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 306 _writefsbase_u64(unsigned long long __V) 307 { 308 __builtin_ia32_wrfsbase64(__V); 309 } 310 311 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 312 _writegsbase_u32(unsigned int __V) 313 { 314 __builtin_ia32_wrgsbase32(__V); 315 } 316 317 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("fsgsbase"))) 318 _writegsbase_u64(unsigned long long __V) 319 { 320 __builtin_ia32_wrgsbase64(__V); 321 } 322 323 #endif 324 #endif /* __FSGSBASE__ */ 325 326 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 327 defined(__MOVBE__) 328 329 /* The structs used below are to force the load/store to be unaligned. This 330 * is accomplished with the __packed__ attribute. The __may_alias__ prevents 331 * tbaa metadata from being generated based on the struct and the type of the 332 * field inside of it. 333 */ 334 335 static __inline__ short __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 336 _loadbe_i16(void const * __P) { 337 struct __loadu_i16 { 338 short __v; 339 } __attribute__((__packed__, __may_alias__)); 340 return __builtin_bswap16(((const struct __loadu_i16*)__P)->__v); 341 } 342 343 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 344 _storebe_i16(void * __P, short __D) { 345 struct __storeu_i16 { 346 short __v; 347 } __attribute__((__packed__, __may_alias__)); 348 ((struct __storeu_i16*)__P)->__v = __builtin_bswap16(__D); 349 } 350 351 static __inline__ int __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 352 _loadbe_i32(void const * __P) { 353 struct __loadu_i32 { 354 int __v; 355 } __attribute__((__packed__, __may_alias__)); 356 return __builtin_bswap32(((const struct __loadu_i32*)__P)->__v); 357 } 358 359 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 360 _storebe_i32(void * __P, int __D) { 361 struct __storeu_i32 { 362 int __v; 363 } __attribute__((__packed__, __may_alias__)); 364 ((struct __storeu_i32*)__P)->__v = __builtin_bswap32(__D); 365 } 366 367 #ifdef __x86_64__ 368 static __inline__ long long __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 369 _loadbe_i64(void const * __P) { 370 struct __loadu_i64 { 371 long long __v; 372 } __attribute__((__packed__, __may_alias__)); 373 return __builtin_bswap64(((const struct __loadu_i64*)__P)->__v); 374 } 375 376 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("movbe"))) 377 _storebe_i64(void * __P, long long __D) { 378 struct __storeu_i64 { 379 long long __v; 380 } __attribute__((__packed__, __may_alias__)); 381 ((struct __storeu_i64*)__P)->__v = __builtin_bswap64(__D); 382 } 383 #endif 384 #endif /* __MOVBE */ 385 386 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 387 defined(__RTM__) 388 #include <rtmintrin.h> 389 #include <xtestintrin.h> 390 #endif 391 392 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 393 defined(__SHA__) 394 #include <shaintrin.h> 395 #endif 396 397 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 398 defined(__FXSR__) 399 #include <fxsrintrin.h> 400 #endif 401 402 /* No feature check desired due to internal MSC_VER checks */ 403 #include <xsaveintrin.h> 404 405 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 406 defined(__XSAVEOPT__) 407 #include <xsaveoptintrin.h> 408 #endif 409 410 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 411 defined(__XSAVEC__) 412 #include <xsavecintrin.h> 413 #endif 414 415 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 416 defined(__XSAVES__) 417 #include <xsavesintrin.h> 418 #endif 419 420 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 421 defined(__SHSTK__) 422 #include <cetintrin.h> 423 #endif 424 425 /* Some intrinsics inside adxintrin.h are available only on processors with ADX, 426 * whereas others are also available at all times. */ 427 #include <adxintrin.h> 428 429 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 430 defined(__RDSEED__) 431 #include <rdseedintrin.h> 432 #endif 433 434 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 435 defined(__WBNOINVD__) 436 #include <wbnoinvdintrin.h> 437 #endif 438 439 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 440 defined(__CLDEMOTE__) 441 #include <cldemoteintrin.h> 442 #endif 443 444 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 445 defined(__WAITPKG__) 446 #include <waitpkgintrin.h> 447 #endif 448 449 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 450 defined(__MOVDIRI__) || defined(__MOVDIR64B__) 451 #include <movdirintrin.h> 452 #endif 453 454 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 455 defined(__PCONFIG__) 456 #include <pconfigintrin.h> 457 #endif 458 459 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 460 defined(__SGX__) 461 #include <sgxintrin.h> 462 #endif 463 464 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 465 defined(__PTWRITE__) 466 #include <ptwriteintrin.h> 467 #endif 468 469 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 470 defined(__INVPCID__) 471 #include <invpcidintrin.h> 472 #endif 473 474 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 475 defined(__AMXTILE__) || defined(__AMXINT8__) || defined(__AMXBF16__) 476 #include <amxintrin.h> 477 #endif 478 479 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 480 defined(__AVX512VP2INTERSECT__) 481 #include <avx512vp2intersectintrin.h> 482 #endif 483 484 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 485 (defined(__AVX512VL__) && defined(__AVX512VP2INTERSECT__)) 486 #include <avx512vlvp2intersectintrin.h> 487 #endif 488 489 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 490 defined(__ENQCMD__) 491 #include <enqcmdintrin.h> 492 #endif 493 494 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 495 defined(__SERIALIZE__) 496 #include <serializeintrin.h> 497 #endif 498 499 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \ 500 defined(__TSXLDTRK__) 501 #include <tsxldtrkintrin.h> 502 #endif 503 504 #if defined(_MSC_VER) && __has_extension(gnu_asm) 505 /* Define the default attributes for these intrinsics */ 506 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__)) 507 #ifdef __cplusplus 508 extern "C" { 509 #endif 510 /*----------------------------------------------------------------------------*\ 511 |* Interlocked Exchange HLE 512 \*----------------------------------------------------------------------------*/ 513 #if defined(__i386__) || defined(__x86_64__) 514 static __inline__ long __DEFAULT_FN_ATTRS 515 _InterlockedExchange_HLEAcquire(long volatile *_Target, long _Value) { 516 __asm__ __volatile__(".byte 0xf2 ; lock ; xchg %0, %1" 517 : "+r" (_Value), "+m" (*_Target) :: "memory"); 518 return _Value; 519 } 520 static __inline__ long __DEFAULT_FN_ATTRS 521 _InterlockedExchange_HLERelease(long volatile *_Target, long _Value) { 522 __asm__ __volatile__(".byte 0xf3 ; lock ; xchg %0, %1" 523 : "+r" (_Value), "+m" (*_Target) :: "memory"); 524 return _Value; 525 } 526 #endif 527 #if defined(__x86_64__) 528 static __inline__ __int64 __DEFAULT_FN_ATTRS 529 _InterlockedExchange64_HLEAcquire(__int64 volatile *_Target, __int64 _Value) { 530 __asm__ __volatile__(".byte 0xf2 ; lock ; xchg %0, %1" 531 : "+r" (_Value), "+m" (*_Target) :: "memory"); 532 return _Value; 533 } 534 static __inline__ __int64 __DEFAULT_FN_ATTRS 535 _InterlockedExchange64_HLERelease(__int64 volatile *_Target, __int64 _Value) { 536 __asm__ __volatile__(".byte 0xf3 ; lock ; xchg %0, %1" 537 : "+r" (_Value), "+m" (*_Target) :: "memory"); 538 return _Value; 539 } 540 #endif 541 /*----------------------------------------------------------------------------*\ 542 |* Interlocked Compare Exchange HLE 543 \*----------------------------------------------------------------------------*/ 544 #if defined(__i386__) || defined(__x86_64__) 545 static __inline__ long __DEFAULT_FN_ATTRS 546 _InterlockedCompareExchange_HLEAcquire(long volatile *_Destination, 547 long _Exchange, long _Comparand) { 548 __asm__ __volatile__(".byte 0xf2 ; lock ; cmpxchg %2, %1" 549 : "+a" (_Comparand), "+m" (*_Destination) 550 : "r" (_Exchange) : "memory"); 551 return _Comparand; 552 } 553 static __inline__ long __DEFAULT_FN_ATTRS 554 _InterlockedCompareExchange_HLERelease(long volatile *_Destination, 555 long _Exchange, long _Comparand) { 556 __asm__ __volatile__(".byte 0xf3 ; lock ; cmpxchg %2, %1" 557 : "+a" (_Comparand), "+m" (*_Destination) 558 : "r" (_Exchange) : "memory"); 559 return _Comparand; 560 } 561 #endif 562 #if defined(__x86_64__) 563 static __inline__ __int64 __DEFAULT_FN_ATTRS 564 _InterlockedCompareExchange64_HLEAcquire(__int64 volatile *_Destination, 565 __int64 _Exchange, __int64 _Comparand) { 566 __asm__ __volatile__(".byte 0xf2 ; lock ; cmpxchg %2, %1" 567 : "+a" (_Comparand), "+m" (*_Destination) 568 : "r" (_Exchange) : "memory"); 569 return _Comparand; 570 } 571 static __inline__ __int64 __DEFAULT_FN_ATTRS 572 _InterlockedCompareExchange64_HLERelease(__int64 volatile *_Destination, 573 __int64 _Exchange, __int64 _Comparand) { 574 __asm__ __volatile__(".byte 0xf3 ; lock ; cmpxchg %2, %1" 575 : "+a" (_Comparand), "+m" (*_Destination) 576 : "r" (_Exchange) : "memory"); 577 return _Comparand; 578 } 579 #endif 580 #ifdef __cplusplus 581 } 582 #endif 583 584 #undef __DEFAULT_FN_ATTRS 585 586 #endif /* defined(_MSC_VER) && __has_extension(gnu_asm) */ 587 588 #endif /* __IMMINTRIN_H */ 589