xref: /freebsd/contrib/llvm-project/clang/lib/Headers/gfniintrin.h (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229)
1 /*===----------------- gfniintrin.h - GFNI intrinsics ----------------------===
2  *
3  *
4  * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
5  * See https://llvm.org/LICENSE.txt for license information.
6  * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7  *
8  *===-----------------------------------------------------------------------===
9  */
10 #ifndef __IMMINTRIN_H
11 #error "Never use <gfniintrin.h> directly; include <immintrin.h> instead."
12 #endif
13 
14 #ifndef __GFNIINTRIN_H
15 #define __GFNIINTRIN_H
16 
17 
18 #define _mm_gf2p8affineinv_epi64_epi8(A, B, I) \
19   (__m128i)__builtin_ia32_vgf2p8affineinvqb_v16qi((__v16qi)(__m128i)(A),          \
20                                                   (__v16qi)(__m128i)(B),          \
21                                                   (char)(I))
22 
23 #define _mm_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
24   (__m128i)__builtin_ia32_selectb_128((__mmask16)(U),                             \
25         (__v16qi)_mm_gf2p8affineinv_epi64_epi8(A, B, I),                          \
26         (__v16qi)(__m128i)(S))
27 
28 
29 #define _mm_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
30   (__m128i)_mm_mask_gf2p8affineinv_epi64_epi8((__m128i)_mm_setzero_si128(),       \
31         U, A, B, I)
32 
33 
34 #define _mm256_gf2p8affineinv_epi64_epi8(A, B, I) \
35   (__m256i)__builtin_ia32_vgf2p8affineinvqb_v32qi((__v32qi)(__m256i)(A),          \
36                                                   (__v32qi)(__m256i)(B),          \
37                                                   (char)(I))
38 
39 #define _mm256_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
40    (__m256i)__builtin_ia32_selectb_256((__mmask32)(U),                            \
41         (__v32qi)_mm256_gf2p8affineinv_epi64_epi8(A, B, I),                       \
42         (__v32qi)(__m256i)(S))
43 
44 #define _mm256_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
45   (__m256i)_mm256_mask_gf2p8affineinv_epi64_epi8((__m256i)_mm256_setzero_si256(), \
46         U, A, B, I)
47 
48 
49 #define _mm512_gf2p8affineinv_epi64_epi8(A, B, I) \
50   (__m512i)__builtin_ia32_vgf2p8affineinvqb_v64qi((__v64qi)(__m512i)(A),          \
51                                                   (__v64qi)(__m512i)(B),          \
52                                                   (char)(I))
53 
54 #define _mm512_mask_gf2p8affineinv_epi64_epi8(S, U, A, B, I) \
55    (__m512i)__builtin_ia32_selectb_512((__mmask64)(U),                            \
56         (__v64qi)_mm512_gf2p8affineinv_epi64_epi8(A, B, I),                       \
57         (__v64qi)(__m512i)(S))
58 
59 #define _mm512_maskz_gf2p8affineinv_epi64_epi8(U, A, B, I) \
60   (__m512i)_mm512_mask_gf2p8affineinv_epi64_epi8((__m512i)_mm512_setzero_si512(),    \
61         U, A, B, I)
62 
63 #define _mm_gf2p8affine_epi64_epi8(A, B, I) \
64   (__m128i)__builtin_ia32_vgf2p8affineqb_v16qi((__v16qi)(__m128i)(A),             \
65                                                   (__v16qi)(__m128i)(B),          \
66                                                   (char)(I))
67 
68 #define _mm_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
69   (__m128i)__builtin_ia32_selectb_128((__mmask16)(U),                             \
70         (__v16qi)_mm_gf2p8affine_epi64_epi8(A, B, I),                             \
71         (__v16qi)(__m128i)(S))
72 
73 
74 #define _mm_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
75   (__m128i)_mm_mask_gf2p8affine_epi64_epi8((__m128i)_mm_setzero_si128(),          \
76         U, A, B, I)
77 
78 
79 #define _mm256_gf2p8affine_epi64_epi8(A, B, I) \
80   (__m256i)__builtin_ia32_vgf2p8affineqb_v32qi((__v32qi)(__m256i)(A),             \
81                                                   (__v32qi)(__m256i)(B),          \
82                                                   (char)(I))
83 
84 #define _mm256_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
85    (__m256i)__builtin_ia32_selectb_256((__mmask32)(U),                            \
86         (__v32qi)_mm256_gf2p8affine_epi64_epi8(A, B, I),                          \
87         (__v32qi)(__m256i)(S))
88 
89 #define _mm256_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
90   (__m256i)_mm256_mask_gf2p8affine_epi64_epi8((__m256i)_mm256_setzero_si256(),    \
91         U, A, B, I)
92 
93 
94 #define _mm512_gf2p8affine_epi64_epi8(A, B, I) \
95   (__m512i)__builtin_ia32_vgf2p8affineqb_v64qi((__v64qi)(__m512i)(A),             \
96                                                   (__v64qi)(__m512i)(B),          \
97                                                   (char)(I))
98 
99 #define _mm512_mask_gf2p8affine_epi64_epi8(S, U, A, B, I) \
100    (__m512i)__builtin_ia32_selectb_512((__mmask64)(U),                            \
101         (__v64qi)_mm512_gf2p8affine_epi64_epi8(A, B, I),                          \
102         (__v64qi)(__m512i)(S))
103 
104 #define _mm512_maskz_gf2p8affine_epi64_epi8(U, A, B, I) \
105   (__m512i)_mm512_mask_gf2p8affine_epi64_epi8((__m512i)_mm512_setzero_si512(),       \
106         U, A, B, I)
107 
108 /* Default attributes for simple form (no masking). */
109 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("gfni"), __min_vector_width__(128)))
110 
111 /* Default attributes for YMM unmasked form. */
112 #define __DEFAULT_FN_ATTRS_Y __attribute__((__always_inline__, __nodebug__, __target__("avx,gfni"), __min_vector_width__(256)))
113 
114 /* Default attributes for ZMM forms. */
115 #define __DEFAULT_FN_ATTRS_Z __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,gfni"), __min_vector_width__(512)))
116 
117 /* Default attributes for VLX forms. */
118 #define __DEFAULT_FN_ATTRS_VL128 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,avx512vl,gfni"), __min_vector_width__(128)))
119 #define __DEFAULT_FN_ATTRS_VL256 __attribute__((__always_inline__, __nodebug__, __target__("avx512bw,avx512vl,gfni"), __min_vector_width__(256)))
120 
121 static __inline__ __m128i __DEFAULT_FN_ATTRS
122 _mm_gf2p8mul_epi8(__m128i __A, __m128i __B)
123 {
124   return (__m128i) __builtin_ia32_vgf2p8mulb_v16qi((__v16qi) __A,
125               (__v16qi) __B);
126 }
127 
128 static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128
129 _mm_mask_gf2p8mul_epi8(__m128i __S, __mmask16 __U, __m128i __A, __m128i __B)
130 {
131   return (__m128i) __builtin_ia32_selectb_128(__U,
132               (__v16qi) _mm_gf2p8mul_epi8(__A, __B),
133               (__v16qi) __S);
134 }
135 
136 static __inline__ __m128i __DEFAULT_FN_ATTRS_VL128
137 _mm_maskz_gf2p8mul_epi8(__mmask16 __U, __m128i __A, __m128i __B)
138 {
139   return _mm_mask_gf2p8mul_epi8((__m128i)_mm_setzero_si128(),
140               __U, __A, __B);
141 }
142 
143 static __inline__ __m256i __DEFAULT_FN_ATTRS_Y
144 _mm256_gf2p8mul_epi8(__m256i __A, __m256i __B)
145 {
146   return (__m256i) __builtin_ia32_vgf2p8mulb_v32qi((__v32qi) __A,
147               (__v32qi) __B);
148 }
149 
150 static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256
151 _mm256_mask_gf2p8mul_epi8(__m256i __S, __mmask32 __U, __m256i __A, __m256i __B)
152 {
153   return (__m256i) __builtin_ia32_selectb_256(__U,
154               (__v32qi) _mm256_gf2p8mul_epi8(__A, __B),
155               (__v32qi) __S);
156 }
157 
158 static __inline__ __m256i __DEFAULT_FN_ATTRS_VL256
159 _mm256_maskz_gf2p8mul_epi8(__mmask32 __U, __m256i __A, __m256i __B)
160 {
161   return _mm256_mask_gf2p8mul_epi8((__m256i)_mm256_setzero_si256(),
162               __U, __A, __B);
163 }
164 
165 static __inline__ __m512i __DEFAULT_FN_ATTRS_Z
166 _mm512_gf2p8mul_epi8(__m512i __A, __m512i __B)
167 {
168   return (__m512i) __builtin_ia32_vgf2p8mulb_v64qi((__v64qi) __A,
169               (__v64qi) __B);
170 }
171 
172 static __inline__ __m512i __DEFAULT_FN_ATTRS_Z
173 _mm512_mask_gf2p8mul_epi8(__m512i __S, __mmask64 __U, __m512i __A, __m512i __B)
174 {
175   return (__m512i) __builtin_ia32_selectb_512(__U,
176               (__v64qi) _mm512_gf2p8mul_epi8(__A, __B),
177               (__v64qi) __S);
178 }
179 
180 static __inline__ __m512i __DEFAULT_FN_ATTRS_Z
181 _mm512_maskz_gf2p8mul_epi8(__mmask64 __U, __m512i __A, __m512i __B)
182 {
183   return _mm512_mask_gf2p8mul_epi8((__m512i)_mm512_setzero_si512(),
184               __U, __A, __B);
185 }
186 
187 #undef __DEFAULT_FN_ATTRS
188 #undef __DEFAULT_FN_ATTRS_Y
189 #undef __DEFAULT_FN_ATTRS_Z
190 #undef __DEFAULT_FN_ATTRS_VL128
191 #undef __DEFAULT_FN_ATTRS_VL256
192 
193 #endif /* __GFNIINTRIN_H */
194 
195