1 /*===---- avx512fintrin.h - AVX512F intrinsics -----------------------------=== 2 * 3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 * See https://llvm.org/LICENSE.txt for license information. 5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 * 7 *===-----------------------------------------------------------------------=== 8 */ 9 #ifndef __IMMINTRIN_H 10 #error "Never use <avx512fintrin.h> directly; include <immintrin.h> instead." 11 #endif 12 13 #ifndef __AVX512FINTRIN_H 14 #define __AVX512FINTRIN_H 15 16 typedef char __v64qi __attribute__((__vector_size__(64))); 17 typedef short __v32hi __attribute__((__vector_size__(64))); 18 typedef double __v8df __attribute__((__vector_size__(64))); 19 typedef float __v16sf __attribute__((__vector_size__(64))); 20 typedef long long __v8di __attribute__((__vector_size__(64))); 21 typedef int __v16si __attribute__((__vector_size__(64))); 22 23 /* Unsigned types */ 24 typedef unsigned char __v64qu __attribute__((__vector_size__(64))); 25 typedef unsigned short __v32hu __attribute__((__vector_size__(64))); 26 typedef unsigned long long __v8du __attribute__((__vector_size__(64))); 27 typedef unsigned int __v16su __attribute__((__vector_size__(64))); 28 29 /* We need an explicitly signed variant for char. Note that this shouldn't 30 * appear in the interface though. */ 31 typedef signed char __v64qs __attribute__((__vector_size__(64))); 32 33 typedef float __m512 __attribute__((__vector_size__(64), __aligned__(64))); 34 typedef double __m512d __attribute__((__vector_size__(64), __aligned__(64))); 35 typedef long long __m512i __attribute__((__vector_size__(64), __aligned__(64))); 36 37 typedef float __m512_u __attribute__((__vector_size__(64), __aligned__(1))); 38 typedef double __m512d_u __attribute__((__vector_size__(64), __aligned__(1))); 39 typedef long long __m512i_u __attribute__((__vector_size__(64), __aligned__(1))); 40 41 typedef unsigned char __mmask8; 42 typedef unsigned short __mmask16; 43 44 /* Rounding mode macros. */ 45 #define _MM_FROUND_TO_NEAREST_INT 0x00 46 #define _MM_FROUND_TO_NEG_INF 0x01 47 #define _MM_FROUND_TO_POS_INF 0x02 48 #define _MM_FROUND_TO_ZERO 0x03 49 #define _MM_FROUND_CUR_DIRECTION 0x04 50 51 /* Constants for integer comparison predicates */ 52 typedef enum { 53 _MM_CMPINT_EQ, /* Equal */ 54 _MM_CMPINT_LT, /* Less than */ 55 _MM_CMPINT_LE, /* Less than or Equal */ 56 _MM_CMPINT_UNUSED, 57 _MM_CMPINT_NE, /* Not Equal */ 58 _MM_CMPINT_NLT, /* Not Less than */ 59 #define _MM_CMPINT_GE _MM_CMPINT_NLT /* Greater than or Equal */ 60 _MM_CMPINT_NLE /* Not Less than or Equal */ 61 #define _MM_CMPINT_GT _MM_CMPINT_NLE /* Greater than */ 62 } _MM_CMPINT_ENUM; 63 64 typedef enum 65 { 66 _MM_PERM_AAAA = 0x00, _MM_PERM_AAAB = 0x01, _MM_PERM_AAAC = 0x02, 67 _MM_PERM_AAAD = 0x03, _MM_PERM_AABA = 0x04, _MM_PERM_AABB = 0x05, 68 _MM_PERM_AABC = 0x06, _MM_PERM_AABD = 0x07, _MM_PERM_AACA = 0x08, 69 _MM_PERM_AACB = 0x09, _MM_PERM_AACC = 0x0A, _MM_PERM_AACD = 0x0B, 70 _MM_PERM_AADA = 0x0C, _MM_PERM_AADB = 0x0D, _MM_PERM_AADC = 0x0E, 71 _MM_PERM_AADD = 0x0F, _MM_PERM_ABAA = 0x10, _MM_PERM_ABAB = 0x11, 72 _MM_PERM_ABAC = 0x12, _MM_PERM_ABAD = 0x13, _MM_PERM_ABBA = 0x14, 73 _MM_PERM_ABBB = 0x15, _MM_PERM_ABBC = 0x16, _MM_PERM_ABBD = 0x17, 74 _MM_PERM_ABCA = 0x18, _MM_PERM_ABCB = 0x19, _MM_PERM_ABCC = 0x1A, 75 _MM_PERM_ABCD = 0x1B, _MM_PERM_ABDA = 0x1C, _MM_PERM_ABDB = 0x1D, 76 _MM_PERM_ABDC = 0x1E, _MM_PERM_ABDD = 0x1F, _MM_PERM_ACAA = 0x20, 77 _MM_PERM_ACAB = 0x21, _MM_PERM_ACAC = 0x22, _MM_PERM_ACAD = 0x23, 78 _MM_PERM_ACBA = 0x24, _MM_PERM_ACBB = 0x25, _MM_PERM_ACBC = 0x26, 79 _MM_PERM_ACBD = 0x27, _MM_PERM_ACCA = 0x28, _MM_PERM_ACCB = 0x29, 80 _MM_PERM_ACCC = 0x2A, _MM_PERM_ACCD = 0x2B, _MM_PERM_ACDA = 0x2C, 81 _MM_PERM_ACDB = 0x2D, _MM_PERM_ACDC = 0x2E, _MM_PERM_ACDD = 0x2F, 82 _MM_PERM_ADAA = 0x30, _MM_PERM_ADAB = 0x31, _MM_PERM_ADAC = 0x32, 83 _MM_PERM_ADAD = 0x33, _MM_PERM_ADBA = 0x34, _MM_PERM_ADBB = 0x35, 84 _MM_PERM_ADBC = 0x36, _MM_PERM_ADBD = 0x37, _MM_PERM_ADCA = 0x38, 85 _MM_PERM_ADCB = 0x39, _MM_PERM_ADCC = 0x3A, _MM_PERM_ADCD = 0x3B, 86 _MM_PERM_ADDA = 0x3C, _MM_PERM_ADDB = 0x3D, _MM_PERM_ADDC = 0x3E, 87 _MM_PERM_ADDD = 0x3F, _MM_PERM_BAAA = 0x40, _MM_PERM_BAAB = 0x41, 88 _MM_PERM_BAAC = 0x42, _MM_PERM_BAAD = 0x43, _MM_PERM_BABA = 0x44, 89 _MM_PERM_BABB = 0x45, _MM_PERM_BABC = 0x46, _MM_PERM_BABD = 0x47, 90 _MM_PERM_BACA = 0x48, _MM_PERM_BACB = 0x49, _MM_PERM_BACC = 0x4A, 91 _MM_PERM_BACD = 0x4B, _MM_PERM_BADA = 0x4C, _MM_PERM_BADB = 0x4D, 92 _MM_PERM_BADC = 0x4E, _MM_PERM_BADD = 0x4F, _MM_PERM_BBAA = 0x50, 93 _MM_PERM_BBAB = 0x51, _MM_PERM_BBAC = 0x52, _MM_PERM_BBAD = 0x53, 94 _MM_PERM_BBBA = 0x54, _MM_PERM_BBBB = 0x55, _MM_PERM_BBBC = 0x56, 95 _MM_PERM_BBBD = 0x57, _MM_PERM_BBCA = 0x58, _MM_PERM_BBCB = 0x59, 96 _MM_PERM_BBCC = 0x5A, _MM_PERM_BBCD = 0x5B, _MM_PERM_BBDA = 0x5C, 97 _MM_PERM_BBDB = 0x5D, _MM_PERM_BBDC = 0x5E, _MM_PERM_BBDD = 0x5F, 98 _MM_PERM_BCAA = 0x60, _MM_PERM_BCAB = 0x61, _MM_PERM_BCAC = 0x62, 99 _MM_PERM_BCAD = 0x63, _MM_PERM_BCBA = 0x64, _MM_PERM_BCBB = 0x65, 100 _MM_PERM_BCBC = 0x66, _MM_PERM_BCBD = 0x67, _MM_PERM_BCCA = 0x68, 101 _MM_PERM_BCCB = 0x69, _MM_PERM_BCCC = 0x6A, _MM_PERM_BCCD = 0x6B, 102 _MM_PERM_BCDA = 0x6C, _MM_PERM_BCDB = 0x6D, _MM_PERM_BCDC = 0x6E, 103 _MM_PERM_BCDD = 0x6F, _MM_PERM_BDAA = 0x70, _MM_PERM_BDAB = 0x71, 104 _MM_PERM_BDAC = 0x72, _MM_PERM_BDAD = 0x73, _MM_PERM_BDBA = 0x74, 105 _MM_PERM_BDBB = 0x75, _MM_PERM_BDBC = 0x76, _MM_PERM_BDBD = 0x77, 106 _MM_PERM_BDCA = 0x78, _MM_PERM_BDCB = 0x79, _MM_PERM_BDCC = 0x7A, 107 _MM_PERM_BDCD = 0x7B, _MM_PERM_BDDA = 0x7C, _MM_PERM_BDDB = 0x7D, 108 _MM_PERM_BDDC = 0x7E, _MM_PERM_BDDD = 0x7F, _MM_PERM_CAAA = 0x80, 109 _MM_PERM_CAAB = 0x81, _MM_PERM_CAAC = 0x82, _MM_PERM_CAAD = 0x83, 110 _MM_PERM_CABA = 0x84, _MM_PERM_CABB = 0x85, _MM_PERM_CABC = 0x86, 111 _MM_PERM_CABD = 0x87, _MM_PERM_CACA = 0x88, _MM_PERM_CACB = 0x89, 112 _MM_PERM_CACC = 0x8A, _MM_PERM_CACD = 0x8B, _MM_PERM_CADA = 0x8C, 113 _MM_PERM_CADB = 0x8D, _MM_PERM_CADC = 0x8E, _MM_PERM_CADD = 0x8F, 114 _MM_PERM_CBAA = 0x90, _MM_PERM_CBAB = 0x91, _MM_PERM_CBAC = 0x92, 115 _MM_PERM_CBAD = 0x93, _MM_PERM_CBBA = 0x94, _MM_PERM_CBBB = 0x95, 116 _MM_PERM_CBBC = 0x96, _MM_PERM_CBBD = 0x97, _MM_PERM_CBCA = 0x98, 117 _MM_PERM_CBCB = 0x99, _MM_PERM_CBCC = 0x9A, _MM_PERM_CBCD = 0x9B, 118 _MM_PERM_CBDA = 0x9C, _MM_PERM_CBDB = 0x9D, _MM_PERM_CBDC = 0x9E, 119 _MM_PERM_CBDD = 0x9F, _MM_PERM_CCAA = 0xA0, _MM_PERM_CCAB = 0xA1, 120 _MM_PERM_CCAC = 0xA2, _MM_PERM_CCAD = 0xA3, _MM_PERM_CCBA = 0xA4, 121 _MM_PERM_CCBB = 0xA5, _MM_PERM_CCBC = 0xA6, _MM_PERM_CCBD = 0xA7, 122 _MM_PERM_CCCA = 0xA8, _MM_PERM_CCCB = 0xA9, _MM_PERM_CCCC = 0xAA, 123 _MM_PERM_CCCD = 0xAB, _MM_PERM_CCDA = 0xAC, _MM_PERM_CCDB = 0xAD, 124 _MM_PERM_CCDC = 0xAE, _MM_PERM_CCDD = 0xAF, _MM_PERM_CDAA = 0xB0, 125 _MM_PERM_CDAB = 0xB1, _MM_PERM_CDAC = 0xB2, _MM_PERM_CDAD = 0xB3, 126 _MM_PERM_CDBA = 0xB4, _MM_PERM_CDBB = 0xB5, _MM_PERM_CDBC = 0xB6, 127 _MM_PERM_CDBD = 0xB7, _MM_PERM_CDCA = 0xB8, _MM_PERM_CDCB = 0xB9, 128 _MM_PERM_CDCC = 0xBA, _MM_PERM_CDCD = 0xBB, _MM_PERM_CDDA = 0xBC, 129 _MM_PERM_CDDB = 0xBD, _MM_PERM_CDDC = 0xBE, _MM_PERM_CDDD = 0xBF, 130 _MM_PERM_DAAA = 0xC0, _MM_PERM_DAAB = 0xC1, _MM_PERM_DAAC = 0xC2, 131 _MM_PERM_DAAD = 0xC3, _MM_PERM_DABA = 0xC4, _MM_PERM_DABB = 0xC5, 132 _MM_PERM_DABC = 0xC6, _MM_PERM_DABD = 0xC7, _MM_PERM_DACA = 0xC8, 133 _MM_PERM_DACB = 0xC9, _MM_PERM_DACC = 0xCA, _MM_PERM_DACD = 0xCB, 134 _MM_PERM_DADA = 0xCC, _MM_PERM_DADB = 0xCD, _MM_PERM_DADC = 0xCE, 135 _MM_PERM_DADD = 0xCF, _MM_PERM_DBAA = 0xD0, _MM_PERM_DBAB = 0xD1, 136 _MM_PERM_DBAC = 0xD2, _MM_PERM_DBAD = 0xD3, _MM_PERM_DBBA = 0xD4, 137 _MM_PERM_DBBB = 0xD5, _MM_PERM_DBBC = 0xD6, _MM_PERM_DBBD = 0xD7, 138 _MM_PERM_DBCA = 0xD8, _MM_PERM_DBCB = 0xD9, _MM_PERM_DBCC = 0xDA, 139 _MM_PERM_DBCD = 0xDB, _MM_PERM_DBDA = 0xDC, _MM_PERM_DBDB = 0xDD, 140 _MM_PERM_DBDC = 0xDE, _MM_PERM_DBDD = 0xDF, _MM_PERM_DCAA = 0xE0, 141 _MM_PERM_DCAB = 0xE1, _MM_PERM_DCAC = 0xE2, _MM_PERM_DCAD = 0xE3, 142 _MM_PERM_DCBA = 0xE4, _MM_PERM_DCBB = 0xE5, _MM_PERM_DCBC = 0xE6, 143 _MM_PERM_DCBD = 0xE7, _MM_PERM_DCCA = 0xE8, _MM_PERM_DCCB = 0xE9, 144 _MM_PERM_DCCC = 0xEA, _MM_PERM_DCCD = 0xEB, _MM_PERM_DCDA = 0xEC, 145 _MM_PERM_DCDB = 0xED, _MM_PERM_DCDC = 0xEE, _MM_PERM_DCDD = 0xEF, 146 _MM_PERM_DDAA = 0xF0, _MM_PERM_DDAB = 0xF1, _MM_PERM_DDAC = 0xF2, 147 _MM_PERM_DDAD = 0xF3, _MM_PERM_DDBA = 0xF4, _MM_PERM_DDBB = 0xF5, 148 _MM_PERM_DDBC = 0xF6, _MM_PERM_DDBD = 0xF7, _MM_PERM_DDCA = 0xF8, 149 _MM_PERM_DDCB = 0xF9, _MM_PERM_DDCC = 0xFA, _MM_PERM_DDCD = 0xFB, 150 _MM_PERM_DDDA = 0xFC, _MM_PERM_DDDB = 0xFD, _MM_PERM_DDDC = 0xFE, 151 _MM_PERM_DDDD = 0xFF 152 } _MM_PERM_ENUM; 153 154 typedef enum 155 { 156 _MM_MANT_NORM_1_2, /* interval [1, 2) */ 157 _MM_MANT_NORM_p5_2, /* interval [0.5, 2) */ 158 _MM_MANT_NORM_p5_1, /* interval [0.5, 1) */ 159 _MM_MANT_NORM_p75_1p5 /* interval [0.75, 1.5) */ 160 } _MM_MANTISSA_NORM_ENUM; 161 162 typedef enum 163 { 164 _MM_MANT_SIGN_src, /* sign = sign(SRC) */ 165 _MM_MANT_SIGN_zero, /* sign = 0 */ 166 _MM_MANT_SIGN_nan /* DEST = NaN if sign(SRC) = 1 */ 167 } _MM_MANTISSA_SIGN_ENUM; 168 169 /* Define the default attributes for the functions in this file. */ 170 #define __DEFAULT_FN_ATTRS512 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), __min_vector_width__(512))) 171 #define __DEFAULT_FN_ATTRS128 __attribute__((__always_inline__, __nodebug__, __target__("avx512f"), __min_vector_width__(128))) 172 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512f"))) 173 174 /* Create vectors with repeated elements */ 175 176 static __inline __m512i __DEFAULT_FN_ATTRS512 177 _mm512_setzero_si512(void) 178 { 179 return __extension__ (__m512i)(__v8di){ 0, 0, 0, 0, 0, 0, 0, 0 }; 180 } 181 182 #define _mm512_setzero_epi32 _mm512_setzero_si512 183 184 static __inline__ __m512d __DEFAULT_FN_ATTRS512 185 _mm512_undefined_pd(void) 186 { 187 return (__m512d)__builtin_ia32_undef512(); 188 } 189 190 static __inline__ __m512 __DEFAULT_FN_ATTRS512 191 _mm512_undefined(void) 192 { 193 return (__m512)__builtin_ia32_undef512(); 194 } 195 196 static __inline__ __m512 __DEFAULT_FN_ATTRS512 197 _mm512_undefined_ps(void) 198 { 199 return (__m512)__builtin_ia32_undef512(); 200 } 201 202 static __inline__ __m512i __DEFAULT_FN_ATTRS512 203 _mm512_undefined_epi32(void) 204 { 205 return (__m512i)__builtin_ia32_undef512(); 206 } 207 208 static __inline__ __m512i __DEFAULT_FN_ATTRS512 209 _mm512_broadcastd_epi32 (__m128i __A) 210 { 211 return (__m512i)__builtin_shufflevector((__v4si) __A, (__v4si) __A, 212 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); 213 } 214 215 static __inline__ __m512i __DEFAULT_FN_ATTRS512 216 _mm512_mask_broadcastd_epi32 (__m512i __O, __mmask16 __M, __m128i __A) 217 { 218 return (__m512i)__builtin_ia32_selectd_512(__M, 219 (__v16si) _mm512_broadcastd_epi32(__A), 220 (__v16si) __O); 221 } 222 223 static __inline__ __m512i __DEFAULT_FN_ATTRS512 224 _mm512_maskz_broadcastd_epi32 (__mmask16 __M, __m128i __A) 225 { 226 return (__m512i)__builtin_ia32_selectd_512(__M, 227 (__v16si) _mm512_broadcastd_epi32(__A), 228 (__v16si) _mm512_setzero_si512()); 229 } 230 231 static __inline__ __m512i __DEFAULT_FN_ATTRS512 232 _mm512_broadcastq_epi64 (__m128i __A) 233 { 234 return (__m512i)__builtin_shufflevector((__v2di) __A, (__v2di) __A, 235 0, 0, 0, 0, 0, 0, 0, 0); 236 } 237 238 static __inline__ __m512i __DEFAULT_FN_ATTRS512 239 _mm512_mask_broadcastq_epi64 (__m512i __O, __mmask8 __M, __m128i __A) 240 { 241 return (__m512i)__builtin_ia32_selectq_512(__M, 242 (__v8di) _mm512_broadcastq_epi64(__A), 243 (__v8di) __O); 244 245 } 246 247 static __inline__ __m512i __DEFAULT_FN_ATTRS512 248 _mm512_maskz_broadcastq_epi64 (__mmask8 __M, __m128i __A) 249 { 250 return (__m512i)__builtin_ia32_selectq_512(__M, 251 (__v8di) _mm512_broadcastq_epi64(__A), 252 (__v8di) _mm512_setzero_si512()); 253 } 254 255 256 static __inline __m512 __DEFAULT_FN_ATTRS512 257 _mm512_setzero_ps(void) 258 { 259 return __extension__ (__m512){ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 260 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 }; 261 } 262 263 #define _mm512_setzero _mm512_setzero_ps 264 265 static __inline __m512d __DEFAULT_FN_ATTRS512 266 _mm512_setzero_pd(void) 267 { 268 return __extension__ (__m512d){ 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 }; 269 } 270 271 static __inline __m512 __DEFAULT_FN_ATTRS512 272 _mm512_set1_ps(float __w) 273 { 274 return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w, 275 __w, __w, __w, __w, __w, __w, __w, __w }; 276 } 277 278 static __inline __m512d __DEFAULT_FN_ATTRS512 279 _mm512_set1_pd(double __w) 280 { 281 return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w }; 282 } 283 284 static __inline __m512i __DEFAULT_FN_ATTRS512 285 _mm512_set1_epi8(char __w) 286 { 287 return __extension__ (__m512i)(__v64qi){ 288 __w, __w, __w, __w, __w, __w, __w, __w, 289 __w, __w, __w, __w, __w, __w, __w, __w, 290 __w, __w, __w, __w, __w, __w, __w, __w, 291 __w, __w, __w, __w, __w, __w, __w, __w, 292 __w, __w, __w, __w, __w, __w, __w, __w, 293 __w, __w, __w, __w, __w, __w, __w, __w, 294 __w, __w, __w, __w, __w, __w, __w, __w, 295 __w, __w, __w, __w, __w, __w, __w, __w }; 296 } 297 298 static __inline __m512i __DEFAULT_FN_ATTRS512 299 _mm512_set1_epi16(short __w) 300 { 301 return __extension__ (__m512i)(__v32hi){ 302 __w, __w, __w, __w, __w, __w, __w, __w, 303 __w, __w, __w, __w, __w, __w, __w, __w, 304 __w, __w, __w, __w, __w, __w, __w, __w, 305 __w, __w, __w, __w, __w, __w, __w, __w }; 306 } 307 308 static __inline __m512i __DEFAULT_FN_ATTRS512 309 _mm512_set1_epi32(int __s) 310 { 311 return __extension__ (__m512i)(__v16si){ 312 __s, __s, __s, __s, __s, __s, __s, __s, 313 __s, __s, __s, __s, __s, __s, __s, __s }; 314 } 315 316 static __inline __m512i __DEFAULT_FN_ATTRS512 317 _mm512_maskz_set1_epi32(__mmask16 __M, int __A) 318 { 319 return (__m512i)__builtin_ia32_selectd_512(__M, 320 (__v16si)_mm512_set1_epi32(__A), 321 (__v16si)_mm512_setzero_si512()); 322 } 323 324 static __inline __m512i __DEFAULT_FN_ATTRS512 325 _mm512_set1_epi64(long long __d) 326 { 327 return __extension__(__m512i)(__v8di){ __d, __d, __d, __d, __d, __d, __d, __d }; 328 } 329 330 static __inline __m512i __DEFAULT_FN_ATTRS512 331 _mm512_maskz_set1_epi64(__mmask8 __M, long long __A) 332 { 333 return (__m512i)__builtin_ia32_selectq_512(__M, 334 (__v8di)_mm512_set1_epi64(__A), 335 (__v8di)_mm512_setzero_si512()); 336 } 337 338 static __inline__ __m512 __DEFAULT_FN_ATTRS512 339 _mm512_broadcastss_ps(__m128 __A) 340 { 341 return (__m512)__builtin_shufflevector((__v4sf) __A, (__v4sf) __A, 342 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0); 343 } 344 345 static __inline __m512i __DEFAULT_FN_ATTRS512 346 _mm512_set4_epi32 (int __A, int __B, int __C, int __D) 347 { 348 return __extension__ (__m512i)(__v16si) 349 { __D, __C, __B, __A, __D, __C, __B, __A, 350 __D, __C, __B, __A, __D, __C, __B, __A }; 351 } 352 353 static __inline __m512i __DEFAULT_FN_ATTRS512 354 _mm512_set4_epi64 (long long __A, long long __B, long long __C, 355 long long __D) 356 { 357 return __extension__ (__m512i) (__v8di) 358 { __D, __C, __B, __A, __D, __C, __B, __A }; 359 } 360 361 static __inline __m512d __DEFAULT_FN_ATTRS512 362 _mm512_set4_pd (double __A, double __B, double __C, double __D) 363 { 364 return __extension__ (__m512d) 365 { __D, __C, __B, __A, __D, __C, __B, __A }; 366 } 367 368 static __inline __m512 __DEFAULT_FN_ATTRS512 369 _mm512_set4_ps (float __A, float __B, float __C, float __D) 370 { 371 return __extension__ (__m512) 372 { __D, __C, __B, __A, __D, __C, __B, __A, 373 __D, __C, __B, __A, __D, __C, __B, __A }; 374 } 375 376 #define _mm512_setr4_epi32(e0,e1,e2,e3) \ 377 _mm512_set4_epi32((e3),(e2),(e1),(e0)) 378 379 #define _mm512_setr4_epi64(e0,e1,e2,e3) \ 380 _mm512_set4_epi64((e3),(e2),(e1),(e0)) 381 382 #define _mm512_setr4_pd(e0,e1,e2,e3) \ 383 _mm512_set4_pd((e3),(e2),(e1),(e0)) 384 385 #define _mm512_setr4_ps(e0,e1,e2,e3) \ 386 _mm512_set4_ps((e3),(e2),(e1),(e0)) 387 388 static __inline__ __m512d __DEFAULT_FN_ATTRS512 389 _mm512_broadcastsd_pd(__m128d __A) 390 { 391 return (__m512d)__builtin_shufflevector((__v2df) __A, (__v2df) __A, 392 0, 0, 0, 0, 0, 0, 0, 0); 393 } 394 395 /* Cast between vector types */ 396 397 static __inline __m512d __DEFAULT_FN_ATTRS512 398 _mm512_castpd256_pd512(__m256d __a) 399 { 400 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, -1, -1, -1, -1); 401 } 402 403 static __inline __m512 __DEFAULT_FN_ATTRS512 404 _mm512_castps256_ps512(__m256 __a) 405 { 406 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3, 4, 5, 6, 7, 407 -1, -1, -1, -1, -1, -1, -1, -1); 408 } 409 410 static __inline __m128d __DEFAULT_FN_ATTRS512 411 _mm512_castpd512_pd128(__m512d __a) 412 { 413 return __builtin_shufflevector(__a, __a, 0, 1); 414 } 415 416 static __inline __m256d __DEFAULT_FN_ATTRS512 417 _mm512_castpd512_pd256 (__m512d __A) 418 { 419 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3); 420 } 421 422 static __inline __m128 __DEFAULT_FN_ATTRS512 423 _mm512_castps512_ps128(__m512 __a) 424 { 425 return __builtin_shufflevector(__a, __a, 0, 1, 2, 3); 426 } 427 428 static __inline __m256 __DEFAULT_FN_ATTRS512 429 _mm512_castps512_ps256 (__m512 __A) 430 { 431 return __builtin_shufflevector(__A, __A, 0, 1, 2, 3, 4, 5, 6, 7); 432 } 433 434 static __inline __m512 __DEFAULT_FN_ATTRS512 435 _mm512_castpd_ps (__m512d __A) 436 { 437 return (__m512) (__A); 438 } 439 440 static __inline __m512i __DEFAULT_FN_ATTRS512 441 _mm512_castpd_si512 (__m512d __A) 442 { 443 return (__m512i) (__A); 444 } 445 446 static __inline__ __m512d __DEFAULT_FN_ATTRS512 447 _mm512_castpd128_pd512 (__m128d __A) 448 { 449 return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1); 450 } 451 452 static __inline __m512d __DEFAULT_FN_ATTRS512 453 _mm512_castps_pd (__m512 __A) 454 { 455 return (__m512d) (__A); 456 } 457 458 static __inline __m512i __DEFAULT_FN_ATTRS512 459 _mm512_castps_si512 (__m512 __A) 460 { 461 return (__m512i) (__A); 462 } 463 464 static __inline__ __m512 __DEFAULT_FN_ATTRS512 465 _mm512_castps128_ps512 (__m128 __A) 466 { 467 return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1); 468 } 469 470 static __inline__ __m512i __DEFAULT_FN_ATTRS512 471 _mm512_castsi128_si512 (__m128i __A) 472 { 473 return __builtin_shufflevector( __A, __A, 0, 1, -1, -1, -1, -1, -1, -1); 474 } 475 476 static __inline__ __m512i __DEFAULT_FN_ATTRS512 477 _mm512_castsi256_si512 (__m256i __A) 478 { 479 return __builtin_shufflevector( __A, __A, 0, 1, 2, 3, -1, -1, -1, -1); 480 } 481 482 static __inline __m512 __DEFAULT_FN_ATTRS512 483 _mm512_castsi512_ps (__m512i __A) 484 { 485 return (__m512) (__A); 486 } 487 488 static __inline __m512d __DEFAULT_FN_ATTRS512 489 _mm512_castsi512_pd (__m512i __A) 490 { 491 return (__m512d) (__A); 492 } 493 494 static __inline __m128i __DEFAULT_FN_ATTRS512 495 _mm512_castsi512_si128 (__m512i __A) 496 { 497 return (__m128i)__builtin_shufflevector(__A, __A , 0, 1); 498 } 499 500 static __inline __m256i __DEFAULT_FN_ATTRS512 501 _mm512_castsi512_si256 (__m512i __A) 502 { 503 return (__m256i)__builtin_shufflevector(__A, __A , 0, 1, 2, 3); 504 } 505 506 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 507 _mm512_int2mask(int __a) 508 { 509 return (__mmask16)__a; 510 } 511 512 static __inline__ int __DEFAULT_FN_ATTRS 513 _mm512_mask2int(__mmask16 __a) 514 { 515 return (int)__a; 516 } 517 518 /// Constructs a 512-bit floating-point vector of [8 x double] from a 519 /// 128-bit floating-point vector of [2 x double]. The lower 128 bits 520 /// contain the value of the source vector. The upper 384 bits are set 521 /// to zero. 522 /// 523 /// \headerfile <x86intrin.h> 524 /// 525 /// This intrinsic has no corresponding instruction. 526 /// 527 /// \param __a 528 /// A 128-bit vector of [2 x double]. 529 /// \returns A 512-bit floating-point vector of [8 x double]. The lower 128 bits 530 /// contain the value of the parameter. The upper 384 bits are set to zero. 531 static __inline __m512d __DEFAULT_FN_ATTRS512 532 _mm512_zextpd128_pd512(__m128d __a) 533 { 534 return __builtin_shufflevector((__v2df)__a, (__v2df)_mm_setzero_pd(), 0, 1, 2, 3, 2, 3, 2, 3); 535 } 536 537 /// Constructs a 512-bit floating-point vector of [8 x double] from a 538 /// 256-bit floating-point vector of [4 x double]. The lower 256 bits 539 /// contain the value of the source vector. The upper 256 bits are set 540 /// to zero. 541 /// 542 /// \headerfile <x86intrin.h> 543 /// 544 /// This intrinsic has no corresponding instruction. 545 /// 546 /// \param __a 547 /// A 256-bit vector of [4 x double]. 548 /// \returns A 512-bit floating-point vector of [8 x double]. The lower 256 bits 549 /// contain the value of the parameter. The upper 256 bits are set to zero. 550 static __inline __m512d __DEFAULT_FN_ATTRS512 551 _mm512_zextpd256_pd512(__m256d __a) 552 { 553 return __builtin_shufflevector((__v4df)__a, (__v4df)_mm256_setzero_pd(), 0, 1, 2, 3, 4, 5, 6, 7); 554 } 555 556 /// Constructs a 512-bit floating-point vector of [16 x float] from a 557 /// 128-bit floating-point vector of [4 x float]. The lower 128 bits contain 558 /// the value of the source vector. The upper 384 bits are set to zero. 559 /// 560 /// \headerfile <x86intrin.h> 561 /// 562 /// This intrinsic has no corresponding instruction. 563 /// 564 /// \param __a 565 /// A 128-bit vector of [4 x float]. 566 /// \returns A 512-bit floating-point vector of [16 x float]. The lower 128 bits 567 /// contain the value of the parameter. The upper 384 bits are set to zero. 568 static __inline __m512 __DEFAULT_FN_ATTRS512 569 _mm512_zextps128_ps512(__m128 __a) 570 { 571 return __builtin_shufflevector((__v4sf)__a, (__v4sf)_mm_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 4, 5, 6, 7, 4, 5, 6, 7); 572 } 573 574 /// Constructs a 512-bit floating-point vector of [16 x float] from a 575 /// 256-bit floating-point vector of [8 x float]. The lower 256 bits contain 576 /// the value of the source vector. The upper 256 bits are set to zero. 577 /// 578 /// \headerfile <x86intrin.h> 579 /// 580 /// This intrinsic has no corresponding instruction. 581 /// 582 /// \param __a 583 /// A 256-bit vector of [8 x float]. 584 /// \returns A 512-bit floating-point vector of [16 x float]. The lower 256 bits 585 /// contain the value of the parameter. The upper 256 bits are set to zero. 586 static __inline __m512 __DEFAULT_FN_ATTRS512 587 _mm512_zextps256_ps512(__m256 __a) 588 { 589 return __builtin_shufflevector((__v8sf)__a, (__v8sf)_mm256_setzero_ps(), 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); 590 } 591 592 /// Constructs a 512-bit integer vector from a 128-bit integer vector. 593 /// The lower 128 bits contain the value of the source vector. The upper 594 /// 384 bits are set to zero. 595 /// 596 /// \headerfile <x86intrin.h> 597 /// 598 /// This intrinsic has no corresponding instruction. 599 /// 600 /// \param __a 601 /// A 128-bit integer vector. 602 /// \returns A 512-bit integer vector. The lower 128 bits contain the value of 603 /// the parameter. The upper 384 bits are set to zero. 604 static __inline __m512i __DEFAULT_FN_ATTRS512 605 _mm512_zextsi128_si512(__m128i __a) 606 { 607 return __builtin_shufflevector((__v2di)__a, (__v2di)_mm_setzero_si128(), 0, 1, 2, 3, 2, 3, 2, 3); 608 } 609 610 /// Constructs a 512-bit integer vector from a 256-bit integer vector. 611 /// The lower 256 bits contain the value of the source vector. The upper 612 /// 256 bits are set to zero. 613 /// 614 /// \headerfile <x86intrin.h> 615 /// 616 /// This intrinsic has no corresponding instruction. 617 /// 618 /// \param __a 619 /// A 256-bit integer vector. 620 /// \returns A 512-bit integer vector. The lower 256 bits contain the value of 621 /// the parameter. The upper 256 bits are set to zero. 622 static __inline __m512i __DEFAULT_FN_ATTRS512 623 _mm512_zextsi256_si512(__m256i __a) 624 { 625 return __builtin_shufflevector((__v4di)__a, (__v4di)_mm256_setzero_si256(), 0, 1, 2, 3, 4, 5, 6, 7); 626 } 627 628 /* Bitwise operators */ 629 static __inline__ __m512i __DEFAULT_FN_ATTRS512 630 _mm512_and_epi32(__m512i __a, __m512i __b) 631 { 632 return (__m512i)((__v16su)__a & (__v16su)__b); 633 } 634 635 static __inline__ __m512i __DEFAULT_FN_ATTRS512 636 _mm512_mask_and_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) 637 { 638 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k, 639 (__v16si) _mm512_and_epi32(__a, __b), 640 (__v16si) __src); 641 } 642 643 static __inline__ __m512i __DEFAULT_FN_ATTRS512 644 _mm512_maskz_and_epi32(__mmask16 __k, __m512i __a, __m512i __b) 645 { 646 return (__m512i) _mm512_mask_and_epi32(_mm512_setzero_si512 (), 647 __k, __a, __b); 648 } 649 650 static __inline__ __m512i __DEFAULT_FN_ATTRS512 651 _mm512_and_epi64(__m512i __a, __m512i __b) 652 { 653 return (__m512i)((__v8du)__a & (__v8du)__b); 654 } 655 656 static __inline__ __m512i __DEFAULT_FN_ATTRS512 657 _mm512_mask_and_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) 658 { 659 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __k, 660 (__v8di) _mm512_and_epi64(__a, __b), 661 (__v8di) __src); 662 } 663 664 static __inline__ __m512i __DEFAULT_FN_ATTRS512 665 _mm512_maskz_and_epi64(__mmask8 __k, __m512i __a, __m512i __b) 666 { 667 return (__m512i) _mm512_mask_and_epi64(_mm512_setzero_si512 (), 668 __k, __a, __b); 669 } 670 671 static __inline__ __m512i __DEFAULT_FN_ATTRS512 672 _mm512_andnot_si512 (__m512i __A, __m512i __B) 673 { 674 return (__m512i)(~(__v8du)__A & (__v8du)__B); 675 } 676 677 static __inline__ __m512i __DEFAULT_FN_ATTRS512 678 _mm512_andnot_epi32 (__m512i __A, __m512i __B) 679 { 680 return (__m512i)(~(__v16su)__A & (__v16su)__B); 681 } 682 683 static __inline__ __m512i __DEFAULT_FN_ATTRS512 684 _mm512_mask_andnot_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 685 { 686 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 687 (__v16si)_mm512_andnot_epi32(__A, __B), 688 (__v16si)__W); 689 } 690 691 static __inline__ __m512i __DEFAULT_FN_ATTRS512 692 _mm512_maskz_andnot_epi32(__mmask16 __U, __m512i __A, __m512i __B) 693 { 694 return (__m512i)_mm512_mask_andnot_epi32(_mm512_setzero_si512(), 695 __U, __A, __B); 696 } 697 698 static __inline__ __m512i __DEFAULT_FN_ATTRS512 699 _mm512_andnot_epi64(__m512i __A, __m512i __B) 700 { 701 return (__m512i)(~(__v8du)__A & (__v8du)__B); 702 } 703 704 static __inline__ __m512i __DEFAULT_FN_ATTRS512 705 _mm512_mask_andnot_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 706 { 707 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 708 (__v8di)_mm512_andnot_epi64(__A, __B), 709 (__v8di)__W); 710 } 711 712 static __inline__ __m512i __DEFAULT_FN_ATTRS512 713 _mm512_maskz_andnot_epi64(__mmask8 __U, __m512i __A, __m512i __B) 714 { 715 return (__m512i)_mm512_mask_andnot_epi64(_mm512_setzero_si512(), 716 __U, __A, __B); 717 } 718 719 static __inline__ __m512i __DEFAULT_FN_ATTRS512 720 _mm512_or_epi32(__m512i __a, __m512i __b) 721 { 722 return (__m512i)((__v16su)__a | (__v16su)__b); 723 } 724 725 static __inline__ __m512i __DEFAULT_FN_ATTRS512 726 _mm512_mask_or_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) 727 { 728 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k, 729 (__v16si)_mm512_or_epi32(__a, __b), 730 (__v16si)__src); 731 } 732 733 static __inline__ __m512i __DEFAULT_FN_ATTRS512 734 _mm512_maskz_or_epi32(__mmask16 __k, __m512i __a, __m512i __b) 735 { 736 return (__m512i)_mm512_mask_or_epi32(_mm512_setzero_si512(), __k, __a, __b); 737 } 738 739 static __inline__ __m512i __DEFAULT_FN_ATTRS512 740 _mm512_or_epi64(__m512i __a, __m512i __b) 741 { 742 return (__m512i)((__v8du)__a | (__v8du)__b); 743 } 744 745 static __inline__ __m512i __DEFAULT_FN_ATTRS512 746 _mm512_mask_or_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) 747 { 748 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__k, 749 (__v8di)_mm512_or_epi64(__a, __b), 750 (__v8di)__src); 751 } 752 753 static __inline__ __m512i __DEFAULT_FN_ATTRS512 754 _mm512_maskz_or_epi64(__mmask8 __k, __m512i __a, __m512i __b) 755 { 756 return (__m512i)_mm512_mask_or_epi64(_mm512_setzero_si512(), __k, __a, __b); 757 } 758 759 static __inline__ __m512i __DEFAULT_FN_ATTRS512 760 _mm512_xor_epi32(__m512i __a, __m512i __b) 761 { 762 return (__m512i)((__v16su)__a ^ (__v16su)__b); 763 } 764 765 static __inline__ __m512i __DEFAULT_FN_ATTRS512 766 _mm512_mask_xor_epi32(__m512i __src, __mmask16 __k, __m512i __a, __m512i __b) 767 { 768 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__k, 769 (__v16si)_mm512_xor_epi32(__a, __b), 770 (__v16si)__src); 771 } 772 773 static __inline__ __m512i __DEFAULT_FN_ATTRS512 774 _mm512_maskz_xor_epi32(__mmask16 __k, __m512i __a, __m512i __b) 775 { 776 return (__m512i)_mm512_mask_xor_epi32(_mm512_setzero_si512(), __k, __a, __b); 777 } 778 779 static __inline__ __m512i __DEFAULT_FN_ATTRS512 780 _mm512_xor_epi64(__m512i __a, __m512i __b) 781 { 782 return (__m512i)((__v8du)__a ^ (__v8du)__b); 783 } 784 785 static __inline__ __m512i __DEFAULT_FN_ATTRS512 786 _mm512_mask_xor_epi64(__m512i __src, __mmask8 __k, __m512i __a, __m512i __b) 787 { 788 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__k, 789 (__v8di)_mm512_xor_epi64(__a, __b), 790 (__v8di)__src); 791 } 792 793 static __inline__ __m512i __DEFAULT_FN_ATTRS512 794 _mm512_maskz_xor_epi64(__mmask8 __k, __m512i __a, __m512i __b) 795 { 796 return (__m512i)_mm512_mask_xor_epi64(_mm512_setzero_si512(), __k, __a, __b); 797 } 798 799 static __inline__ __m512i __DEFAULT_FN_ATTRS512 800 _mm512_and_si512(__m512i __a, __m512i __b) 801 { 802 return (__m512i)((__v8du)__a & (__v8du)__b); 803 } 804 805 static __inline__ __m512i __DEFAULT_FN_ATTRS512 806 _mm512_or_si512(__m512i __a, __m512i __b) 807 { 808 return (__m512i)((__v8du)__a | (__v8du)__b); 809 } 810 811 static __inline__ __m512i __DEFAULT_FN_ATTRS512 812 _mm512_xor_si512(__m512i __a, __m512i __b) 813 { 814 return (__m512i)((__v8du)__a ^ (__v8du)__b); 815 } 816 817 /* Arithmetic */ 818 819 static __inline __m512d __DEFAULT_FN_ATTRS512 820 _mm512_add_pd(__m512d __a, __m512d __b) 821 { 822 return (__m512d)((__v8df)__a + (__v8df)__b); 823 } 824 825 static __inline __m512 __DEFAULT_FN_ATTRS512 826 _mm512_add_ps(__m512 __a, __m512 __b) 827 { 828 return (__m512)((__v16sf)__a + (__v16sf)__b); 829 } 830 831 static __inline __m512d __DEFAULT_FN_ATTRS512 832 _mm512_mul_pd(__m512d __a, __m512d __b) 833 { 834 return (__m512d)((__v8df)__a * (__v8df)__b); 835 } 836 837 static __inline __m512 __DEFAULT_FN_ATTRS512 838 _mm512_mul_ps(__m512 __a, __m512 __b) 839 { 840 return (__m512)((__v16sf)__a * (__v16sf)__b); 841 } 842 843 static __inline __m512d __DEFAULT_FN_ATTRS512 844 _mm512_sub_pd(__m512d __a, __m512d __b) 845 { 846 return (__m512d)((__v8df)__a - (__v8df)__b); 847 } 848 849 static __inline __m512 __DEFAULT_FN_ATTRS512 850 _mm512_sub_ps(__m512 __a, __m512 __b) 851 { 852 return (__m512)((__v16sf)__a - (__v16sf)__b); 853 } 854 855 static __inline__ __m512i __DEFAULT_FN_ATTRS512 856 _mm512_add_epi64 (__m512i __A, __m512i __B) 857 { 858 return (__m512i) ((__v8du) __A + (__v8du) __B); 859 } 860 861 static __inline__ __m512i __DEFAULT_FN_ATTRS512 862 _mm512_mask_add_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 863 { 864 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 865 (__v8di)_mm512_add_epi64(__A, __B), 866 (__v8di)__W); 867 } 868 869 static __inline__ __m512i __DEFAULT_FN_ATTRS512 870 _mm512_maskz_add_epi64(__mmask8 __U, __m512i __A, __m512i __B) 871 { 872 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 873 (__v8di)_mm512_add_epi64(__A, __B), 874 (__v8di)_mm512_setzero_si512()); 875 } 876 877 static __inline__ __m512i __DEFAULT_FN_ATTRS512 878 _mm512_sub_epi64 (__m512i __A, __m512i __B) 879 { 880 return (__m512i) ((__v8du) __A - (__v8du) __B); 881 } 882 883 static __inline__ __m512i __DEFAULT_FN_ATTRS512 884 _mm512_mask_sub_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 885 { 886 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 887 (__v8di)_mm512_sub_epi64(__A, __B), 888 (__v8di)__W); 889 } 890 891 static __inline__ __m512i __DEFAULT_FN_ATTRS512 892 _mm512_maskz_sub_epi64(__mmask8 __U, __m512i __A, __m512i __B) 893 { 894 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 895 (__v8di)_mm512_sub_epi64(__A, __B), 896 (__v8di)_mm512_setzero_si512()); 897 } 898 899 static __inline__ __m512i __DEFAULT_FN_ATTRS512 900 _mm512_add_epi32 (__m512i __A, __m512i __B) 901 { 902 return (__m512i) ((__v16su) __A + (__v16su) __B); 903 } 904 905 static __inline__ __m512i __DEFAULT_FN_ATTRS512 906 _mm512_mask_add_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 907 { 908 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 909 (__v16si)_mm512_add_epi32(__A, __B), 910 (__v16si)__W); 911 } 912 913 static __inline__ __m512i __DEFAULT_FN_ATTRS512 914 _mm512_maskz_add_epi32 (__mmask16 __U, __m512i __A, __m512i __B) 915 { 916 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 917 (__v16si)_mm512_add_epi32(__A, __B), 918 (__v16si)_mm512_setzero_si512()); 919 } 920 921 static __inline__ __m512i __DEFAULT_FN_ATTRS512 922 _mm512_sub_epi32 (__m512i __A, __m512i __B) 923 { 924 return (__m512i) ((__v16su) __A - (__v16su) __B); 925 } 926 927 static __inline__ __m512i __DEFAULT_FN_ATTRS512 928 _mm512_mask_sub_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 929 { 930 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 931 (__v16si)_mm512_sub_epi32(__A, __B), 932 (__v16si)__W); 933 } 934 935 static __inline__ __m512i __DEFAULT_FN_ATTRS512 936 _mm512_maskz_sub_epi32(__mmask16 __U, __m512i __A, __m512i __B) 937 { 938 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 939 (__v16si)_mm512_sub_epi32(__A, __B), 940 (__v16si)_mm512_setzero_si512()); 941 } 942 943 #define _mm512_max_round_pd(A, B, R) \ 944 ((__m512d)__builtin_ia32_maxpd512((__v8df)(__m512d)(A), \ 945 (__v8df)(__m512d)(B), (int)(R))) 946 947 #define _mm512_mask_max_round_pd(W, U, A, B, R) \ 948 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 949 (__v8df)_mm512_max_round_pd((A), (B), (R)), \ 950 (__v8df)(W))) 951 952 #define _mm512_maskz_max_round_pd(U, A, B, R) \ 953 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 954 (__v8df)_mm512_max_round_pd((A), (B), (R)), \ 955 (__v8df)_mm512_setzero_pd())) 956 957 static __inline__ __m512d __DEFAULT_FN_ATTRS512 958 _mm512_max_pd(__m512d __A, __m512d __B) 959 { 960 return (__m512d) __builtin_ia32_maxpd512((__v8df) __A, (__v8df) __B, 961 _MM_FROUND_CUR_DIRECTION); 962 } 963 964 static __inline__ __m512d __DEFAULT_FN_ATTRS512 965 _mm512_mask_max_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) 966 { 967 return (__m512d)__builtin_ia32_selectpd_512(__U, 968 (__v8df)_mm512_max_pd(__A, __B), 969 (__v8df)__W); 970 } 971 972 static __inline__ __m512d __DEFAULT_FN_ATTRS512 973 _mm512_maskz_max_pd (__mmask8 __U, __m512d __A, __m512d __B) 974 { 975 return (__m512d)__builtin_ia32_selectpd_512(__U, 976 (__v8df)_mm512_max_pd(__A, __B), 977 (__v8df)_mm512_setzero_pd()); 978 } 979 980 #define _mm512_max_round_ps(A, B, R) \ 981 ((__m512)__builtin_ia32_maxps512((__v16sf)(__m512)(A), \ 982 (__v16sf)(__m512)(B), (int)(R))) 983 984 #define _mm512_mask_max_round_ps(W, U, A, B, R) \ 985 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 986 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \ 987 (__v16sf)(W))) 988 989 #define _mm512_maskz_max_round_ps(U, A, B, R) \ 990 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 991 (__v16sf)_mm512_max_round_ps((A), (B), (R)), \ 992 (__v16sf)_mm512_setzero_ps())) 993 994 static __inline__ __m512 __DEFAULT_FN_ATTRS512 995 _mm512_max_ps(__m512 __A, __m512 __B) 996 { 997 return (__m512) __builtin_ia32_maxps512((__v16sf) __A, (__v16sf) __B, 998 _MM_FROUND_CUR_DIRECTION); 999 } 1000 1001 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1002 _mm512_mask_max_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) 1003 { 1004 return (__m512)__builtin_ia32_selectps_512(__U, 1005 (__v16sf)_mm512_max_ps(__A, __B), 1006 (__v16sf)__W); 1007 } 1008 1009 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1010 _mm512_maskz_max_ps (__mmask16 __U, __m512 __A, __m512 __B) 1011 { 1012 return (__m512)__builtin_ia32_selectps_512(__U, 1013 (__v16sf)_mm512_max_ps(__A, __B), 1014 (__v16sf)_mm512_setzero_ps()); 1015 } 1016 1017 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1018 _mm_mask_max_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 1019 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, 1020 (__v4sf) __B, 1021 (__v4sf) __W, 1022 (__mmask8) __U, 1023 _MM_FROUND_CUR_DIRECTION); 1024 } 1025 1026 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1027 _mm_maskz_max_ss(__mmask8 __U,__m128 __A, __m128 __B) { 1028 return (__m128) __builtin_ia32_maxss_round_mask ((__v4sf) __A, 1029 (__v4sf) __B, 1030 (__v4sf) _mm_setzero_ps (), 1031 (__mmask8) __U, 1032 _MM_FROUND_CUR_DIRECTION); 1033 } 1034 1035 #define _mm_max_round_ss(A, B, R) \ 1036 ((__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \ 1037 (__v4sf)(__m128)(B), \ 1038 (__v4sf)_mm_setzero_ps(), \ 1039 (__mmask8)-1, (int)(R))) 1040 1041 #define _mm_mask_max_round_ss(W, U, A, B, R) \ 1042 ((__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \ 1043 (__v4sf)(__m128)(B), \ 1044 (__v4sf)(__m128)(W), (__mmask8)(U), \ 1045 (int)(R))) 1046 1047 #define _mm_maskz_max_round_ss(U, A, B, R) \ 1048 ((__m128)__builtin_ia32_maxss_round_mask((__v4sf)(__m128)(A), \ 1049 (__v4sf)(__m128)(B), \ 1050 (__v4sf)_mm_setzero_ps(), \ 1051 (__mmask8)(U), (int)(R))) 1052 1053 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1054 _mm_mask_max_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 1055 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, 1056 (__v2df) __B, 1057 (__v2df) __W, 1058 (__mmask8) __U, 1059 _MM_FROUND_CUR_DIRECTION); 1060 } 1061 1062 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1063 _mm_maskz_max_sd(__mmask8 __U,__m128d __A, __m128d __B) { 1064 return (__m128d) __builtin_ia32_maxsd_round_mask ((__v2df) __A, 1065 (__v2df) __B, 1066 (__v2df) _mm_setzero_pd (), 1067 (__mmask8) __U, 1068 _MM_FROUND_CUR_DIRECTION); 1069 } 1070 1071 #define _mm_max_round_sd(A, B, R) \ 1072 ((__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \ 1073 (__v2df)(__m128d)(B), \ 1074 (__v2df)_mm_setzero_pd(), \ 1075 (__mmask8)-1, (int)(R))) 1076 1077 #define _mm_mask_max_round_sd(W, U, A, B, R) \ 1078 ((__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \ 1079 (__v2df)(__m128d)(B), \ 1080 (__v2df)(__m128d)(W), \ 1081 (__mmask8)(U), (int)(R))) 1082 1083 #define _mm_maskz_max_round_sd(U, A, B, R) \ 1084 ((__m128d)__builtin_ia32_maxsd_round_mask((__v2df)(__m128d)(A), \ 1085 (__v2df)(__m128d)(B), \ 1086 (__v2df)_mm_setzero_pd(), \ 1087 (__mmask8)(U), (int)(R))) 1088 1089 static __inline __m512i 1090 __DEFAULT_FN_ATTRS512 1091 _mm512_max_epi32(__m512i __A, __m512i __B) 1092 { 1093 return (__m512i)__builtin_elementwise_max((__v16si)__A, (__v16si)__B); 1094 } 1095 1096 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1097 _mm512_mask_max_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) 1098 { 1099 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1100 (__v16si)_mm512_max_epi32(__A, __B), 1101 (__v16si)__W); 1102 } 1103 1104 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1105 _mm512_maskz_max_epi32 (__mmask16 __M, __m512i __A, __m512i __B) 1106 { 1107 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1108 (__v16si)_mm512_max_epi32(__A, __B), 1109 (__v16si)_mm512_setzero_si512()); 1110 } 1111 1112 static __inline __m512i __DEFAULT_FN_ATTRS512 1113 _mm512_max_epu32(__m512i __A, __m512i __B) 1114 { 1115 return (__m512i)__builtin_elementwise_max((__v16su)__A, (__v16su)__B); 1116 } 1117 1118 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1119 _mm512_mask_max_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) 1120 { 1121 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1122 (__v16si)_mm512_max_epu32(__A, __B), 1123 (__v16si)__W); 1124 } 1125 1126 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1127 _mm512_maskz_max_epu32 (__mmask16 __M, __m512i __A, __m512i __B) 1128 { 1129 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1130 (__v16si)_mm512_max_epu32(__A, __B), 1131 (__v16si)_mm512_setzero_si512()); 1132 } 1133 1134 static __inline __m512i __DEFAULT_FN_ATTRS512 1135 _mm512_max_epi64(__m512i __A, __m512i __B) 1136 { 1137 return (__m512i)__builtin_elementwise_max((__v8di)__A, (__v8di)__B); 1138 } 1139 1140 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1141 _mm512_mask_max_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) 1142 { 1143 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1144 (__v8di)_mm512_max_epi64(__A, __B), 1145 (__v8di)__W); 1146 } 1147 1148 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1149 _mm512_maskz_max_epi64 (__mmask8 __M, __m512i __A, __m512i __B) 1150 { 1151 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1152 (__v8di)_mm512_max_epi64(__A, __B), 1153 (__v8di)_mm512_setzero_si512()); 1154 } 1155 1156 static __inline __m512i __DEFAULT_FN_ATTRS512 1157 _mm512_max_epu64(__m512i __A, __m512i __B) 1158 { 1159 return (__m512i)__builtin_elementwise_max((__v8du)__A, (__v8du)__B); 1160 } 1161 1162 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1163 _mm512_mask_max_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) 1164 { 1165 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1166 (__v8di)_mm512_max_epu64(__A, __B), 1167 (__v8di)__W); 1168 } 1169 1170 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1171 _mm512_maskz_max_epu64 (__mmask8 __M, __m512i __A, __m512i __B) 1172 { 1173 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1174 (__v8di)_mm512_max_epu64(__A, __B), 1175 (__v8di)_mm512_setzero_si512()); 1176 } 1177 1178 #define _mm512_min_round_pd(A, B, R) \ 1179 ((__m512d)__builtin_ia32_minpd512((__v8df)(__m512d)(A), \ 1180 (__v8df)(__m512d)(B), (int)(R))) 1181 1182 #define _mm512_mask_min_round_pd(W, U, A, B, R) \ 1183 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1184 (__v8df)_mm512_min_round_pd((A), (B), (R)), \ 1185 (__v8df)(W))) 1186 1187 #define _mm512_maskz_min_round_pd(U, A, B, R) \ 1188 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1189 (__v8df)_mm512_min_round_pd((A), (B), (R)), \ 1190 (__v8df)_mm512_setzero_pd())) 1191 1192 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1193 _mm512_min_pd(__m512d __A, __m512d __B) 1194 { 1195 return (__m512d) __builtin_ia32_minpd512((__v8df) __A, (__v8df) __B, 1196 _MM_FROUND_CUR_DIRECTION); 1197 } 1198 1199 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1200 _mm512_mask_min_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) 1201 { 1202 return (__m512d)__builtin_ia32_selectpd_512(__U, 1203 (__v8df)_mm512_min_pd(__A, __B), 1204 (__v8df)__W); 1205 } 1206 1207 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1208 _mm512_maskz_min_pd (__mmask8 __U, __m512d __A, __m512d __B) 1209 { 1210 return (__m512d)__builtin_ia32_selectpd_512(__U, 1211 (__v8df)_mm512_min_pd(__A, __B), 1212 (__v8df)_mm512_setzero_pd()); 1213 } 1214 1215 #define _mm512_min_round_ps(A, B, R) \ 1216 ((__m512)__builtin_ia32_minps512((__v16sf)(__m512)(A), \ 1217 (__v16sf)(__m512)(B), (int)(R))) 1218 1219 #define _mm512_mask_min_round_ps(W, U, A, B, R) \ 1220 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 1221 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \ 1222 (__v16sf)(W))) 1223 1224 #define _mm512_maskz_min_round_ps(U, A, B, R) \ 1225 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 1226 (__v16sf)_mm512_min_round_ps((A), (B), (R)), \ 1227 (__v16sf)_mm512_setzero_ps())) 1228 1229 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1230 _mm512_min_ps(__m512 __A, __m512 __B) 1231 { 1232 return (__m512) __builtin_ia32_minps512((__v16sf) __A, (__v16sf) __B, 1233 _MM_FROUND_CUR_DIRECTION); 1234 } 1235 1236 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1237 _mm512_mask_min_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) 1238 { 1239 return (__m512)__builtin_ia32_selectps_512(__U, 1240 (__v16sf)_mm512_min_ps(__A, __B), 1241 (__v16sf)__W); 1242 } 1243 1244 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1245 _mm512_maskz_min_ps (__mmask16 __U, __m512 __A, __m512 __B) 1246 { 1247 return (__m512)__builtin_ia32_selectps_512(__U, 1248 (__v16sf)_mm512_min_ps(__A, __B), 1249 (__v16sf)_mm512_setzero_ps()); 1250 } 1251 1252 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1253 _mm_mask_min_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 1254 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, 1255 (__v4sf) __B, 1256 (__v4sf) __W, 1257 (__mmask8) __U, 1258 _MM_FROUND_CUR_DIRECTION); 1259 } 1260 1261 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1262 _mm_maskz_min_ss(__mmask8 __U,__m128 __A, __m128 __B) { 1263 return (__m128) __builtin_ia32_minss_round_mask ((__v4sf) __A, 1264 (__v4sf) __B, 1265 (__v4sf) _mm_setzero_ps (), 1266 (__mmask8) __U, 1267 _MM_FROUND_CUR_DIRECTION); 1268 } 1269 1270 #define _mm_min_round_ss(A, B, R) \ 1271 ((__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \ 1272 (__v4sf)(__m128)(B), \ 1273 (__v4sf)_mm_setzero_ps(), \ 1274 (__mmask8)-1, (int)(R))) 1275 1276 #define _mm_mask_min_round_ss(W, U, A, B, R) \ 1277 ((__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \ 1278 (__v4sf)(__m128)(B), \ 1279 (__v4sf)(__m128)(W), (__mmask8)(U), \ 1280 (int)(R))) 1281 1282 #define _mm_maskz_min_round_ss(U, A, B, R) \ 1283 ((__m128)__builtin_ia32_minss_round_mask((__v4sf)(__m128)(A), \ 1284 (__v4sf)(__m128)(B), \ 1285 (__v4sf)_mm_setzero_ps(), \ 1286 (__mmask8)(U), (int)(R))) 1287 1288 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1289 _mm_mask_min_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 1290 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, 1291 (__v2df) __B, 1292 (__v2df) __W, 1293 (__mmask8) __U, 1294 _MM_FROUND_CUR_DIRECTION); 1295 } 1296 1297 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1298 _mm_maskz_min_sd(__mmask8 __U,__m128d __A, __m128d __B) { 1299 return (__m128d) __builtin_ia32_minsd_round_mask ((__v2df) __A, 1300 (__v2df) __B, 1301 (__v2df) _mm_setzero_pd (), 1302 (__mmask8) __U, 1303 _MM_FROUND_CUR_DIRECTION); 1304 } 1305 1306 #define _mm_min_round_sd(A, B, R) \ 1307 ((__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \ 1308 (__v2df)(__m128d)(B), \ 1309 (__v2df)_mm_setzero_pd(), \ 1310 (__mmask8)-1, (int)(R))) 1311 1312 #define _mm_mask_min_round_sd(W, U, A, B, R) \ 1313 ((__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \ 1314 (__v2df)(__m128d)(B), \ 1315 (__v2df)(__m128d)(W), \ 1316 (__mmask8)(U), (int)(R))) 1317 1318 #define _mm_maskz_min_round_sd(U, A, B, R) \ 1319 ((__m128d)__builtin_ia32_minsd_round_mask((__v2df)(__m128d)(A), \ 1320 (__v2df)(__m128d)(B), \ 1321 (__v2df)_mm_setzero_pd(), \ 1322 (__mmask8)(U), (int)(R))) 1323 1324 static __inline __m512i 1325 __DEFAULT_FN_ATTRS512 1326 _mm512_min_epi32(__m512i __A, __m512i __B) 1327 { 1328 return (__m512i)__builtin_elementwise_min((__v16si)__A, (__v16si)__B); 1329 } 1330 1331 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1332 _mm512_mask_min_epi32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) 1333 { 1334 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1335 (__v16si)_mm512_min_epi32(__A, __B), 1336 (__v16si)__W); 1337 } 1338 1339 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1340 _mm512_maskz_min_epi32 (__mmask16 __M, __m512i __A, __m512i __B) 1341 { 1342 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1343 (__v16si)_mm512_min_epi32(__A, __B), 1344 (__v16si)_mm512_setzero_si512()); 1345 } 1346 1347 static __inline __m512i __DEFAULT_FN_ATTRS512 1348 _mm512_min_epu32(__m512i __A, __m512i __B) 1349 { 1350 return (__m512i)__builtin_elementwise_min((__v16su)__A, (__v16su)__B); 1351 } 1352 1353 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1354 _mm512_mask_min_epu32 (__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) 1355 { 1356 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1357 (__v16si)_mm512_min_epu32(__A, __B), 1358 (__v16si)__W); 1359 } 1360 1361 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1362 _mm512_maskz_min_epu32 (__mmask16 __M, __m512i __A, __m512i __B) 1363 { 1364 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1365 (__v16si)_mm512_min_epu32(__A, __B), 1366 (__v16si)_mm512_setzero_si512()); 1367 } 1368 1369 static __inline __m512i __DEFAULT_FN_ATTRS512 1370 _mm512_min_epi64(__m512i __A, __m512i __B) 1371 { 1372 return (__m512i)__builtin_elementwise_min((__v8di)__A, (__v8di)__B); 1373 } 1374 1375 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1376 _mm512_mask_min_epi64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) 1377 { 1378 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1379 (__v8di)_mm512_min_epi64(__A, __B), 1380 (__v8di)__W); 1381 } 1382 1383 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1384 _mm512_maskz_min_epi64 (__mmask8 __M, __m512i __A, __m512i __B) 1385 { 1386 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1387 (__v8di)_mm512_min_epi64(__A, __B), 1388 (__v8di)_mm512_setzero_si512()); 1389 } 1390 1391 static __inline __m512i __DEFAULT_FN_ATTRS512 1392 _mm512_min_epu64(__m512i __A, __m512i __B) 1393 { 1394 return (__m512i)__builtin_elementwise_min((__v8du)__A, (__v8du)__B); 1395 } 1396 1397 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1398 _mm512_mask_min_epu64 (__m512i __W, __mmask8 __M, __m512i __A, __m512i __B) 1399 { 1400 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1401 (__v8di)_mm512_min_epu64(__A, __B), 1402 (__v8di)__W); 1403 } 1404 1405 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1406 _mm512_maskz_min_epu64 (__mmask8 __M, __m512i __A, __m512i __B) 1407 { 1408 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1409 (__v8di)_mm512_min_epu64(__A, __B), 1410 (__v8di)_mm512_setzero_si512()); 1411 } 1412 1413 static __inline __m512i __DEFAULT_FN_ATTRS512 1414 _mm512_mul_epi32(__m512i __X, __m512i __Y) 1415 { 1416 return (__m512i)__builtin_ia32_pmuldq512((__v16si)__X, (__v16si) __Y); 1417 } 1418 1419 static __inline __m512i __DEFAULT_FN_ATTRS512 1420 _mm512_mask_mul_epi32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) 1421 { 1422 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1423 (__v8di)_mm512_mul_epi32(__X, __Y), 1424 (__v8di)__W); 1425 } 1426 1427 static __inline __m512i __DEFAULT_FN_ATTRS512 1428 _mm512_maskz_mul_epi32(__mmask8 __M, __m512i __X, __m512i __Y) 1429 { 1430 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1431 (__v8di)_mm512_mul_epi32(__X, __Y), 1432 (__v8di)_mm512_setzero_si512 ()); 1433 } 1434 1435 static __inline __m512i __DEFAULT_FN_ATTRS512 1436 _mm512_mul_epu32(__m512i __X, __m512i __Y) 1437 { 1438 return (__m512i)__builtin_ia32_pmuludq512((__v16si)__X, (__v16si)__Y); 1439 } 1440 1441 static __inline __m512i __DEFAULT_FN_ATTRS512 1442 _mm512_mask_mul_epu32(__m512i __W, __mmask8 __M, __m512i __X, __m512i __Y) 1443 { 1444 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1445 (__v8di)_mm512_mul_epu32(__X, __Y), 1446 (__v8di)__W); 1447 } 1448 1449 static __inline __m512i __DEFAULT_FN_ATTRS512 1450 _mm512_maskz_mul_epu32(__mmask8 __M, __m512i __X, __m512i __Y) 1451 { 1452 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 1453 (__v8di)_mm512_mul_epu32(__X, __Y), 1454 (__v8di)_mm512_setzero_si512 ()); 1455 } 1456 1457 static __inline __m512i __DEFAULT_FN_ATTRS512 1458 _mm512_mullo_epi32 (__m512i __A, __m512i __B) 1459 { 1460 return (__m512i) ((__v16su) __A * (__v16su) __B); 1461 } 1462 1463 static __inline __m512i __DEFAULT_FN_ATTRS512 1464 _mm512_maskz_mullo_epi32(__mmask16 __M, __m512i __A, __m512i __B) 1465 { 1466 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1467 (__v16si)_mm512_mullo_epi32(__A, __B), 1468 (__v16si)_mm512_setzero_si512()); 1469 } 1470 1471 static __inline __m512i __DEFAULT_FN_ATTRS512 1472 _mm512_mask_mullo_epi32(__m512i __W, __mmask16 __M, __m512i __A, __m512i __B) 1473 { 1474 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 1475 (__v16si)_mm512_mullo_epi32(__A, __B), 1476 (__v16si)__W); 1477 } 1478 1479 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1480 _mm512_mullox_epi64 (__m512i __A, __m512i __B) { 1481 return (__m512i) ((__v8du) __A * (__v8du) __B); 1482 } 1483 1484 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1485 _mm512_mask_mullox_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) { 1486 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 1487 (__v8di)_mm512_mullox_epi64(__A, __B), 1488 (__v8di)__W); 1489 } 1490 1491 #define _mm512_sqrt_round_pd(A, R) \ 1492 ((__m512d)__builtin_ia32_sqrtpd512((__v8df)(__m512d)(A), (int)(R))) 1493 1494 #define _mm512_mask_sqrt_round_pd(W, U, A, R) \ 1495 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1496 (__v8df)_mm512_sqrt_round_pd((A), (R)), \ 1497 (__v8df)(__m512d)(W))) 1498 1499 #define _mm512_maskz_sqrt_round_pd(U, A, R) \ 1500 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1501 (__v8df)_mm512_sqrt_round_pd((A), (R)), \ 1502 (__v8df)_mm512_setzero_pd())) 1503 1504 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1505 _mm512_sqrt_pd(__m512d __A) 1506 { 1507 return (__m512d)__builtin_ia32_sqrtpd512((__v8df)__A, 1508 _MM_FROUND_CUR_DIRECTION); 1509 } 1510 1511 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1512 _mm512_mask_sqrt_pd (__m512d __W, __mmask8 __U, __m512d __A) 1513 { 1514 return (__m512d)__builtin_ia32_selectpd_512(__U, 1515 (__v8df)_mm512_sqrt_pd(__A), 1516 (__v8df)__W); 1517 } 1518 1519 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1520 _mm512_maskz_sqrt_pd (__mmask8 __U, __m512d __A) 1521 { 1522 return (__m512d)__builtin_ia32_selectpd_512(__U, 1523 (__v8df)_mm512_sqrt_pd(__A), 1524 (__v8df)_mm512_setzero_pd()); 1525 } 1526 1527 #define _mm512_sqrt_round_ps(A, R) \ 1528 ((__m512)__builtin_ia32_sqrtps512((__v16sf)(__m512)(A), (int)(R))) 1529 1530 #define _mm512_mask_sqrt_round_ps(W, U, A, R) \ 1531 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 1532 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \ 1533 (__v16sf)(__m512)(W))) 1534 1535 #define _mm512_maskz_sqrt_round_ps(U, A, R) \ 1536 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 1537 (__v16sf)_mm512_sqrt_round_ps((A), (R)), \ 1538 (__v16sf)_mm512_setzero_ps())) 1539 1540 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1541 _mm512_sqrt_ps(__m512 __A) 1542 { 1543 return (__m512)__builtin_ia32_sqrtps512((__v16sf)__A, 1544 _MM_FROUND_CUR_DIRECTION); 1545 } 1546 1547 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1548 _mm512_mask_sqrt_ps(__m512 __W, __mmask16 __U, __m512 __A) 1549 { 1550 return (__m512)__builtin_ia32_selectps_512(__U, 1551 (__v16sf)_mm512_sqrt_ps(__A), 1552 (__v16sf)__W); 1553 } 1554 1555 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1556 _mm512_maskz_sqrt_ps( __mmask16 __U, __m512 __A) 1557 { 1558 return (__m512)__builtin_ia32_selectps_512(__U, 1559 (__v16sf)_mm512_sqrt_ps(__A), 1560 (__v16sf)_mm512_setzero_ps()); 1561 } 1562 1563 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1564 _mm512_rsqrt14_pd(__m512d __A) 1565 { 1566 return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A, 1567 (__v8df) 1568 _mm512_setzero_pd (), 1569 (__mmask8) -1);} 1570 1571 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1572 _mm512_mask_rsqrt14_pd (__m512d __W, __mmask8 __U, __m512d __A) 1573 { 1574 return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A, 1575 (__v8df) __W, 1576 (__mmask8) __U); 1577 } 1578 1579 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1580 _mm512_maskz_rsqrt14_pd (__mmask8 __U, __m512d __A) 1581 { 1582 return (__m512d) __builtin_ia32_rsqrt14pd512_mask ((__v8df) __A, 1583 (__v8df) 1584 _mm512_setzero_pd (), 1585 (__mmask8) __U); 1586 } 1587 1588 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1589 _mm512_rsqrt14_ps(__m512 __A) 1590 { 1591 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A, 1592 (__v16sf) 1593 _mm512_setzero_ps (), 1594 (__mmask16) -1); 1595 } 1596 1597 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1598 _mm512_mask_rsqrt14_ps (__m512 __W, __mmask16 __U, __m512 __A) 1599 { 1600 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A, 1601 (__v16sf) __W, 1602 (__mmask16) __U); 1603 } 1604 1605 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1606 _mm512_maskz_rsqrt14_ps (__mmask16 __U, __m512 __A) 1607 { 1608 return (__m512) __builtin_ia32_rsqrt14ps512_mask ((__v16sf) __A, 1609 (__v16sf) 1610 _mm512_setzero_ps (), 1611 (__mmask16) __U); 1612 } 1613 1614 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1615 _mm_rsqrt14_ss(__m128 __A, __m128 __B) 1616 { 1617 return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A, 1618 (__v4sf) __B, 1619 (__v4sf) 1620 _mm_setzero_ps (), 1621 (__mmask8) -1); 1622 } 1623 1624 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1625 _mm_mask_rsqrt14_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 1626 { 1627 return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A, 1628 (__v4sf) __B, 1629 (__v4sf) __W, 1630 (__mmask8) __U); 1631 } 1632 1633 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1634 _mm_maskz_rsqrt14_ss (__mmask8 __U, __m128 __A, __m128 __B) 1635 { 1636 return (__m128) __builtin_ia32_rsqrt14ss_mask ((__v4sf) __A, 1637 (__v4sf) __B, 1638 (__v4sf) _mm_setzero_ps (), 1639 (__mmask8) __U); 1640 } 1641 1642 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1643 _mm_rsqrt14_sd(__m128d __A, __m128d __B) 1644 { 1645 return (__m128d) __builtin_ia32_rsqrt14sd_mask ((__v2df) __A, 1646 (__v2df) __B, 1647 (__v2df) 1648 _mm_setzero_pd (), 1649 (__mmask8) -1); 1650 } 1651 1652 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1653 _mm_mask_rsqrt14_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 1654 { 1655 return (__m128d) __builtin_ia32_rsqrt14sd_mask ( (__v2df) __A, 1656 (__v2df) __B, 1657 (__v2df) __W, 1658 (__mmask8) __U); 1659 } 1660 1661 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1662 _mm_maskz_rsqrt14_sd (__mmask8 __U, __m128d __A, __m128d __B) 1663 { 1664 return (__m128d) __builtin_ia32_rsqrt14sd_mask ( (__v2df) __A, 1665 (__v2df) __B, 1666 (__v2df) _mm_setzero_pd (), 1667 (__mmask8) __U); 1668 } 1669 1670 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1671 _mm512_rcp14_pd(__m512d __A) 1672 { 1673 return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A, 1674 (__v8df) 1675 _mm512_setzero_pd (), 1676 (__mmask8) -1); 1677 } 1678 1679 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1680 _mm512_mask_rcp14_pd (__m512d __W, __mmask8 __U, __m512d __A) 1681 { 1682 return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A, 1683 (__v8df) __W, 1684 (__mmask8) __U); 1685 } 1686 1687 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1688 _mm512_maskz_rcp14_pd (__mmask8 __U, __m512d __A) 1689 { 1690 return (__m512d) __builtin_ia32_rcp14pd512_mask ((__v8df) __A, 1691 (__v8df) 1692 _mm512_setzero_pd (), 1693 (__mmask8) __U); 1694 } 1695 1696 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1697 _mm512_rcp14_ps(__m512 __A) 1698 { 1699 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A, 1700 (__v16sf) 1701 _mm512_setzero_ps (), 1702 (__mmask16) -1); 1703 } 1704 1705 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1706 _mm512_mask_rcp14_ps (__m512 __W, __mmask16 __U, __m512 __A) 1707 { 1708 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A, 1709 (__v16sf) __W, 1710 (__mmask16) __U); 1711 } 1712 1713 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1714 _mm512_maskz_rcp14_ps (__mmask16 __U, __m512 __A) 1715 { 1716 return (__m512) __builtin_ia32_rcp14ps512_mask ((__v16sf) __A, 1717 (__v16sf) 1718 _mm512_setzero_ps (), 1719 (__mmask16) __U); 1720 } 1721 1722 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1723 _mm_rcp14_ss(__m128 __A, __m128 __B) 1724 { 1725 return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A, 1726 (__v4sf) __B, 1727 (__v4sf) 1728 _mm_setzero_ps (), 1729 (__mmask8) -1); 1730 } 1731 1732 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1733 _mm_mask_rcp14_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 1734 { 1735 return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A, 1736 (__v4sf) __B, 1737 (__v4sf) __W, 1738 (__mmask8) __U); 1739 } 1740 1741 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1742 _mm_maskz_rcp14_ss (__mmask8 __U, __m128 __A, __m128 __B) 1743 { 1744 return (__m128) __builtin_ia32_rcp14ss_mask ((__v4sf) __A, 1745 (__v4sf) __B, 1746 (__v4sf) _mm_setzero_ps (), 1747 (__mmask8) __U); 1748 } 1749 1750 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1751 _mm_rcp14_sd(__m128d __A, __m128d __B) 1752 { 1753 return (__m128d) __builtin_ia32_rcp14sd_mask ((__v2df) __A, 1754 (__v2df) __B, 1755 (__v2df) 1756 _mm_setzero_pd (), 1757 (__mmask8) -1); 1758 } 1759 1760 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1761 _mm_mask_rcp14_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 1762 { 1763 return (__m128d) __builtin_ia32_rcp14sd_mask ( (__v2df) __A, 1764 (__v2df) __B, 1765 (__v2df) __W, 1766 (__mmask8) __U); 1767 } 1768 1769 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1770 _mm_maskz_rcp14_sd (__mmask8 __U, __m128d __A, __m128d __B) 1771 { 1772 return (__m128d) __builtin_ia32_rcp14sd_mask ( (__v2df) __A, 1773 (__v2df) __B, 1774 (__v2df) _mm_setzero_pd (), 1775 (__mmask8) __U); 1776 } 1777 1778 static __inline __m512 __DEFAULT_FN_ATTRS512 1779 _mm512_floor_ps(__m512 __A) 1780 { 1781 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A, 1782 _MM_FROUND_FLOOR, 1783 (__v16sf) __A, -1, 1784 _MM_FROUND_CUR_DIRECTION); 1785 } 1786 1787 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1788 _mm512_mask_floor_ps (__m512 __W, __mmask16 __U, __m512 __A) 1789 { 1790 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A, 1791 _MM_FROUND_FLOOR, 1792 (__v16sf) __W, __U, 1793 _MM_FROUND_CUR_DIRECTION); 1794 } 1795 1796 static __inline __m512d __DEFAULT_FN_ATTRS512 1797 _mm512_floor_pd(__m512d __A) 1798 { 1799 return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A, 1800 _MM_FROUND_FLOOR, 1801 (__v8df) __A, -1, 1802 _MM_FROUND_CUR_DIRECTION); 1803 } 1804 1805 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1806 _mm512_mask_floor_pd (__m512d __W, __mmask8 __U, __m512d __A) 1807 { 1808 return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A, 1809 _MM_FROUND_FLOOR, 1810 (__v8df) __W, __U, 1811 _MM_FROUND_CUR_DIRECTION); 1812 } 1813 1814 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1815 _mm512_mask_ceil_ps (__m512 __W, __mmask16 __U, __m512 __A) 1816 { 1817 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A, 1818 _MM_FROUND_CEIL, 1819 (__v16sf) __W, __U, 1820 _MM_FROUND_CUR_DIRECTION); 1821 } 1822 1823 static __inline __m512 __DEFAULT_FN_ATTRS512 1824 _mm512_ceil_ps(__m512 __A) 1825 { 1826 return (__m512) __builtin_ia32_rndscaleps_mask ((__v16sf) __A, 1827 _MM_FROUND_CEIL, 1828 (__v16sf) __A, -1, 1829 _MM_FROUND_CUR_DIRECTION); 1830 } 1831 1832 static __inline __m512d __DEFAULT_FN_ATTRS512 1833 _mm512_ceil_pd(__m512d __A) 1834 { 1835 return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A, 1836 _MM_FROUND_CEIL, 1837 (__v8df) __A, -1, 1838 _MM_FROUND_CUR_DIRECTION); 1839 } 1840 1841 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1842 _mm512_mask_ceil_pd (__m512d __W, __mmask8 __U, __m512d __A) 1843 { 1844 return (__m512d) __builtin_ia32_rndscalepd_mask ((__v8df) __A, 1845 _MM_FROUND_CEIL, 1846 (__v8df) __W, __U, 1847 _MM_FROUND_CUR_DIRECTION); 1848 } 1849 1850 static __inline __m512i __DEFAULT_FN_ATTRS512 1851 _mm512_abs_epi64(__m512i __A) 1852 { 1853 return (__m512i)__builtin_elementwise_abs((__v8di)__A); 1854 } 1855 1856 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1857 _mm512_mask_abs_epi64 (__m512i __W, __mmask8 __U, __m512i __A) 1858 { 1859 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 1860 (__v8di)_mm512_abs_epi64(__A), 1861 (__v8di)__W); 1862 } 1863 1864 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1865 _mm512_maskz_abs_epi64 (__mmask8 __U, __m512i __A) 1866 { 1867 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 1868 (__v8di)_mm512_abs_epi64(__A), 1869 (__v8di)_mm512_setzero_si512()); 1870 } 1871 1872 static __inline __m512i __DEFAULT_FN_ATTRS512 1873 _mm512_abs_epi32(__m512i __A) 1874 { 1875 return (__m512i)__builtin_elementwise_abs((__v16si) __A); 1876 } 1877 1878 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1879 _mm512_mask_abs_epi32 (__m512i __W, __mmask16 __U, __m512i __A) 1880 { 1881 return (__m512i)__builtin_ia32_selectd_512(__U, 1882 (__v16si)_mm512_abs_epi32(__A), 1883 (__v16si)__W); 1884 } 1885 1886 static __inline__ __m512i __DEFAULT_FN_ATTRS512 1887 _mm512_maskz_abs_epi32 (__mmask16 __U, __m512i __A) 1888 { 1889 return (__m512i)__builtin_ia32_selectd_512(__U, 1890 (__v16si)_mm512_abs_epi32(__A), 1891 (__v16si)_mm512_setzero_si512()); 1892 } 1893 1894 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1895 _mm_mask_add_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 1896 __A = _mm_add_ss(__A, __B); 1897 return __builtin_ia32_selectss_128(__U, __A, __W); 1898 } 1899 1900 static __inline__ __m128 __DEFAULT_FN_ATTRS128 1901 _mm_maskz_add_ss(__mmask8 __U,__m128 __A, __m128 __B) { 1902 __A = _mm_add_ss(__A, __B); 1903 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); 1904 } 1905 1906 #define _mm_add_round_ss(A, B, R) \ 1907 ((__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \ 1908 (__v4sf)(__m128)(B), \ 1909 (__v4sf)_mm_setzero_ps(), \ 1910 (__mmask8)-1, (int)(R))) 1911 1912 #define _mm_mask_add_round_ss(W, U, A, B, R) \ 1913 ((__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \ 1914 (__v4sf)(__m128)(B), \ 1915 (__v4sf)(__m128)(W), (__mmask8)(U), \ 1916 (int)(R))) 1917 1918 #define _mm_maskz_add_round_ss(U, A, B, R) \ 1919 ((__m128)__builtin_ia32_addss_round_mask((__v4sf)(__m128)(A), \ 1920 (__v4sf)(__m128)(B), \ 1921 (__v4sf)_mm_setzero_ps(), \ 1922 (__mmask8)(U), (int)(R))) 1923 1924 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1925 _mm_mask_add_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 1926 __A = _mm_add_sd(__A, __B); 1927 return __builtin_ia32_selectsd_128(__U, __A, __W); 1928 } 1929 1930 static __inline__ __m128d __DEFAULT_FN_ATTRS128 1931 _mm_maskz_add_sd(__mmask8 __U,__m128d __A, __m128d __B) { 1932 __A = _mm_add_sd(__A, __B); 1933 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); 1934 } 1935 #define _mm_add_round_sd(A, B, R) \ 1936 ((__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \ 1937 (__v2df)(__m128d)(B), \ 1938 (__v2df)_mm_setzero_pd(), \ 1939 (__mmask8)-1, (int)(R))) 1940 1941 #define _mm_mask_add_round_sd(W, U, A, B, R) \ 1942 ((__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \ 1943 (__v2df)(__m128d)(B), \ 1944 (__v2df)(__m128d)(W), \ 1945 (__mmask8)(U), (int)(R))) 1946 1947 #define _mm_maskz_add_round_sd(U, A, B, R) \ 1948 ((__m128d)__builtin_ia32_addsd_round_mask((__v2df)(__m128d)(A), \ 1949 (__v2df)(__m128d)(B), \ 1950 (__v2df)_mm_setzero_pd(), \ 1951 (__mmask8)(U), (int)(R))) 1952 1953 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1954 _mm512_mask_add_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 1955 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 1956 (__v8df)_mm512_add_pd(__A, __B), 1957 (__v8df)__W); 1958 } 1959 1960 static __inline__ __m512d __DEFAULT_FN_ATTRS512 1961 _mm512_maskz_add_pd(__mmask8 __U, __m512d __A, __m512d __B) { 1962 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 1963 (__v8df)_mm512_add_pd(__A, __B), 1964 (__v8df)_mm512_setzero_pd()); 1965 } 1966 1967 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1968 _mm512_mask_add_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 1969 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 1970 (__v16sf)_mm512_add_ps(__A, __B), 1971 (__v16sf)__W); 1972 } 1973 1974 static __inline__ __m512 __DEFAULT_FN_ATTRS512 1975 _mm512_maskz_add_ps(__mmask16 __U, __m512 __A, __m512 __B) { 1976 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 1977 (__v16sf)_mm512_add_ps(__A, __B), 1978 (__v16sf)_mm512_setzero_ps()); 1979 } 1980 1981 #define _mm512_add_round_pd(A, B, R) \ 1982 ((__m512d)__builtin_ia32_addpd512((__v8df)(__m512d)(A), \ 1983 (__v8df)(__m512d)(B), (int)(R))) 1984 1985 #define _mm512_mask_add_round_pd(W, U, A, B, R) \ 1986 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1987 (__v8df)_mm512_add_round_pd((A), (B), (R)), \ 1988 (__v8df)(__m512d)(W))) 1989 1990 #define _mm512_maskz_add_round_pd(U, A, B, R) \ 1991 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 1992 (__v8df)_mm512_add_round_pd((A), (B), (R)), \ 1993 (__v8df)_mm512_setzero_pd())) 1994 1995 #define _mm512_add_round_ps(A, B, R) \ 1996 ((__m512)__builtin_ia32_addps512((__v16sf)(__m512)(A), \ 1997 (__v16sf)(__m512)(B), (int)(R))) 1998 1999 #define _mm512_mask_add_round_ps(W, U, A, B, R) \ 2000 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2001 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \ 2002 (__v16sf)(__m512)(W))) 2003 2004 #define _mm512_maskz_add_round_ps(U, A, B, R) \ 2005 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2006 (__v16sf)_mm512_add_round_ps((A), (B), (R)), \ 2007 (__v16sf)_mm512_setzero_ps())) 2008 2009 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2010 _mm_mask_sub_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 2011 __A = _mm_sub_ss(__A, __B); 2012 return __builtin_ia32_selectss_128(__U, __A, __W); 2013 } 2014 2015 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2016 _mm_maskz_sub_ss(__mmask8 __U,__m128 __A, __m128 __B) { 2017 __A = _mm_sub_ss(__A, __B); 2018 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); 2019 } 2020 #define _mm_sub_round_ss(A, B, R) \ 2021 ((__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \ 2022 (__v4sf)(__m128)(B), \ 2023 (__v4sf)_mm_setzero_ps(), \ 2024 (__mmask8)-1, (int)(R))) 2025 2026 #define _mm_mask_sub_round_ss(W, U, A, B, R) \ 2027 ((__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \ 2028 (__v4sf)(__m128)(B), \ 2029 (__v4sf)(__m128)(W), (__mmask8)(U), \ 2030 (int)(R))) 2031 2032 #define _mm_maskz_sub_round_ss(U, A, B, R) \ 2033 ((__m128)__builtin_ia32_subss_round_mask((__v4sf)(__m128)(A), \ 2034 (__v4sf)(__m128)(B), \ 2035 (__v4sf)_mm_setzero_ps(), \ 2036 (__mmask8)(U), (int)(R))) 2037 2038 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2039 _mm_mask_sub_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 2040 __A = _mm_sub_sd(__A, __B); 2041 return __builtin_ia32_selectsd_128(__U, __A, __W); 2042 } 2043 2044 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2045 _mm_maskz_sub_sd(__mmask8 __U,__m128d __A, __m128d __B) { 2046 __A = _mm_sub_sd(__A, __B); 2047 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); 2048 } 2049 2050 #define _mm_sub_round_sd(A, B, R) \ 2051 ((__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \ 2052 (__v2df)(__m128d)(B), \ 2053 (__v2df)_mm_setzero_pd(), \ 2054 (__mmask8)-1, (int)(R))) 2055 2056 #define _mm_mask_sub_round_sd(W, U, A, B, R) \ 2057 ((__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \ 2058 (__v2df)(__m128d)(B), \ 2059 (__v2df)(__m128d)(W), \ 2060 (__mmask8)(U), (int)(R))) 2061 2062 #define _mm_maskz_sub_round_sd(U, A, B, R) \ 2063 ((__m128d)__builtin_ia32_subsd_round_mask((__v2df)(__m128d)(A), \ 2064 (__v2df)(__m128d)(B), \ 2065 (__v2df)_mm_setzero_pd(), \ 2066 (__mmask8)(U), (int)(R))) 2067 2068 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2069 _mm512_mask_sub_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 2070 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2071 (__v8df)_mm512_sub_pd(__A, __B), 2072 (__v8df)__W); 2073 } 2074 2075 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2076 _mm512_maskz_sub_pd(__mmask8 __U, __m512d __A, __m512d __B) { 2077 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2078 (__v8df)_mm512_sub_pd(__A, __B), 2079 (__v8df)_mm512_setzero_pd()); 2080 } 2081 2082 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2083 _mm512_mask_sub_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 2084 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2085 (__v16sf)_mm512_sub_ps(__A, __B), 2086 (__v16sf)__W); 2087 } 2088 2089 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2090 _mm512_maskz_sub_ps(__mmask16 __U, __m512 __A, __m512 __B) { 2091 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2092 (__v16sf)_mm512_sub_ps(__A, __B), 2093 (__v16sf)_mm512_setzero_ps()); 2094 } 2095 2096 #define _mm512_sub_round_pd(A, B, R) \ 2097 ((__m512d)__builtin_ia32_subpd512((__v8df)(__m512d)(A), \ 2098 (__v8df)(__m512d)(B), (int)(R))) 2099 2100 #define _mm512_mask_sub_round_pd(W, U, A, B, R) \ 2101 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2102 (__v8df)_mm512_sub_round_pd((A), (B), (R)), \ 2103 (__v8df)(__m512d)(W))) 2104 2105 #define _mm512_maskz_sub_round_pd(U, A, B, R) \ 2106 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2107 (__v8df)_mm512_sub_round_pd((A), (B), (R)), \ 2108 (__v8df)_mm512_setzero_pd())) 2109 2110 #define _mm512_sub_round_ps(A, B, R) \ 2111 ((__m512)__builtin_ia32_subps512((__v16sf)(__m512)(A), \ 2112 (__v16sf)(__m512)(B), (int)(R))) 2113 2114 #define _mm512_mask_sub_round_ps(W, U, A, B, R) \ 2115 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2116 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \ 2117 (__v16sf)(__m512)(W))) 2118 2119 #define _mm512_maskz_sub_round_ps(U, A, B, R) \ 2120 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2121 (__v16sf)_mm512_sub_round_ps((A), (B), (R)), \ 2122 (__v16sf)_mm512_setzero_ps())) 2123 2124 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2125 _mm_mask_mul_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 2126 __A = _mm_mul_ss(__A, __B); 2127 return __builtin_ia32_selectss_128(__U, __A, __W); 2128 } 2129 2130 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2131 _mm_maskz_mul_ss(__mmask8 __U,__m128 __A, __m128 __B) { 2132 __A = _mm_mul_ss(__A, __B); 2133 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); 2134 } 2135 #define _mm_mul_round_ss(A, B, R) \ 2136 ((__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \ 2137 (__v4sf)(__m128)(B), \ 2138 (__v4sf)_mm_setzero_ps(), \ 2139 (__mmask8)-1, (int)(R))) 2140 2141 #define _mm_mask_mul_round_ss(W, U, A, B, R) \ 2142 ((__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \ 2143 (__v4sf)(__m128)(B), \ 2144 (__v4sf)(__m128)(W), (__mmask8)(U), \ 2145 (int)(R))) 2146 2147 #define _mm_maskz_mul_round_ss(U, A, B, R) \ 2148 ((__m128)__builtin_ia32_mulss_round_mask((__v4sf)(__m128)(A), \ 2149 (__v4sf)(__m128)(B), \ 2150 (__v4sf)_mm_setzero_ps(), \ 2151 (__mmask8)(U), (int)(R))) 2152 2153 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2154 _mm_mask_mul_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 2155 __A = _mm_mul_sd(__A, __B); 2156 return __builtin_ia32_selectsd_128(__U, __A, __W); 2157 } 2158 2159 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2160 _mm_maskz_mul_sd(__mmask8 __U,__m128d __A, __m128d __B) { 2161 __A = _mm_mul_sd(__A, __B); 2162 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); 2163 } 2164 2165 #define _mm_mul_round_sd(A, B, R) \ 2166 ((__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \ 2167 (__v2df)(__m128d)(B), \ 2168 (__v2df)_mm_setzero_pd(), \ 2169 (__mmask8)-1, (int)(R))) 2170 2171 #define _mm_mask_mul_round_sd(W, U, A, B, R) \ 2172 ((__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \ 2173 (__v2df)(__m128d)(B), \ 2174 (__v2df)(__m128d)(W), \ 2175 (__mmask8)(U), (int)(R))) 2176 2177 #define _mm_maskz_mul_round_sd(U, A, B, R) \ 2178 ((__m128d)__builtin_ia32_mulsd_round_mask((__v2df)(__m128d)(A), \ 2179 (__v2df)(__m128d)(B), \ 2180 (__v2df)_mm_setzero_pd(), \ 2181 (__mmask8)(U), (int)(R))) 2182 2183 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2184 _mm512_mask_mul_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 2185 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2186 (__v8df)_mm512_mul_pd(__A, __B), 2187 (__v8df)__W); 2188 } 2189 2190 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2191 _mm512_maskz_mul_pd(__mmask8 __U, __m512d __A, __m512d __B) { 2192 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2193 (__v8df)_mm512_mul_pd(__A, __B), 2194 (__v8df)_mm512_setzero_pd()); 2195 } 2196 2197 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2198 _mm512_mask_mul_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 2199 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2200 (__v16sf)_mm512_mul_ps(__A, __B), 2201 (__v16sf)__W); 2202 } 2203 2204 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2205 _mm512_maskz_mul_ps(__mmask16 __U, __m512 __A, __m512 __B) { 2206 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2207 (__v16sf)_mm512_mul_ps(__A, __B), 2208 (__v16sf)_mm512_setzero_ps()); 2209 } 2210 2211 #define _mm512_mul_round_pd(A, B, R) \ 2212 ((__m512d)__builtin_ia32_mulpd512((__v8df)(__m512d)(A), \ 2213 (__v8df)(__m512d)(B), (int)(R))) 2214 2215 #define _mm512_mask_mul_round_pd(W, U, A, B, R) \ 2216 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2217 (__v8df)_mm512_mul_round_pd((A), (B), (R)), \ 2218 (__v8df)(__m512d)(W))) 2219 2220 #define _mm512_maskz_mul_round_pd(U, A, B, R) \ 2221 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2222 (__v8df)_mm512_mul_round_pd((A), (B), (R)), \ 2223 (__v8df)_mm512_setzero_pd())) 2224 2225 #define _mm512_mul_round_ps(A, B, R) \ 2226 ((__m512)__builtin_ia32_mulps512((__v16sf)(__m512)(A), \ 2227 (__v16sf)(__m512)(B), (int)(R))) 2228 2229 #define _mm512_mask_mul_round_ps(W, U, A, B, R) \ 2230 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2231 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \ 2232 (__v16sf)(__m512)(W))) 2233 2234 #define _mm512_maskz_mul_round_ps(U, A, B, R) \ 2235 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2236 (__v16sf)_mm512_mul_round_ps((A), (B), (R)), \ 2237 (__v16sf)_mm512_setzero_ps())) 2238 2239 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2240 _mm_mask_div_ss(__m128 __W, __mmask8 __U,__m128 __A, __m128 __B) { 2241 __A = _mm_div_ss(__A, __B); 2242 return __builtin_ia32_selectss_128(__U, __A, __W); 2243 } 2244 2245 static __inline__ __m128 __DEFAULT_FN_ATTRS128 2246 _mm_maskz_div_ss(__mmask8 __U,__m128 __A, __m128 __B) { 2247 __A = _mm_div_ss(__A, __B); 2248 return __builtin_ia32_selectss_128(__U, __A, _mm_setzero_ps()); 2249 } 2250 2251 #define _mm_div_round_ss(A, B, R) \ 2252 ((__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \ 2253 (__v4sf)(__m128)(B), \ 2254 (__v4sf)_mm_setzero_ps(), \ 2255 (__mmask8)-1, (int)(R))) 2256 2257 #define _mm_mask_div_round_ss(W, U, A, B, R) \ 2258 ((__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \ 2259 (__v4sf)(__m128)(B), \ 2260 (__v4sf)(__m128)(W), (__mmask8)(U), \ 2261 (int)(R))) 2262 2263 #define _mm_maskz_div_round_ss(U, A, B, R) \ 2264 ((__m128)__builtin_ia32_divss_round_mask((__v4sf)(__m128)(A), \ 2265 (__v4sf)(__m128)(B), \ 2266 (__v4sf)_mm_setzero_ps(), \ 2267 (__mmask8)(U), (int)(R))) 2268 2269 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2270 _mm_mask_div_sd(__m128d __W, __mmask8 __U,__m128d __A, __m128d __B) { 2271 __A = _mm_div_sd(__A, __B); 2272 return __builtin_ia32_selectsd_128(__U, __A, __W); 2273 } 2274 2275 static __inline__ __m128d __DEFAULT_FN_ATTRS128 2276 _mm_maskz_div_sd(__mmask8 __U,__m128d __A, __m128d __B) { 2277 __A = _mm_div_sd(__A, __B); 2278 return __builtin_ia32_selectsd_128(__U, __A, _mm_setzero_pd()); 2279 } 2280 2281 #define _mm_div_round_sd(A, B, R) \ 2282 ((__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \ 2283 (__v2df)(__m128d)(B), \ 2284 (__v2df)_mm_setzero_pd(), \ 2285 (__mmask8)-1, (int)(R))) 2286 2287 #define _mm_mask_div_round_sd(W, U, A, B, R) \ 2288 ((__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \ 2289 (__v2df)(__m128d)(B), \ 2290 (__v2df)(__m128d)(W), \ 2291 (__mmask8)(U), (int)(R))) 2292 2293 #define _mm_maskz_div_round_sd(U, A, B, R) \ 2294 ((__m128d)__builtin_ia32_divsd_round_mask((__v2df)(__m128d)(A), \ 2295 (__v2df)(__m128d)(B), \ 2296 (__v2df)_mm_setzero_pd(), \ 2297 (__mmask8)(U), (int)(R))) 2298 2299 static __inline __m512d __DEFAULT_FN_ATTRS512 2300 _mm512_div_pd(__m512d __a, __m512d __b) 2301 { 2302 return (__m512d)((__v8df)__a/(__v8df)__b); 2303 } 2304 2305 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2306 _mm512_mask_div_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) { 2307 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2308 (__v8df)_mm512_div_pd(__A, __B), 2309 (__v8df)__W); 2310 } 2311 2312 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2313 _mm512_maskz_div_pd(__mmask8 __U, __m512d __A, __m512d __B) { 2314 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 2315 (__v8df)_mm512_div_pd(__A, __B), 2316 (__v8df)_mm512_setzero_pd()); 2317 } 2318 2319 static __inline __m512 __DEFAULT_FN_ATTRS512 2320 _mm512_div_ps(__m512 __a, __m512 __b) 2321 { 2322 return (__m512)((__v16sf)__a/(__v16sf)__b); 2323 } 2324 2325 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2326 _mm512_mask_div_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) { 2327 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2328 (__v16sf)_mm512_div_ps(__A, __B), 2329 (__v16sf)__W); 2330 } 2331 2332 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2333 _mm512_maskz_div_ps(__mmask16 __U, __m512 __A, __m512 __B) { 2334 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 2335 (__v16sf)_mm512_div_ps(__A, __B), 2336 (__v16sf)_mm512_setzero_ps()); 2337 } 2338 2339 #define _mm512_div_round_pd(A, B, R) \ 2340 ((__m512d)__builtin_ia32_divpd512((__v8df)(__m512d)(A), \ 2341 (__v8df)(__m512d)(B), (int)(R))) 2342 2343 #define _mm512_mask_div_round_pd(W, U, A, B, R) \ 2344 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2345 (__v8df)_mm512_div_round_pd((A), (B), (R)), \ 2346 (__v8df)(__m512d)(W))) 2347 2348 #define _mm512_maskz_div_round_pd(U, A, B, R) \ 2349 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 2350 (__v8df)_mm512_div_round_pd((A), (B), (R)), \ 2351 (__v8df)_mm512_setzero_pd())) 2352 2353 #define _mm512_div_round_ps(A, B, R) \ 2354 ((__m512)__builtin_ia32_divps512((__v16sf)(__m512)(A), \ 2355 (__v16sf)(__m512)(B), (int)(R))) 2356 2357 #define _mm512_mask_div_round_ps(W, U, A, B, R) \ 2358 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2359 (__v16sf)_mm512_div_round_ps((A), (B), (R)), \ 2360 (__v16sf)(__m512)(W))) 2361 2362 #define _mm512_maskz_div_round_ps(U, A, B, R) \ 2363 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 2364 (__v16sf)_mm512_div_round_ps((A), (B), (R)), \ 2365 (__v16sf)_mm512_setzero_ps())) 2366 2367 #define _mm512_roundscale_ps(A, B) \ 2368 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(B), \ 2369 (__v16sf)_mm512_undefined_ps(), \ 2370 (__mmask16)-1, \ 2371 _MM_FROUND_CUR_DIRECTION)) 2372 2373 #define _mm512_mask_roundscale_ps(A, B, C, imm) \ 2374 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \ 2375 (__v16sf)(__m512)(A), (__mmask16)(B), \ 2376 _MM_FROUND_CUR_DIRECTION)) 2377 2378 #define _mm512_maskz_roundscale_ps(A, B, imm) \ 2379 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \ 2380 (__v16sf)_mm512_setzero_ps(), \ 2381 (__mmask16)(A), \ 2382 _MM_FROUND_CUR_DIRECTION)) 2383 2384 #define _mm512_mask_roundscale_round_ps(A, B, C, imm, R) \ 2385 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(C), (int)(imm), \ 2386 (__v16sf)(__m512)(A), (__mmask16)(B), \ 2387 (int)(R))) 2388 2389 #define _mm512_maskz_roundscale_round_ps(A, B, imm, R) \ 2390 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(B), (int)(imm), \ 2391 (__v16sf)_mm512_setzero_ps(), \ 2392 (__mmask16)(A), (int)(R))) 2393 2394 #define _mm512_roundscale_round_ps(A, imm, R) \ 2395 ((__m512)__builtin_ia32_rndscaleps_mask((__v16sf)(__m512)(A), (int)(imm), \ 2396 (__v16sf)_mm512_undefined_ps(), \ 2397 (__mmask16)-1, (int)(R))) 2398 2399 #define _mm512_roundscale_pd(A, B) \ 2400 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(A), (int)(B), \ 2401 (__v8df)_mm512_undefined_pd(), \ 2402 (__mmask8)-1, \ 2403 _MM_FROUND_CUR_DIRECTION)) 2404 2405 #define _mm512_mask_roundscale_pd(A, B, C, imm) \ 2406 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(C), (int)(imm), \ 2407 (__v8df)(__m512d)(A), (__mmask8)(B), \ 2408 _MM_FROUND_CUR_DIRECTION)) 2409 2410 #define _mm512_maskz_roundscale_pd(A, B, imm) \ 2411 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(B), (int)(imm), \ 2412 (__v8df)_mm512_setzero_pd(), \ 2413 (__mmask8)(A), \ 2414 _MM_FROUND_CUR_DIRECTION)) 2415 2416 #define _mm512_mask_roundscale_round_pd(A, B, C, imm, R) \ 2417 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(C), (int)(imm), \ 2418 (__v8df)(__m512d)(A), (__mmask8)(B), \ 2419 (int)(R))) 2420 2421 #define _mm512_maskz_roundscale_round_pd(A, B, imm, R) \ 2422 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(B), (int)(imm), \ 2423 (__v8df)_mm512_setzero_pd(), \ 2424 (__mmask8)(A), (int)(R))) 2425 2426 #define _mm512_roundscale_round_pd(A, imm, R) \ 2427 ((__m512d)__builtin_ia32_rndscalepd_mask((__v8df)(__m512d)(A), (int)(imm), \ 2428 (__v8df)_mm512_undefined_pd(), \ 2429 (__mmask8)-1, (int)(R))) 2430 2431 #define _mm512_fmadd_round_pd(A, B, C, R) \ 2432 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 2433 (__v8df)(__m512d)(B), \ 2434 (__v8df)(__m512d)(C), \ 2435 (__mmask8)-1, (int)(R))) 2436 2437 2438 #define _mm512_mask_fmadd_round_pd(A, U, B, C, R) \ 2439 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 2440 (__v8df)(__m512d)(B), \ 2441 (__v8df)(__m512d)(C), \ 2442 (__mmask8)(U), (int)(R))) 2443 2444 2445 #define _mm512_mask3_fmadd_round_pd(A, B, C, U, R) \ 2446 ((__m512d)__builtin_ia32_vfmaddpd512_mask3((__v8df)(__m512d)(A), \ 2447 (__v8df)(__m512d)(B), \ 2448 (__v8df)(__m512d)(C), \ 2449 (__mmask8)(U), (int)(R))) 2450 2451 2452 #define _mm512_maskz_fmadd_round_pd(U, A, B, C, R) \ 2453 ((__m512d)__builtin_ia32_vfmaddpd512_maskz((__v8df)(__m512d)(A), \ 2454 (__v8df)(__m512d)(B), \ 2455 (__v8df)(__m512d)(C), \ 2456 (__mmask8)(U), (int)(R))) 2457 2458 2459 #define _mm512_fmsub_round_pd(A, B, C, R) \ 2460 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 2461 (__v8df)(__m512d)(B), \ 2462 -(__v8df)(__m512d)(C), \ 2463 (__mmask8)-1, (int)(R))) 2464 2465 2466 #define _mm512_mask_fmsub_round_pd(A, U, B, C, R) \ 2467 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 2468 (__v8df)(__m512d)(B), \ 2469 -(__v8df)(__m512d)(C), \ 2470 (__mmask8)(U), (int)(R))) 2471 2472 2473 #define _mm512_maskz_fmsub_round_pd(U, A, B, C, R) \ 2474 ((__m512d)__builtin_ia32_vfmaddpd512_maskz((__v8df)(__m512d)(A), \ 2475 (__v8df)(__m512d)(B), \ 2476 -(__v8df)(__m512d)(C), \ 2477 (__mmask8)(U), (int)(R))) 2478 2479 2480 #define _mm512_fnmadd_round_pd(A, B, C, R) \ 2481 ((__m512d)__builtin_ia32_vfmaddpd512_mask(-(__v8df)(__m512d)(A), \ 2482 (__v8df)(__m512d)(B), \ 2483 (__v8df)(__m512d)(C), \ 2484 (__mmask8)-1, (int)(R))) 2485 2486 2487 #define _mm512_mask3_fnmadd_round_pd(A, B, C, U, R) \ 2488 ((__m512d)__builtin_ia32_vfmaddpd512_mask3(-(__v8df)(__m512d)(A), \ 2489 (__v8df)(__m512d)(B), \ 2490 (__v8df)(__m512d)(C), \ 2491 (__mmask8)(U), (int)(R))) 2492 2493 2494 #define _mm512_maskz_fnmadd_round_pd(U, A, B, C, R) \ 2495 ((__m512d)__builtin_ia32_vfmaddpd512_maskz(-(__v8df)(__m512d)(A), \ 2496 (__v8df)(__m512d)(B), \ 2497 (__v8df)(__m512d)(C), \ 2498 (__mmask8)(U), (int)(R))) 2499 2500 2501 #define _mm512_fnmsub_round_pd(A, B, C, R) \ 2502 ((__m512d)__builtin_ia32_vfmaddpd512_mask(-(__v8df)(__m512d)(A), \ 2503 (__v8df)(__m512d)(B), \ 2504 -(__v8df)(__m512d)(C), \ 2505 (__mmask8)-1, (int)(R))) 2506 2507 2508 #define _mm512_maskz_fnmsub_round_pd(U, A, B, C, R) \ 2509 ((__m512d)__builtin_ia32_vfmaddpd512_maskz(-(__v8df)(__m512d)(A), \ 2510 (__v8df)(__m512d)(B), \ 2511 -(__v8df)(__m512d)(C), \ 2512 (__mmask8)(U), (int)(R))) 2513 2514 2515 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2516 _mm512_fmadd_pd(__m512d __A, __m512d __B, __m512d __C) 2517 { 2518 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2519 (__v8df) __B, 2520 (__v8df) __C, 2521 (__mmask8) -1, 2522 _MM_FROUND_CUR_DIRECTION); 2523 } 2524 2525 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2526 _mm512_mask_fmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 2527 { 2528 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2529 (__v8df) __B, 2530 (__v8df) __C, 2531 (__mmask8) __U, 2532 _MM_FROUND_CUR_DIRECTION); 2533 } 2534 2535 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2536 _mm512_mask3_fmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 2537 { 2538 return (__m512d) __builtin_ia32_vfmaddpd512_mask3 ((__v8df) __A, 2539 (__v8df) __B, 2540 (__v8df) __C, 2541 (__mmask8) __U, 2542 _MM_FROUND_CUR_DIRECTION); 2543 } 2544 2545 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2546 _mm512_maskz_fmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2547 { 2548 return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A, 2549 (__v8df) __B, 2550 (__v8df) __C, 2551 (__mmask8) __U, 2552 _MM_FROUND_CUR_DIRECTION); 2553 } 2554 2555 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2556 _mm512_fmsub_pd(__m512d __A, __m512d __B, __m512d __C) 2557 { 2558 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2559 (__v8df) __B, 2560 -(__v8df) __C, 2561 (__mmask8) -1, 2562 _MM_FROUND_CUR_DIRECTION); 2563 } 2564 2565 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2566 _mm512_mask_fmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 2567 { 2568 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2569 (__v8df) __B, 2570 -(__v8df) __C, 2571 (__mmask8) __U, 2572 _MM_FROUND_CUR_DIRECTION); 2573 } 2574 2575 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2576 _mm512_maskz_fmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2577 { 2578 return (__m512d) __builtin_ia32_vfmaddpd512_maskz ((__v8df) __A, 2579 (__v8df) __B, 2580 -(__v8df) __C, 2581 (__mmask8) __U, 2582 _MM_FROUND_CUR_DIRECTION); 2583 } 2584 2585 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2586 _mm512_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C) 2587 { 2588 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2589 -(__v8df) __B, 2590 (__v8df) __C, 2591 (__mmask8) -1, 2592 _MM_FROUND_CUR_DIRECTION); 2593 } 2594 2595 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2596 _mm512_mask3_fnmadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 2597 { 2598 return (__m512d) __builtin_ia32_vfmaddpd512_mask3 (-(__v8df) __A, 2599 (__v8df) __B, 2600 (__v8df) __C, 2601 (__mmask8) __U, 2602 _MM_FROUND_CUR_DIRECTION); 2603 } 2604 2605 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2606 _mm512_maskz_fnmadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2607 { 2608 return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A, 2609 (__v8df) __B, 2610 (__v8df) __C, 2611 (__mmask8) __U, 2612 _MM_FROUND_CUR_DIRECTION); 2613 } 2614 2615 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2616 _mm512_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C) 2617 { 2618 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 2619 -(__v8df) __B, 2620 -(__v8df) __C, 2621 (__mmask8) -1, 2622 _MM_FROUND_CUR_DIRECTION); 2623 } 2624 2625 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2626 _mm512_maskz_fnmsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2627 { 2628 return (__m512d) __builtin_ia32_vfmaddpd512_maskz (-(__v8df) __A, 2629 (__v8df) __B, 2630 -(__v8df) __C, 2631 (__mmask8) __U, 2632 _MM_FROUND_CUR_DIRECTION); 2633 } 2634 2635 #define _mm512_fmadd_round_ps(A, B, C, R) \ 2636 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2637 (__v16sf)(__m512)(B), \ 2638 (__v16sf)(__m512)(C), \ 2639 (__mmask16)-1, (int)(R))) 2640 2641 2642 #define _mm512_mask_fmadd_round_ps(A, U, B, C, R) \ 2643 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2644 (__v16sf)(__m512)(B), \ 2645 (__v16sf)(__m512)(C), \ 2646 (__mmask16)(U), (int)(R))) 2647 2648 2649 #define _mm512_mask3_fmadd_round_ps(A, B, C, U, R) \ 2650 ((__m512)__builtin_ia32_vfmaddps512_mask3((__v16sf)(__m512)(A), \ 2651 (__v16sf)(__m512)(B), \ 2652 (__v16sf)(__m512)(C), \ 2653 (__mmask16)(U), (int)(R))) 2654 2655 2656 #define _mm512_maskz_fmadd_round_ps(U, A, B, C, R) \ 2657 ((__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \ 2658 (__v16sf)(__m512)(B), \ 2659 (__v16sf)(__m512)(C), \ 2660 (__mmask16)(U), (int)(R))) 2661 2662 2663 #define _mm512_fmsub_round_ps(A, B, C, R) \ 2664 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2665 (__v16sf)(__m512)(B), \ 2666 -(__v16sf)(__m512)(C), \ 2667 (__mmask16)-1, (int)(R))) 2668 2669 2670 #define _mm512_mask_fmsub_round_ps(A, U, B, C, R) \ 2671 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2672 (__v16sf)(__m512)(B), \ 2673 -(__v16sf)(__m512)(C), \ 2674 (__mmask16)(U), (int)(R))) 2675 2676 2677 #define _mm512_maskz_fmsub_round_ps(U, A, B, C, R) \ 2678 ((__m512)__builtin_ia32_vfmaddps512_maskz((__v16sf)(__m512)(A), \ 2679 (__v16sf)(__m512)(B), \ 2680 -(__v16sf)(__m512)(C), \ 2681 (__mmask16)(U), (int)(R))) 2682 2683 2684 #define _mm512_fnmadd_round_ps(A, B, C, R) \ 2685 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2686 -(__v16sf)(__m512)(B), \ 2687 (__v16sf)(__m512)(C), \ 2688 (__mmask16)-1, (int)(R))) 2689 2690 2691 #define _mm512_mask3_fnmadd_round_ps(A, B, C, U, R) \ 2692 ((__m512)__builtin_ia32_vfmaddps512_mask3(-(__v16sf)(__m512)(A), \ 2693 (__v16sf)(__m512)(B), \ 2694 (__v16sf)(__m512)(C), \ 2695 (__mmask16)(U), (int)(R))) 2696 2697 2698 #define _mm512_maskz_fnmadd_round_ps(U, A, B, C, R) \ 2699 ((__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \ 2700 (__v16sf)(__m512)(B), \ 2701 (__v16sf)(__m512)(C), \ 2702 (__mmask16)(U), (int)(R))) 2703 2704 2705 #define _mm512_fnmsub_round_ps(A, B, C, R) \ 2706 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 2707 -(__v16sf)(__m512)(B), \ 2708 -(__v16sf)(__m512)(C), \ 2709 (__mmask16)-1, (int)(R))) 2710 2711 2712 #define _mm512_maskz_fnmsub_round_ps(U, A, B, C, R) \ 2713 ((__m512)__builtin_ia32_vfmaddps512_maskz(-(__v16sf)(__m512)(A), \ 2714 (__v16sf)(__m512)(B), \ 2715 -(__v16sf)(__m512)(C), \ 2716 (__mmask16)(U), (int)(R))) 2717 2718 2719 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2720 _mm512_fmadd_ps(__m512 __A, __m512 __B, __m512 __C) 2721 { 2722 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2723 (__v16sf) __B, 2724 (__v16sf) __C, 2725 (__mmask16) -1, 2726 _MM_FROUND_CUR_DIRECTION); 2727 } 2728 2729 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2730 _mm512_mask_fmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 2731 { 2732 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2733 (__v16sf) __B, 2734 (__v16sf) __C, 2735 (__mmask16) __U, 2736 _MM_FROUND_CUR_DIRECTION); 2737 } 2738 2739 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2740 _mm512_mask3_fmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 2741 { 2742 return (__m512) __builtin_ia32_vfmaddps512_mask3 ((__v16sf) __A, 2743 (__v16sf) __B, 2744 (__v16sf) __C, 2745 (__mmask16) __U, 2746 _MM_FROUND_CUR_DIRECTION); 2747 } 2748 2749 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2750 _mm512_maskz_fmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 2751 { 2752 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A, 2753 (__v16sf) __B, 2754 (__v16sf) __C, 2755 (__mmask16) __U, 2756 _MM_FROUND_CUR_DIRECTION); 2757 } 2758 2759 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2760 _mm512_fmsub_ps(__m512 __A, __m512 __B, __m512 __C) 2761 { 2762 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2763 (__v16sf) __B, 2764 -(__v16sf) __C, 2765 (__mmask16) -1, 2766 _MM_FROUND_CUR_DIRECTION); 2767 } 2768 2769 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2770 _mm512_mask_fmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 2771 { 2772 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2773 (__v16sf) __B, 2774 -(__v16sf) __C, 2775 (__mmask16) __U, 2776 _MM_FROUND_CUR_DIRECTION); 2777 } 2778 2779 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2780 _mm512_maskz_fmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 2781 { 2782 return (__m512) __builtin_ia32_vfmaddps512_maskz ((__v16sf) __A, 2783 (__v16sf) __B, 2784 -(__v16sf) __C, 2785 (__mmask16) __U, 2786 _MM_FROUND_CUR_DIRECTION); 2787 } 2788 2789 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2790 _mm512_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C) 2791 { 2792 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2793 -(__v16sf) __B, 2794 (__v16sf) __C, 2795 (__mmask16) -1, 2796 _MM_FROUND_CUR_DIRECTION); 2797 } 2798 2799 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2800 _mm512_mask3_fnmadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 2801 { 2802 return (__m512) __builtin_ia32_vfmaddps512_mask3 (-(__v16sf) __A, 2803 (__v16sf) __B, 2804 (__v16sf) __C, 2805 (__mmask16) __U, 2806 _MM_FROUND_CUR_DIRECTION); 2807 } 2808 2809 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2810 _mm512_maskz_fnmadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 2811 { 2812 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A, 2813 (__v16sf) __B, 2814 (__v16sf) __C, 2815 (__mmask16) __U, 2816 _MM_FROUND_CUR_DIRECTION); 2817 } 2818 2819 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2820 _mm512_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C) 2821 { 2822 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 2823 -(__v16sf) __B, 2824 -(__v16sf) __C, 2825 (__mmask16) -1, 2826 _MM_FROUND_CUR_DIRECTION); 2827 } 2828 2829 static __inline__ __m512 __DEFAULT_FN_ATTRS512 2830 _mm512_maskz_fnmsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 2831 { 2832 return (__m512) __builtin_ia32_vfmaddps512_maskz (-(__v16sf) __A, 2833 (__v16sf) __B, 2834 -(__v16sf) __C, 2835 (__mmask16) __U, 2836 _MM_FROUND_CUR_DIRECTION); 2837 } 2838 2839 #define _mm512_fmaddsub_round_pd(A, B, C, R) \ 2840 ((__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \ 2841 (__v8df)(__m512d)(B), \ 2842 (__v8df)(__m512d)(C), \ 2843 (__mmask8)-1, (int)(R))) 2844 2845 2846 #define _mm512_mask_fmaddsub_round_pd(A, U, B, C, R) \ 2847 ((__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \ 2848 (__v8df)(__m512d)(B), \ 2849 (__v8df)(__m512d)(C), \ 2850 (__mmask8)(U), (int)(R))) 2851 2852 2853 #define _mm512_mask3_fmaddsub_round_pd(A, B, C, U, R) \ 2854 ((__m512d)__builtin_ia32_vfmaddsubpd512_mask3((__v8df)(__m512d)(A), \ 2855 (__v8df)(__m512d)(B), \ 2856 (__v8df)(__m512d)(C), \ 2857 (__mmask8)(U), (int)(R))) 2858 2859 2860 #define _mm512_maskz_fmaddsub_round_pd(U, A, B, C, R) \ 2861 ((__m512d)__builtin_ia32_vfmaddsubpd512_maskz((__v8df)(__m512d)(A), \ 2862 (__v8df)(__m512d)(B), \ 2863 (__v8df)(__m512d)(C), \ 2864 (__mmask8)(U), (int)(R))) 2865 2866 2867 #define _mm512_fmsubadd_round_pd(A, B, C, R) \ 2868 ((__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \ 2869 (__v8df)(__m512d)(B), \ 2870 -(__v8df)(__m512d)(C), \ 2871 (__mmask8)-1, (int)(R))) 2872 2873 2874 #define _mm512_mask_fmsubadd_round_pd(A, U, B, C, R) \ 2875 ((__m512d)__builtin_ia32_vfmaddsubpd512_mask((__v8df)(__m512d)(A), \ 2876 (__v8df)(__m512d)(B), \ 2877 -(__v8df)(__m512d)(C), \ 2878 (__mmask8)(U), (int)(R))) 2879 2880 2881 #define _mm512_maskz_fmsubadd_round_pd(U, A, B, C, R) \ 2882 ((__m512d)__builtin_ia32_vfmaddsubpd512_maskz((__v8df)(__m512d)(A), \ 2883 (__v8df)(__m512d)(B), \ 2884 -(__v8df)(__m512d)(C), \ 2885 (__mmask8)(U), (int)(R))) 2886 2887 2888 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2889 _mm512_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C) 2890 { 2891 return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A, 2892 (__v8df) __B, 2893 (__v8df) __C, 2894 (__mmask8) -1, 2895 _MM_FROUND_CUR_DIRECTION); 2896 } 2897 2898 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2899 _mm512_mask_fmaddsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 2900 { 2901 return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A, 2902 (__v8df) __B, 2903 (__v8df) __C, 2904 (__mmask8) __U, 2905 _MM_FROUND_CUR_DIRECTION); 2906 } 2907 2908 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2909 _mm512_mask3_fmaddsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 2910 { 2911 return (__m512d) __builtin_ia32_vfmaddsubpd512_mask3 ((__v8df) __A, 2912 (__v8df) __B, 2913 (__v8df) __C, 2914 (__mmask8) __U, 2915 _MM_FROUND_CUR_DIRECTION); 2916 } 2917 2918 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2919 _mm512_maskz_fmaddsub_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2920 { 2921 return (__m512d) __builtin_ia32_vfmaddsubpd512_maskz ((__v8df) __A, 2922 (__v8df) __B, 2923 (__v8df) __C, 2924 (__mmask8) __U, 2925 _MM_FROUND_CUR_DIRECTION); 2926 } 2927 2928 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2929 _mm512_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C) 2930 { 2931 return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A, 2932 (__v8df) __B, 2933 -(__v8df) __C, 2934 (__mmask8) -1, 2935 _MM_FROUND_CUR_DIRECTION); 2936 } 2937 2938 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2939 _mm512_mask_fmsubadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 2940 { 2941 return (__m512d) __builtin_ia32_vfmaddsubpd512_mask ((__v8df) __A, 2942 (__v8df) __B, 2943 -(__v8df) __C, 2944 (__mmask8) __U, 2945 _MM_FROUND_CUR_DIRECTION); 2946 } 2947 2948 static __inline__ __m512d __DEFAULT_FN_ATTRS512 2949 _mm512_maskz_fmsubadd_pd(__mmask8 __U, __m512d __A, __m512d __B, __m512d __C) 2950 { 2951 return (__m512d) __builtin_ia32_vfmaddsubpd512_maskz ((__v8df) __A, 2952 (__v8df) __B, 2953 -(__v8df) __C, 2954 (__mmask8) __U, 2955 _MM_FROUND_CUR_DIRECTION); 2956 } 2957 2958 #define _mm512_fmaddsub_round_ps(A, B, C, R) \ 2959 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \ 2960 (__v16sf)(__m512)(B), \ 2961 (__v16sf)(__m512)(C), \ 2962 (__mmask16)-1, (int)(R))) 2963 2964 2965 #define _mm512_mask_fmaddsub_round_ps(A, U, B, C, R) \ 2966 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \ 2967 (__v16sf)(__m512)(B), \ 2968 (__v16sf)(__m512)(C), \ 2969 (__mmask16)(U), (int)(R))) 2970 2971 2972 #define _mm512_mask3_fmaddsub_round_ps(A, B, C, U, R) \ 2973 ((__m512)__builtin_ia32_vfmaddsubps512_mask3((__v16sf)(__m512)(A), \ 2974 (__v16sf)(__m512)(B), \ 2975 (__v16sf)(__m512)(C), \ 2976 (__mmask16)(U), (int)(R))) 2977 2978 2979 #define _mm512_maskz_fmaddsub_round_ps(U, A, B, C, R) \ 2980 ((__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \ 2981 (__v16sf)(__m512)(B), \ 2982 (__v16sf)(__m512)(C), \ 2983 (__mmask16)(U), (int)(R))) 2984 2985 2986 #define _mm512_fmsubadd_round_ps(A, B, C, R) \ 2987 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \ 2988 (__v16sf)(__m512)(B), \ 2989 -(__v16sf)(__m512)(C), \ 2990 (__mmask16)-1, (int)(R))) 2991 2992 2993 #define _mm512_mask_fmsubadd_round_ps(A, U, B, C, R) \ 2994 ((__m512)__builtin_ia32_vfmaddsubps512_mask((__v16sf)(__m512)(A), \ 2995 (__v16sf)(__m512)(B), \ 2996 -(__v16sf)(__m512)(C), \ 2997 (__mmask16)(U), (int)(R))) 2998 2999 3000 #define _mm512_maskz_fmsubadd_round_ps(U, A, B, C, R) \ 3001 ((__m512)__builtin_ia32_vfmaddsubps512_maskz((__v16sf)(__m512)(A), \ 3002 (__v16sf)(__m512)(B), \ 3003 -(__v16sf)(__m512)(C), \ 3004 (__mmask16)(U), (int)(R))) 3005 3006 3007 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3008 _mm512_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C) 3009 { 3010 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A, 3011 (__v16sf) __B, 3012 (__v16sf) __C, 3013 (__mmask16) -1, 3014 _MM_FROUND_CUR_DIRECTION); 3015 } 3016 3017 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3018 _mm512_mask_fmaddsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 3019 { 3020 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A, 3021 (__v16sf) __B, 3022 (__v16sf) __C, 3023 (__mmask16) __U, 3024 _MM_FROUND_CUR_DIRECTION); 3025 } 3026 3027 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3028 _mm512_mask3_fmaddsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 3029 { 3030 return (__m512) __builtin_ia32_vfmaddsubps512_mask3 ((__v16sf) __A, 3031 (__v16sf) __B, 3032 (__v16sf) __C, 3033 (__mmask16) __U, 3034 _MM_FROUND_CUR_DIRECTION); 3035 } 3036 3037 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3038 _mm512_maskz_fmaddsub_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 3039 { 3040 return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A, 3041 (__v16sf) __B, 3042 (__v16sf) __C, 3043 (__mmask16) __U, 3044 _MM_FROUND_CUR_DIRECTION); 3045 } 3046 3047 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3048 _mm512_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C) 3049 { 3050 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A, 3051 (__v16sf) __B, 3052 -(__v16sf) __C, 3053 (__mmask16) -1, 3054 _MM_FROUND_CUR_DIRECTION); 3055 } 3056 3057 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3058 _mm512_mask_fmsubadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 3059 { 3060 return (__m512) __builtin_ia32_vfmaddsubps512_mask ((__v16sf) __A, 3061 (__v16sf) __B, 3062 -(__v16sf) __C, 3063 (__mmask16) __U, 3064 _MM_FROUND_CUR_DIRECTION); 3065 } 3066 3067 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3068 _mm512_maskz_fmsubadd_ps(__mmask16 __U, __m512 __A, __m512 __B, __m512 __C) 3069 { 3070 return (__m512) __builtin_ia32_vfmaddsubps512_maskz ((__v16sf) __A, 3071 (__v16sf) __B, 3072 -(__v16sf) __C, 3073 (__mmask16) __U, 3074 _MM_FROUND_CUR_DIRECTION); 3075 } 3076 3077 #define _mm512_mask3_fmsub_round_pd(A, B, C, U, R) \ 3078 ((__m512d)__builtin_ia32_vfmsubpd512_mask3((__v8df)(__m512d)(A), \ 3079 (__v8df)(__m512d)(B), \ 3080 (__v8df)(__m512d)(C), \ 3081 (__mmask8)(U), (int)(R))) 3082 3083 3084 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3085 _mm512_mask3_fmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 3086 { 3087 return (__m512d)__builtin_ia32_vfmsubpd512_mask3 ((__v8df) __A, 3088 (__v8df) __B, 3089 (__v8df) __C, 3090 (__mmask8) __U, 3091 _MM_FROUND_CUR_DIRECTION); 3092 } 3093 3094 #define _mm512_mask3_fmsub_round_ps(A, B, C, U, R) \ 3095 ((__m512)__builtin_ia32_vfmsubps512_mask3((__v16sf)(__m512)(A), \ 3096 (__v16sf)(__m512)(B), \ 3097 (__v16sf)(__m512)(C), \ 3098 (__mmask16)(U), (int)(R))) 3099 3100 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3101 _mm512_mask3_fmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 3102 { 3103 return (__m512)__builtin_ia32_vfmsubps512_mask3 ((__v16sf) __A, 3104 (__v16sf) __B, 3105 (__v16sf) __C, 3106 (__mmask16) __U, 3107 _MM_FROUND_CUR_DIRECTION); 3108 } 3109 3110 #define _mm512_mask3_fmsubadd_round_pd(A, B, C, U, R) \ 3111 ((__m512d)__builtin_ia32_vfmsubaddpd512_mask3((__v8df)(__m512d)(A), \ 3112 (__v8df)(__m512d)(B), \ 3113 (__v8df)(__m512d)(C), \ 3114 (__mmask8)(U), (int)(R))) 3115 3116 3117 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3118 _mm512_mask3_fmsubadd_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 3119 { 3120 return (__m512d)__builtin_ia32_vfmsubaddpd512_mask3 ((__v8df) __A, 3121 (__v8df) __B, 3122 (__v8df) __C, 3123 (__mmask8) __U, 3124 _MM_FROUND_CUR_DIRECTION); 3125 } 3126 3127 #define _mm512_mask3_fmsubadd_round_ps(A, B, C, U, R) \ 3128 ((__m512)__builtin_ia32_vfmsubaddps512_mask3((__v16sf)(__m512)(A), \ 3129 (__v16sf)(__m512)(B), \ 3130 (__v16sf)(__m512)(C), \ 3131 (__mmask16)(U), (int)(R))) 3132 3133 3134 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3135 _mm512_mask3_fmsubadd_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 3136 { 3137 return (__m512)__builtin_ia32_vfmsubaddps512_mask3 ((__v16sf) __A, 3138 (__v16sf) __B, 3139 (__v16sf) __C, 3140 (__mmask16) __U, 3141 _MM_FROUND_CUR_DIRECTION); 3142 } 3143 3144 #define _mm512_mask_fnmadd_round_pd(A, U, B, C, R) \ 3145 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 3146 -(__v8df)(__m512d)(B), \ 3147 (__v8df)(__m512d)(C), \ 3148 (__mmask8)(U), (int)(R))) 3149 3150 3151 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3152 _mm512_mask_fnmadd_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 3153 { 3154 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 3155 -(__v8df) __B, 3156 (__v8df) __C, 3157 (__mmask8) __U, 3158 _MM_FROUND_CUR_DIRECTION); 3159 } 3160 3161 #define _mm512_mask_fnmadd_round_ps(A, U, B, C, R) \ 3162 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 3163 -(__v16sf)(__m512)(B), \ 3164 (__v16sf)(__m512)(C), \ 3165 (__mmask16)(U), (int)(R))) 3166 3167 3168 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3169 _mm512_mask_fnmadd_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 3170 { 3171 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 3172 -(__v16sf) __B, 3173 (__v16sf) __C, 3174 (__mmask16) __U, 3175 _MM_FROUND_CUR_DIRECTION); 3176 } 3177 3178 #define _mm512_mask_fnmsub_round_pd(A, U, B, C, R) \ 3179 ((__m512d)__builtin_ia32_vfmaddpd512_mask((__v8df)(__m512d)(A), \ 3180 -(__v8df)(__m512d)(B), \ 3181 -(__v8df)(__m512d)(C), \ 3182 (__mmask8)(U), (int)(R))) 3183 3184 3185 #define _mm512_mask3_fnmsub_round_pd(A, B, C, U, R) \ 3186 ((__m512d)__builtin_ia32_vfmsubpd512_mask3(-(__v8df)(__m512d)(A), \ 3187 (__v8df)(__m512d)(B), \ 3188 (__v8df)(__m512d)(C), \ 3189 (__mmask8)(U), (int)(R))) 3190 3191 3192 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3193 _mm512_mask_fnmsub_pd(__m512d __A, __mmask8 __U, __m512d __B, __m512d __C) 3194 { 3195 return (__m512d) __builtin_ia32_vfmaddpd512_mask ((__v8df) __A, 3196 -(__v8df) __B, 3197 -(__v8df) __C, 3198 (__mmask8) __U, 3199 _MM_FROUND_CUR_DIRECTION); 3200 } 3201 3202 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3203 _mm512_mask3_fnmsub_pd(__m512d __A, __m512d __B, __m512d __C, __mmask8 __U) 3204 { 3205 return (__m512d) __builtin_ia32_vfmsubpd512_mask3 (-(__v8df) __A, 3206 (__v8df) __B, 3207 (__v8df) __C, 3208 (__mmask8) __U, 3209 _MM_FROUND_CUR_DIRECTION); 3210 } 3211 3212 #define _mm512_mask_fnmsub_round_ps(A, U, B, C, R) \ 3213 ((__m512)__builtin_ia32_vfmaddps512_mask((__v16sf)(__m512)(A), \ 3214 -(__v16sf)(__m512)(B), \ 3215 -(__v16sf)(__m512)(C), \ 3216 (__mmask16)(U), (int)(R))) 3217 3218 3219 #define _mm512_mask3_fnmsub_round_ps(A, B, C, U, R) \ 3220 ((__m512)__builtin_ia32_vfmsubps512_mask3(-(__v16sf)(__m512)(A), \ 3221 (__v16sf)(__m512)(B), \ 3222 (__v16sf)(__m512)(C), \ 3223 (__mmask16)(U), (int)(R))) 3224 3225 3226 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3227 _mm512_mask_fnmsub_ps(__m512 __A, __mmask16 __U, __m512 __B, __m512 __C) 3228 { 3229 return (__m512) __builtin_ia32_vfmaddps512_mask ((__v16sf) __A, 3230 -(__v16sf) __B, 3231 -(__v16sf) __C, 3232 (__mmask16) __U, 3233 _MM_FROUND_CUR_DIRECTION); 3234 } 3235 3236 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3237 _mm512_mask3_fnmsub_ps(__m512 __A, __m512 __B, __m512 __C, __mmask16 __U) 3238 { 3239 return (__m512) __builtin_ia32_vfmsubps512_mask3 (-(__v16sf) __A, 3240 (__v16sf) __B, 3241 (__v16sf) __C, 3242 (__mmask16) __U, 3243 _MM_FROUND_CUR_DIRECTION); 3244 } 3245 3246 3247 3248 /* Vector permutations */ 3249 3250 static __inline __m512i __DEFAULT_FN_ATTRS512 3251 _mm512_permutex2var_epi32(__m512i __A, __m512i __I, __m512i __B) 3252 { 3253 return (__m512i)__builtin_ia32_vpermi2vard512((__v16si)__A, (__v16si) __I, 3254 (__v16si) __B); 3255 } 3256 3257 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3258 _mm512_mask_permutex2var_epi32(__m512i __A, __mmask16 __U, __m512i __I, 3259 __m512i __B) 3260 { 3261 return (__m512i)__builtin_ia32_selectd_512(__U, 3262 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), 3263 (__v16si)__A); 3264 } 3265 3266 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3267 _mm512_mask2_permutex2var_epi32(__m512i __A, __m512i __I, __mmask16 __U, 3268 __m512i __B) 3269 { 3270 return (__m512i)__builtin_ia32_selectd_512(__U, 3271 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), 3272 (__v16si)__I); 3273 } 3274 3275 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3276 _mm512_maskz_permutex2var_epi32(__mmask16 __U, __m512i __A, __m512i __I, 3277 __m512i __B) 3278 { 3279 return (__m512i)__builtin_ia32_selectd_512(__U, 3280 (__v16si)_mm512_permutex2var_epi32(__A, __I, __B), 3281 (__v16si)_mm512_setzero_si512()); 3282 } 3283 3284 static __inline __m512i __DEFAULT_FN_ATTRS512 3285 _mm512_permutex2var_epi64(__m512i __A, __m512i __I, __m512i __B) 3286 { 3287 return (__m512i)__builtin_ia32_vpermi2varq512((__v8di)__A, (__v8di) __I, 3288 (__v8di) __B); 3289 } 3290 3291 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3292 _mm512_mask_permutex2var_epi64(__m512i __A, __mmask8 __U, __m512i __I, 3293 __m512i __B) 3294 { 3295 return (__m512i)__builtin_ia32_selectq_512(__U, 3296 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), 3297 (__v8di)__A); 3298 } 3299 3300 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3301 _mm512_mask2_permutex2var_epi64(__m512i __A, __m512i __I, __mmask8 __U, 3302 __m512i __B) 3303 { 3304 return (__m512i)__builtin_ia32_selectq_512(__U, 3305 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), 3306 (__v8di)__I); 3307 } 3308 3309 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3310 _mm512_maskz_permutex2var_epi64(__mmask8 __U, __m512i __A, __m512i __I, 3311 __m512i __B) 3312 { 3313 return (__m512i)__builtin_ia32_selectq_512(__U, 3314 (__v8di)_mm512_permutex2var_epi64(__A, __I, __B), 3315 (__v8di)_mm512_setzero_si512()); 3316 } 3317 3318 #define _mm512_alignr_epi64(A, B, I) \ 3319 ((__m512i)__builtin_ia32_alignq512((__v8di)(__m512i)(A), \ 3320 (__v8di)(__m512i)(B), (int)(I))) 3321 3322 #define _mm512_mask_alignr_epi64(W, U, A, B, imm) \ 3323 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 3324 (__v8di)_mm512_alignr_epi64((A), (B), (imm)), \ 3325 (__v8di)(__m512i)(W))) 3326 3327 #define _mm512_maskz_alignr_epi64(U, A, B, imm) \ 3328 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 3329 (__v8di)_mm512_alignr_epi64((A), (B), (imm)), \ 3330 (__v8di)_mm512_setzero_si512())) 3331 3332 #define _mm512_alignr_epi32(A, B, I) \ 3333 ((__m512i)__builtin_ia32_alignd512((__v16si)(__m512i)(A), \ 3334 (__v16si)(__m512i)(B), (int)(I))) 3335 3336 #define _mm512_mask_alignr_epi32(W, U, A, B, imm) \ 3337 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 3338 (__v16si)_mm512_alignr_epi32((A), (B), (imm)), \ 3339 (__v16si)(__m512i)(W))) 3340 3341 #define _mm512_maskz_alignr_epi32(U, A, B, imm) \ 3342 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 3343 (__v16si)_mm512_alignr_epi32((A), (B), (imm)), \ 3344 (__v16si)_mm512_setzero_si512())) 3345 /* Vector Extract */ 3346 3347 #define _mm512_extractf64x4_pd(A, I) \ 3348 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(I), \ 3349 (__v4df)_mm256_undefined_pd(), \ 3350 (__mmask8)-1)) 3351 3352 #define _mm512_mask_extractf64x4_pd(W, U, A, imm) \ 3353 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \ 3354 (__v4df)(__m256d)(W), \ 3355 (__mmask8)(U))) 3356 3357 #define _mm512_maskz_extractf64x4_pd(U, A, imm) \ 3358 ((__m256d)__builtin_ia32_extractf64x4_mask((__v8df)(__m512d)(A), (int)(imm), \ 3359 (__v4df)_mm256_setzero_pd(), \ 3360 (__mmask8)(U))) 3361 3362 #define _mm512_extractf32x4_ps(A, I) \ 3363 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(I), \ 3364 (__v4sf)_mm_undefined_ps(), \ 3365 (__mmask8)-1)) 3366 3367 #define _mm512_mask_extractf32x4_ps(W, U, A, imm) \ 3368 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \ 3369 (__v4sf)(__m128)(W), \ 3370 (__mmask8)(U))) 3371 3372 #define _mm512_maskz_extractf32x4_ps(U, A, imm) \ 3373 ((__m128)__builtin_ia32_extractf32x4_mask((__v16sf)(__m512)(A), (int)(imm), \ 3374 (__v4sf)_mm_setzero_ps(), \ 3375 (__mmask8)(U))) 3376 3377 /* Vector Blend */ 3378 3379 static __inline __m512d __DEFAULT_FN_ATTRS512 3380 _mm512_mask_blend_pd(__mmask8 __U, __m512d __A, __m512d __W) 3381 { 3382 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, 3383 (__v8df) __W, 3384 (__v8df) __A); 3385 } 3386 3387 static __inline __m512 __DEFAULT_FN_ATTRS512 3388 _mm512_mask_blend_ps(__mmask16 __U, __m512 __A, __m512 __W) 3389 { 3390 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, 3391 (__v16sf) __W, 3392 (__v16sf) __A); 3393 } 3394 3395 static __inline __m512i __DEFAULT_FN_ATTRS512 3396 _mm512_mask_blend_epi64(__mmask8 __U, __m512i __A, __m512i __W) 3397 { 3398 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U, 3399 (__v8di) __W, 3400 (__v8di) __A); 3401 } 3402 3403 static __inline __m512i __DEFAULT_FN_ATTRS512 3404 _mm512_mask_blend_epi32(__mmask16 __U, __m512i __A, __m512i __W) 3405 { 3406 return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U, 3407 (__v16si) __W, 3408 (__v16si) __A); 3409 } 3410 3411 /* Compare */ 3412 3413 #define _mm512_cmp_round_ps_mask(A, B, P, R) \ 3414 ((__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \ 3415 (__v16sf)(__m512)(B), (int)(P), \ 3416 (__mmask16)-1, (int)(R))) 3417 3418 #define _mm512_mask_cmp_round_ps_mask(U, A, B, P, R) \ 3419 ((__mmask16)__builtin_ia32_cmpps512_mask((__v16sf)(__m512)(A), \ 3420 (__v16sf)(__m512)(B), (int)(P), \ 3421 (__mmask16)(U), (int)(R))) 3422 3423 #define _mm512_cmp_ps_mask(A, B, P) \ 3424 _mm512_cmp_round_ps_mask((A), (B), (P), _MM_FROUND_CUR_DIRECTION) 3425 #define _mm512_mask_cmp_ps_mask(U, A, B, P) \ 3426 _mm512_mask_cmp_round_ps_mask((U), (A), (B), (P), _MM_FROUND_CUR_DIRECTION) 3427 3428 #define _mm512_cmpeq_ps_mask(A, B) \ 3429 _mm512_cmp_ps_mask((A), (B), _CMP_EQ_OQ) 3430 #define _mm512_mask_cmpeq_ps_mask(k, A, B) \ 3431 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_EQ_OQ) 3432 3433 #define _mm512_cmplt_ps_mask(A, B) \ 3434 _mm512_cmp_ps_mask((A), (B), _CMP_LT_OS) 3435 #define _mm512_mask_cmplt_ps_mask(k, A, B) \ 3436 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_LT_OS) 3437 3438 #define _mm512_cmple_ps_mask(A, B) \ 3439 _mm512_cmp_ps_mask((A), (B), _CMP_LE_OS) 3440 #define _mm512_mask_cmple_ps_mask(k, A, B) \ 3441 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_LE_OS) 3442 3443 #define _mm512_cmpunord_ps_mask(A, B) \ 3444 _mm512_cmp_ps_mask((A), (B), _CMP_UNORD_Q) 3445 #define _mm512_mask_cmpunord_ps_mask(k, A, B) \ 3446 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_UNORD_Q) 3447 3448 #define _mm512_cmpneq_ps_mask(A, B) \ 3449 _mm512_cmp_ps_mask((A), (B), _CMP_NEQ_UQ) 3450 #define _mm512_mask_cmpneq_ps_mask(k, A, B) \ 3451 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NEQ_UQ) 3452 3453 #define _mm512_cmpnlt_ps_mask(A, B) \ 3454 _mm512_cmp_ps_mask((A), (B), _CMP_NLT_US) 3455 #define _mm512_mask_cmpnlt_ps_mask(k, A, B) \ 3456 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NLT_US) 3457 3458 #define _mm512_cmpnle_ps_mask(A, B) \ 3459 _mm512_cmp_ps_mask((A), (B), _CMP_NLE_US) 3460 #define _mm512_mask_cmpnle_ps_mask(k, A, B) \ 3461 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_NLE_US) 3462 3463 #define _mm512_cmpord_ps_mask(A, B) \ 3464 _mm512_cmp_ps_mask((A), (B), _CMP_ORD_Q) 3465 #define _mm512_mask_cmpord_ps_mask(k, A, B) \ 3466 _mm512_mask_cmp_ps_mask((k), (A), (B), _CMP_ORD_Q) 3467 3468 #define _mm512_cmp_round_pd_mask(A, B, P, R) \ 3469 ((__mmask8)__builtin_ia32_cmppd512_mask((__v8df)(__m512d)(A), \ 3470 (__v8df)(__m512d)(B), (int)(P), \ 3471 (__mmask8)-1, (int)(R))) 3472 3473 #define _mm512_mask_cmp_round_pd_mask(U, A, B, P, R) \ 3474 ((__mmask8)__builtin_ia32_cmppd512_mask((__v8df)(__m512d)(A), \ 3475 (__v8df)(__m512d)(B), (int)(P), \ 3476 (__mmask8)(U), (int)(R))) 3477 3478 #define _mm512_cmp_pd_mask(A, B, P) \ 3479 _mm512_cmp_round_pd_mask((A), (B), (P), _MM_FROUND_CUR_DIRECTION) 3480 #define _mm512_mask_cmp_pd_mask(U, A, B, P) \ 3481 _mm512_mask_cmp_round_pd_mask((U), (A), (B), (P), _MM_FROUND_CUR_DIRECTION) 3482 3483 #define _mm512_cmpeq_pd_mask(A, B) \ 3484 _mm512_cmp_pd_mask((A), (B), _CMP_EQ_OQ) 3485 #define _mm512_mask_cmpeq_pd_mask(k, A, B) \ 3486 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_EQ_OQ) 3487 3488 #define _mm512_cmplt_pd_mask(A, B) \ 3489 _mm512_cmp_pd_mask((A), (B), _CMP_LT_OS) 3490 #define _mm512_mask_cmplt_pd_mask(k, A, B) \ 3491 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_LT_OS) 3492 3493 #define _mm512_cmple_pd_mask(A, B) \ 3494 _mm512_cmp_pd_mask((A), (B), _CMP_LE_OS) 3495 #define _mm512_mask_cmple_pd_mask(k, A, B) \ 3496 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_LE_OS) 3497 3498 #define _mm512_cmpunord_pd_mask(A, B) \ 3499 _mm512_cmp_pd_mask((A), (B), _CMP_UNORD_Q) 3500 #define _mm512_mask_cmpunord_pd_mask(k, A, B) \ 3501 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_UNORD_Q) 3502 3503 #define _mm512_cmpneq_pd_mask(A, B) \ 3504 _mm512_cmp_pd_mask((A), (B), _CMP_NEQ_UQ) 3505 #define _mm512_mask_cmpneq_pd_mask(k, A, B) \ 3506 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NEQ_UQ) 3507 3508 #define _mm512_cmpnlt_pd_mask(A, B) \ 3509 _mm512_cmp_pd_mask((A), (B), _CMP_NLT_US) 3510 #define _mm512_mask_cmpnlt_pd_mask(k, A, B) \ 3511 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NLT_US) 3512 3513 #define _mm512_cmpnle_pd_mask(A, B) \ 3514 _mm512_cmp_pd_mask((A), (B), _CMP_NLE_US) 3515 #define _mm512_mask_cmpnle_pd_mask(k, A, B) \ 3516 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_NLE_US) 3517 3518 #define _mm512_cmpord_pd_mask(A, B) \ 3519 _mm512_cmp_pd_mask((A), (B), _CMP_ORD_Q) 3520 #define _mm512_mask_cmpord_pd_mask(k, A, B) \ 3521 _mm512_mask_cmp_pd_mask((k), (A), (B), _CMP_ORD_Q) 3522 3523 /* Conversion */ 3524 3525 #define _mm512_cvtt_roundps_epu32(A, R) \ 3526 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \ 3527 (__v16si)_mm512_undefined_epi32(), \ 3528 (__mmask16)-1, (int)(R))) 3529 3530 #define _mm512_mask_cvtt_roundps_epu32(W, U, A, R) \ 3531 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \ 3532 (__v16si)(__m512i)(W), \ 3533 (__mmask16)(U), (int)(R))) 3534 3535 #define _mm512_maskz_cvtt_roundps_epu32(U, A, R) \ 3536 ((__m512i)__builtin_ia32_cvttps2udq512_mask((__v16sf)(__m512)(A), \ 3537 (__v16si)_mm512_setzero_si512(), \ 3538 (__mmask16)(U), (int)(R))) 3539 3540 3541 static __inline __m512i __DEFAULT_FN_ATTRS512 3542 _mm512_cvttps_epu32(__m512 __A) 3543 { 3544 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A, 3545 (__v16si) 3546 _mm512_setzero_si512 (), 3547 (__mmask16) -1, 3548 _MM_FROUND_CUR_DIRECTION); 3549 } 3550 3551 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3552 _mm512_mask_cvttps_epu32 (__m512i __W, __mmask16 __U, __m512 __A) 3553 { 3554 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A, 3555 (__v16si) __W, 3556 (__mmask16) __U, 3557 _MM_FROUND_CUR_DIRECTION); 3558 } 3559 3560 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3561 _mm512_maskz_cvttps_epu32 (__mmask16 __U, __m512 __A) 3562 { 3563 return (__m512i) __builtin_ia32_cvttps2udq512_mask ((__v16sf) __A, 3564 (__v16si) _mm512_setzero_si512 (), 3565 (__mmask16) __U, 3566 _MM_FROUND_CUR_DIRECTION); 3567 } 3568 3569 #define _mm512_cvt_roundepi32_ps(A, R) \ 3570 ((__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \ 3571 (__v16sf)_mm512_setzero_ps(), \ 3572 (__mmask16)-1, (int)(R))) 3573 3574 #define _mm512_mask_cvt_roundepi32_ps(W, U, A, R) \ 3575 ((__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \ 3576 (__v16sf)(__m512)(W), \ 3577 (__mmask16)(U), (int)(R))) 3578 3579 #define _mm512_maskz_cvt_roundepi32_ps(U, A, R) \ 3580 ((__m512)__builtin_ia32_cvtdq2ps512_mask((__v16si)(__m512i)(A), \ 3581 (__v16sf)_mm512_setzero_ps(), \ 3582 (__mmask16)(U), (int)(R))) 3583 3584 #define _mm512_cvt_roundepu32_ps(A, R) \ 3585 ((__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \ 3586 (__v16sf)_mm512_setzero_ps(), \ 3587 (__mmask16)-1, (int)(R))) 3588 3589 #define _mm512_mask_cvt_roundepu32_ps(W, U, A, R) \ 3590 ((__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \ 3591 (__v16sf)(__m512)(W), \ 3592 (__mmask16)(U), (int)(R))) 3593 3594 #define _mm512_maskz_cvt_roundepu32_ps(U, A, R) \ 3595 ((__m512)__builtin_ia32_cvtudq2ps512_mask((__v16si)(__m512i)(A), \ 3596 (__v16sf)_mm512_setzero_ps(), \ 3597 (__mmask16)(U), (int)(R))) 3598 3599 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3600 _mm512_cvtepu32_ps (__m512i __A) 3601 { 3602 return (__m512)__builtin_convertvector((__v16su)__A, __v16sf); 3603 } 3604 3605 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3606 _mm512_mask_cvtepu32_ps (__m512 __W, __mmask16 __U, __m512i __A) 3607 { 3608 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 3609 (__v16sf)_mm512_cvtepu32_ps(__A), 3610 (__v16sf)__W); 3611 } 3612 3613 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3614 _mm512_maskz_cvtepu32_ps (__mmask16 __U, __m512i __A) 3615 { 3616 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 3617 (__v16sf)_mm512_cvtepu32_ps(__A), 3618 (__v16sf)_mm512_setzero_ps()); 3619 } 3620 3621 static __inline __m512d __DEFAULT_FN_ATTRS512 3622 _mm512_cvtepi32_pd(__m256i __A) 3623 { 3624 return (__m512d)__builtin_convertvector((__v8si)__A, __v8df); 3625 } 3626 3627 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3628 _mm512_mask_cvtepi32_pd (__m512d __W, __mmask8 __U, __m256i __A) 3629 { 3630 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 3631 (__v8df)_mm512_cvtepi32_pd(__A), 3632 (__v8df)__W); 3633 } 3634 3635 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3636 _mm512_maskz_cvtepi32_pd (__mmask8 __U, __m256i __A) 3637 { 3638 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 3639 (__v8df)_mm512_cvtepi32_pd(__A), 3640 (__v8df)_mm512_setzero_pd()); 3641 } 3642 3643 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3644 _mm512_cvtepi32lo_pd(__m512i __A) 3645 { 3646 return (__m512d) _mm512_cvtepi32_pd(_mm512_castsi512_si256(__A)); 3647 } 3648 3649 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3650 _mm512_mask_cvtepi32lo_pd(__m512d __W, __mmask8 __U,__m512i __A) 3651 { 3652 return (__m512d) _mm512_mask_cvtepi32_pd(__W, __U, _mm512_castsi512_si256(__A)); 3653 } 3654 3655 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3656 _mm512_cvtepi32_ps (__m512i __A) 3657 { 3658 return (__m512)__builtin_convertvector((__v16si)__A, __v16sf); 3659 } 3660 3661 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3662 _mm512_mask_cvtepi32_ps (__m512 __W, __mmask16 __U, __m512i __A) 3663 { 3664 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 3665 (__v16sf)_mm512_cvtepi32_ps(__A), 3666 (__v16sf)__W); 3667 } 3668 3669 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3670 _mm512_maskz_cvtepi32_ps (__mmask16 __U, __m512i __A) 3671 { 3672 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 3673 (__v16sf)_mm512_cvtepi32_ps(__A), 3674 (__v16sf)_mm512_setzero_ps()); 3675 } 3676 3677 static __inline __m512d __DEFAULT_FN_ATTRS512 3678 _mm512_cvtepu32_pd(__m256i __A) 3679 { 3680 return (__m512d)__builtin_convertvector((__v8su)__A, __v8df); 3681 } 3682 3683 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3684 _mm512_mask_cvtepu32_pd (__m512d __W, __mmask8 __U, __m256i __A) 3685 { 3686 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 3687 (__v8df)_mm512_cvtepu32_pd(__A), 3688 (__v8df)__W); 3689 } 3690 3691 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3692 _mm512_maskz_cvtepu32_pd (__mmask8 __U, __m256i __A) 3693 { 3694 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 3695 (__v8df)_mm512_cvtepu32_pd(__A), 3696 (__v8df)_mm512_setzero_pd()); 3697 } 3698 3699 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3700 _mm512_cvtepu32lo_pd(__m512i __A) 3701 { 3702 return (__m512d) _mm512_cvtepu32_pd(_mm512_castsi512_si256(__A)); 3703 } 3704 3705 static __inline__ __m512d __DEFAULT_FN_ATTRS512 3706 _mm512_mask_cvtepu32lo_pd(__m512d __W, __mmask8 __U,__m512i __A) 3707 { 3708 return (__m512d) _mm512_mask_cvtepu32_pd(__W, __U, _mm512_castsi512_si256(__A)); 3709 } 3710 3711 #define _mm512_cvt_roundpd_ps(A, R) \ 3712 ((__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \ 3713 (__v8sf)_mm256_setzero_ps(), \ 3714 (__mmask8)-1, (int)(R))) 3715 3716 #define _mm512_mask_cvt_roundpd_ps(W, U, A, R) \ 3717 ((__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \ 3718 (__v8sf)(__m256)(W), (__mmask8)(U), \ 3719 (int)(R))) 3720 3721 #define _mm512_maskz_cvt_roundpd_ps(U, A, R) \ 3722 ((__m256)__builtin_ia32_cvtpd2ps512_mask((__v8df)(__m512d)(A), \ 3723 (__v8sf)_mm256_setzero_ps(), \ 3724 (__mmask8)(U), (int)(R))) 3725 3726 static __inline__ __m256 __DEFAULT_FN_ATTRS512 3727 _mm512_cvtpd_ps (__m512d __A) 3728 { 3729 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, 3730 (__v8sf) _mm256_undefined_ps (), 3731 (__mmask8) -1, 3732 _MM_FROUND_CUR_DIRECTION); 3733 } 3734 3735 static __inline__ __m256 __DEFAULT_FN_ATTRS512 3736 _mm512_mask_cvtpd_ps (__m256 __W, __mmask8 __U, __m512d __A) 3737 { 3738 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, 3739 (__v8sf) __W, 3740 (__mmask8) __U, 3741 _MM_FROUND_CUR_DIRECTION); 3742 } 3743 3744 static __inline__ __m256 __DEFAULT_FN_ATTRS512 3745 _mm512_maskz_cvtpd_ps (__mmask8 __U, __m512d __A) 3746 { 3747 return (__m256) __builtin_ia32_cvtpd2ps512_mask ((__v8df) __A, 3748 (__v8sf) _mm256_setzero_ps (), 3749 (__mmask8) __U, 3750 _MM_FROUND_CUR_DIRECTION); 3751 } 3752 3753 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3754 _mm512_cvtpd_pslo (__m512d __A) 3755 { 3756 return (__m512) __builtin_shufflevector((__v8sf) _mm512_cvtpd_ps(__A), 3757 (__v8sf) _mm256_setzero_ps (), 3758 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); 3759 } 3760 3761 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3762 _mm512_mask_cvtpd_pslo (__m512 __W, __mmask8 __U,__m512d __A) 3763 { 3764 return (__m512) __builtin_shufflevector ( 3765 (__v8sf) _mm512_mask_cvtpd_ps (_mm512_castps512_ps256(__W), 3766 __U, __A), 3767 (__v8sf) _mm256_setzero_ps (), 3768 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); 3769 } 3770 3771 #define _mm512_cvt_roundps_ph(A, I) \ 3772 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \ 3773 (__v16hi)_mm256_undefined_si256(), \ 3774 (__mmask16)-1)) 3775 3776 #define _mm512_mask_cvt_roundps_ph(U, W, A, I) \ 3777 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \ 3778 (__v16hi)(__m256i)(U), \ 3779 (__mmask16)(W))) 3780 3781 #define _mm512_maskz_cvt_roundps_ph(W, A, I) \ 3782 ((__m256i)__builtin_ia32_vcvtps2ph512_mask((__v16sf)(__m512)(A), (int)(I), \ 3783 (__v16hi)_mm256_setzero_si256(), \ 3784 (__mmask16)(W))) 3785 3786 #define _mm512_cvtps_ph _mm512_cvt_roundps_ph 3787 #define _mm512_mask_cvtps_ph _mm512_mask_cvt_roundps_ph 3788 #define _mm512_maskz_cvtps_ph _mm512_maskz_cvt_roundps_ph 3789 3790 #define _mm512_cvt_roundph_ps(A, R) \ 3791 ((__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \ 3792 (__v16sf)_mm512_undefined_ps(), \ 3793 (__mmask16)-1, (int)(R))) 3794 3795 #define _mm512_mask_cvt_roundph_ps(W, U, A, R) \ 3796 ((__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \ 3797 (__v16sf)(__m512)(W), \ 3798 (__mmask16)(U), (int)(R))) 3799 3800 #define _mm512_maskz_cvt_roundph_ps(U, A, R) \ 3801 ((__m512)__builtin_ia32_vcvtph2ps512_mask((__v16hi)(__m256i)(A), \ 3802 (__v16sf)_mm512_setzero_ps(), \ 3803 (__mmask16)(U), (int)(R))) 3804 3805 3806 static __inline __m512 __DEFAULT_FN_ATTRS512 3807 _mm512_cvtph_ps(__m256i __A) 3808 { 3809 return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A, 3810 (__v16sf) 3811 _mm512_setzero_ps (), 3812 (__mmask16) -1, 3813 _MM_FROUND_CUR_DIRECTION); 3814 } 3815 3816 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3817 _mm512_mask_cvtph_ps (__m512 __W, __mmask16 __U, __m256i __A) 3818 { 3819 return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A, 3820 (__v16sf) __W, 3821 (__mmask16) __U, 3822 _MM_FROUND_CUR_DIRECTION); 3823 } 3824 3825 static __inline__ __m512 __DEFAULT_FN_ATTRS512 3826 _mm512_maskz_cvtph_ps (__mmask16 __U, __m256i __A) 3827 { 3828 return (__m512) __builtin_ia32_vcvtph2ps512_mask ((__v16hi) __A, 3829 (__v16sf) _mm512_setzero_ps (), 3830 (__mmask16) __U, 3831 _MM_FROUND_CUR_DIRECTION); 3832 } 3833 3834 #define _mm512_cvtt_roundpd_epi32(A, R) \ 3835 ((__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \ 3836 (__v8si)_mm256_setzero_si256(), \ 3837 (__mmask8)-1, (int)(R))) 3838 3839 #define _mm512_mask_cvtt_roundpd_epi32(W, U, A, R) \ 3840 ((__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \ 3841 (__v8si)(__m256i)(W), \ 3842 (__mmask8)(U), (int)(R))) 3843 3844 #define _mm512_maskz_cvtt_roundpd_epi32(U, A, R) \ 3845 ((__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df)(__m512d)(A), \ 3846 (__v8si)_mm256_setzero_si256(), \ 3847 (__mmask8)(U), (int)(R))) 3848 3849 static __inline __m256i __DEFAULT_FN_ATTRS512 3850 _mm512_cvttpd_epi32(__m512d __a) 3851 { 3852 return (__m256i)__builtin_ia32_cvttpd2dq512_mask((__v8df) __a, 3853 (__v8si)_mm256_setzero_si256(), 3854 (__mmask8) -1, 3855 _MM_FROUND_CUR_DIRECTION); 3856 } 3857 3858 static __inline__ __m256i __DEFAULT_FN_ATTRS512 3859 _mm512_mask_cvttpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A) 3860 { 3861 return (__m256i) __builtin_ia32_cvttpd2dq512_mask ((__v8df) __A, 3862 (__v8si) __W, 3863 (__mmask8) __U, 3864 _MM_FROUND_CUR_DIRECTION); 3865 } 3866 3867 static __inline__ __m256i __DEFAULT_FN_ATTRS512 3868 _mm512_maskz_cvttpd_epi32 (__mmask8 __U, __m512d __A) 3869 { 3870 return (__m256i) __builtin_ia32_cvttpd2dq512_mask ((__v8df) __A, 3871 (__v8si) _mm256_setzero_si256 (), 3872 (__mmask8) __U, 3873 _MM_FROUND_CUR_DIRECTION); 3874 } 3875 3876 #define _mm512_cvtt_roundps_epi32(A, R) \ 3877 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \ 3878 (__v16si)_mm512_setzero_si512(), \ 3879 (__mmask16)-1, (int)(R))) 3880 3881 #define _mm512_mask_cvtt_roundps_epi32(W, U, A, R) \ 3882 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \ 3883 (__v16si)(__m512i)(W), \ 3884 (__mmask16)(U), (int)(R))) 3885 3886 #define _mm512_maskz_cvtt_roundps_epi32(U, A, R) \ 3887 ((__m512i)__builtin_ia32_cvttps2dq512_mask((__v16sf)(__m512)(A), \ 3888 (__v16si)_mm512_setzero_si512(), \ 3889 (__mmask16)(U), (int)(R))) 3890 3891 static __inline __m512i __DEFAULT_FN_ATTRS512 3892 _mm512_cvttps_epi32(__m512 __a) 3893 { 3894 return (__m512i) 3895 __builtin_ia32_cvttps2dq512_mask((__v16sf) __a, 3896 (__v16si) _mm512_setzero_si512 (), 3897 (__mmask16) -1, _MM_FROUND_CUR_DIRECTION); 3898 } 3899 3900 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3901 _mm512_mask_cvttps_epi32 (__m512i __W, __mmask16 __U, __m512 __A) 3902 { 3903 return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A, 3904 (__v16si) __W, 3905 (__mmask16) __U, 3906 _MM_FROUND_CUR_DIRECTION); 3907 } 3908 3909 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3910 _mm512_maskz_cvttps_epi32 (__mmask16 __U, __m512 __A) 3911 { 3912 return (__m512i) __builtin_ia32_cvttps2dq512_mask ((__v16sf) __A, 3913 (__v16si) _mm512_setzero_si512 (), 3914 (__mmask16) __U, 3915 _MM_FROUND_CUR_DIRECTION); 3916 } 3917 3918 #define _mm512_cvt_roundps_epi32(A, R) \ 3919 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \ 3920 (__v16si)_mm512_setzero_si512(), \ 3921 (__mmask16)-1, (int)(R))) 3922 3923 #define _mm512_mask_cvt_roundps_epi32(W, U, A, R) \ 3924 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \ 3925 (__v16si)(__m512i)(W), \ 3926 (__mmask16)(U), (int)(R))) 3927 3928 #define _mm512_maskz_cvt_roundps_epi32(U, A, R) \ 3929 ((__m512i)__builtin_ia32_cvtps2dq512_mask((__v16sf)(__m512)(A), \ 3930 (__v16si)_mm512_setzero_si512(), \ 3931 (__mmask16)(U), (int)(R))) 3932 3933 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3934 _mm512_cvtps_epi32 (__m512 __A) 3935 { 3936 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A, 3937 (__v16si) _mm512_undefined_epi32 (), 3938 (__mmask16) -1, 3939 _MM_FROUND_CUR_DIRECTION); 3940 } 3941 3942 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3943 _mm512_mask_cvtps_epi32 (__m512i __W, __mmask16 __U, __m512 __A) 3944 { 3945 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A, 3946 (__v16si) __W, 3947 (__mmask16) __U, 3948 _MM_FROUND_CUR_DIRECTION); 3949 } 3950 3951 static __inline__ __m512i __DEFAULT_FN_ATTRS512 3952 _mm512_maskz_cvtps_epi32 (__mmask16 __U, __m512 __A) 3953 { 3954 return (__m512i) __builtin_ia32_cvtps2dq512_mask ((__v16sf) __A, 3955 (__v16si) 3956 _mm512_setzero_si512 (), 3957 (__mmask16) __U, 3958 _MM_FROUND_CUR_DIRECTION); 3959 } 3960 3961 #define _mm512_cvt_roundpd_epi32(A, R) \ 3962 ((__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \ 3963 (__v8si)_mm256_setzero_si256(), \ 3964 (__mmask8)-1, (int)(R))) 3965 3966 #define _mm512_mask_cvt_roundpd_epi32(W, U, A, R) \ 3967 ((__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \ 3968 (__v8si)(__m256i)(W), \ 3969 (__mmask8)(U), (int)(R))) 3970 3971 #define _mm512_maskz_cvt_roundpd_epi32(U, A, R) \ 3972 ((__m256i)__builtin_ia32_cvtpd2dq512_mask((__v8df)(__m512d)(A), \ 3973 (__v8si)_mm256_setzero_si256(), \ 3974 (__mmask8)(U), (int)(R))) 3975 3976 static __inline__ __m256i __DEFAULT_FN_ATTRS512 3977 _mm512_cvtpd_epi32 (__m512d __A) 3978 { 3979 return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A, 3980 (__v8si) 3981 _mm256_undefined_si256 (), 3982 (__mmask8) -1, 3983 _MM_FROUND_CUR_DIRECTION); 3984 } 3985 3986 static __inline__ __m256i __DEFAULT_FN_ATTRS512 3987 _mm512_mask_cvtpd_epi32 (__m256i __W, __mmask8 __U, __m512d __A) 3988 { 3989 return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A, 3990 (__v8si) __W, 3991 (__mmask8) __U, 3992 _MM_FROUND_CUR_DIRECTION); 3993 } 3994 3995 static __inline__ __m256i __DEFAULT_FN_ATTRS512 3996 _mm512_maskz_cvtpd_epi32 (__mmask8 __U, __m512d __A) 3997 { 3998 return (__m256i) __builtin_ia32_cvtpd2dq512_mask ((__v8df) __A, 3999 (__v8si) 4000 _mm256_setzero_si256 (), 4001 (__mmask8) __U, 4002 _MM_FROUND_CUR_DIRECTION); 4003 } 4004 4005 #define _mm512_cvt_roundps_epu32(A, R) \ 4006 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \ 4007 (__v16si)_mm512_setzero_si512(), \ 4008 (__mmask16)-1, (int)(R))) 4009 4010 #define _mm512_mask_cvt_roundps_epu32(W, U, A, R) \ 4011 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \ 4012 (__v16si)(__m512i)(W), \ 4013 (__mmask16)(U), (int)(R))) 4014 4015 #define _mm512_maskz_cvt_roundps_epu32(U, A, R) \ 4016 ((__m512i)__builtin_ia32_cvtps2udq512_mask((__v16sf)(__m512)(A), \ 4017 (__v16si)_mm512_setzero_si512(), \ 4018 (__mmask16)(U), (int)(R))) 4019 4020 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4021 _mm512_cvtps_epu32 ( __m512 __A) 4022 { 4023 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A,\ 4024 (__v16si)\ 4025 _mm512_undefined_epi32 (), 4026 (__mmask16) -1,\ 4027 _MM_FROUND_CUR_DIRECTION); 4028 } 4029 4030 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4031 _mm512_mask_cvtps_epu32 (__m512i __W, __mmask16 __U, __m512 __A) 4032 { 4033 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A, 4034 (__v16si) __W, 4035 (__mmask16) __U, 4036 _MM_FROUND_CUR_DIRECTION); 4037 } 4038 4039 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4040 _mm512_maskz_cvtps_epu32 ( __mmask16 __U, __m512 __A) 4041 { 4042 return (__m512i) __builtin_ia32_cvtps2udq512_mask ((__v16sf) __A, 4043 (__v16si) 4044 _mm512_setzero_si512 (), 4045 (__mmask16) __U , 4046 _MM_FROUND_CUR_DIRECTION); 4047 } 4048 4049 #define _mm512_cvt_roundpd_epu32(A, R) \ 4050 ((__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \ 4051 (__v8si)_mm256_setzero_si256(), \ 4052 (__mmask8)-1, (int)(R))) 4053 4054 #define _mm512_mask_cvt_roundpd_epu32(W, U, A, R) \ 4055 ((__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \ 4056 (__v8si)(__m256i)(W), \ 4057 (__mmask8)(U), (int)(R))) 4058 4059 #define _mm512_maskz_cvt_roundpd_epu32(U, A, R) \ 4060 ((__m256i)__builtin_ia32_cvtpd2udq512_mask((__v8df)(__m512d)(A), \ 4061 (__v8si)_mm256_setzero_si256(), \ 4062 (__mmask8)(U), (int)(R))) 4063 4064 static __inline__ __m256i __DEFAULT_FN_ATTRS512 4065 _mm512_cvtpd_epu32 (__m512d __A) 4066 { 4067 return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A, 4068 (__v8si) 4069 _mm256_undefined_si256 (), 4070 (__mmask8) -1, 4071 _MM_FROUND_CUR_DIRECTION); 4072 } 4073 4074 static __inline__ __m256i __DEFAULT_FN_ATTRS512 4075 _mm512_mask_cvtpd_epu32 (__m256i __W, __mmask8 __U, __m512d __A) 4076 { 4077 return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A, 4078 (__v8si) __W, 4079 (__mmask8) __U, 4080 _MM_FROUND_CUR_DIRECTION); 4081 } 4082 4083 static __inline__ __m256i __DEFAULT_FN_ATTRS512 4084 _mm512_maskz_cvtpd_epu32 (__mmask8 __U, __m512d __A) 4085 { 4086 return (__m256i) __builtin_ia32_cvtpd2udq512_mask ((__v8df) __A, 4087 (__v8si) 4088 _mm256_setzero_si256 (), 4089 (__mmask8) __U, 4090 _MM_FROUND_CUR_DIRECTION); 4091 } 4092 4093 static __inline__ double __DEFAULT_FN_ATTRS512 4094 _mm512_cvtsd_f64(__m512d __a) 4095 { 4096 return __a[0]; 4097 } 4098 4099 static __inline__ float __DEFAULT_FN_ATTRS512 4100 _mm512_cvtss_f32(__m512 __a) 4101 { 4102 return __a[0]; 4103 } 4104 4105 /* Unpack and Interleave */ 4106 4107 static __inline __m512d __DEFAULT_FN_ATTRS512 4108 _mm512_unpackhi_pd(__m512d __a, __m512d __b) 4109 { 4110 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b, 4111 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6); 4112 } 4113 4114 static __inline__ __m512d __DEFAULT_FN_ATTRS512 4115 _mm512_mask_unpackhi_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) 4116 { 4117 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 4118 (__v8df)_mm512_unpackhi_pd(__A, __B), 4119 (__v8df)__W); 4120 } 4121 4122 static __inline__ __m512d __DEFAULT_FN_ATTRS512 4123 _mm512_maskz_unpackhi_pd(__mmask8 __U, __m512d __A, __m512d __B) 4124 { 4125 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 4126 (__v8df)_mm512_unpackhi_pd(__A, __B), 4127 (__v8df)_mm512_setzero_pd()); 4128 } 4129 4130 static __inline __m512d __DEFAULT_FN_ATTRS512 4131 _mm512_unpacklo_pd(__m512d __a, __m512d __b) 4132 { 4133 return (__m512d)__builtin_shufflevector((__v8df)__a, (__v8df)__b, 4134 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6); 4135 } 4136 4137 static __inline__ __m512d __DEFAULT_FN_ATTRS512 4138 _mm512_mask_unpacklo_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) 4139 { 4140 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 4141 (__v8df)_mm512_unpacklo_pd(__A, __B), 4142 (__v8df)__W); 4143 } 4144 4145 static __inline__ __m512d __DEFAULT_FN_ATTRS512 4146 _mm512_maskz_unpacklo_pd (__mmask8 __U, __m512d __A, __m512d __B) 4147 { 4148 return (__m512d)__builtin_ia32_selectpd_512((__mmask8) __U, 4149 (__v8df)_mm512_unpacklo_pd(__A, __B), 4150 (__v8df)_mm512_setzero_pd()); 4151 } 4152 4153 static __inline __m512 __DEFAULT_FN_ATTRS512 4154 _mm512_unpackhi_ps(__m512 __a, __m512 __b) 4155 { 4156 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b, 4157 2, 18, 3, 19, 4158 2+4, 18+4, 3+4, 19+4, 4159 2+8, 18+8, 3+8, 19+8, 4160 2+12, 18+12, 3+12, 19+12); 4161 } 4162 4163 static __inline__ __m512 __DEFAULT_FN_ATTRS512 4164 _mm512_mask_unpackhi_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) 4165 { 4166 return (__m512)__builtin_ia32_selectps_512((__mmask16) __U, 4167 (__v16sf)_mm512_unpackhi_ps(__A, __B), 4168 (__v16sf)__W); 4169 } 4170 4171 static __inline__ __m512 __DEFAULT_FN_ATTRS512 4172 _mm512_maskz_unpackhi_ps (__mmask16 __U, __m512 __A, __m512 __B) 4173 { 4174 return (__m512)__builtin_ia32_selectps_512((__mmask16) __U, 4175 (__v16sf)_mm512_unpackhi_ps(__A, __B), 4176 (__v16sf)_mm512_setzero_ps()); 4177 } 4178 4179 static __inline __m512 __DEFAULT_FN_ATTRS512 4180 _mm512_unpacklo_ps(__m512 __a, __m512 __b) 4181 { 4182 return (__m512)__builtin_shufflevector((__v16sf)__a, (__v16sf)__b, 4183 0, 16, 1, 17, 4184 0+4, 16+4, 1+4, 17+4, 4185 0+8, 16+8, 1+8, 17+8, 4186 0+12, 16+12, 1+12, 17+12); 4187 } 4188 4189 static __inline__ __m512 __DEFAULT_FN_ATTRS512 4190 _mm512_mask_unpacklo_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) 4191 { 4192 return (__m512)__builtin_ia32_selectps_512((__mmask16) __U, 4193 (__v16sf)_mm512_unpacklo_ps(__A, __B), 4194 (__v16sf)__W); 4195 } 4196 4197 static __inline__ __m512 __DEFAULT_FN_ATTRS512 4198 _mm512_maskz_unpacklo_ps (__mmask16 __U, __m512 __A, __m512 __B) 4199 { 4200 return (__m512)__builtin_ia32_selectps_512((__mmask16) __U, 4201 (__v16sf)_mm512_unpacklo_ps(__A, __B), 4202 (__v16sf)_mm512_setzero_ps()); 4203 } 4204 4205 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4206 _mm512_unpackhi_epi32(__m512i __A, __m512i __B) 4207 { 4208 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, 4209 2, 18, 3, 19, 4210 2+4, 18+4, 3+4, 19+4, 4211 2+8, 18+8, 3+8, 19+8, 4212 2+12, 18+12, 3+12, 19+12); 4213 } 4214 4215 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4216 _mm512_mask_unpackhi_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 4217 { 4218 return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U, 4219 (__v16si)_mm512_unpackhi_epi32(__A, __B), 4220 (__v16si)__W); 4221 } 4222 4223 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4224 _mm512_maskz_unpackhi_epi32(__mmask16 __U, __m512i __A, __m512i __B) 4225 { 4226 return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U, 4227 (__v16si)_mm512_unpackhi_epi32(__A, __B), 4228 (__v16si)_mm512_setzero_si512()); 4229 } 4230 4231 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4232 _mm512_unpacklo_epi32(__m512i __A, __m512i __B) 4233 { 4234 return (__m512i)__builtin_shufflevector((__v16si)__A, (__v16si)__B, 4235 0, 16, 1, 17, 4236 0+4, 16+4, 1+4, 17+4, 4237 0+8, 16+8, 1+8, 17+8, 4238 0+12, 16+12, 1+12, 17+12); 4239 } 4240 4241 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4242 _mm512_mask_unpacklo_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 4243 { 4244 return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U, 4245 (__v16si)_mm512_unpacklo_epi32(__A, __B), 4246 (__v16si)__W); 4247 } 4248 4249 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4250 _mm512_maskz_unpacklo_epi32(__mmask16 __U, __m512i __A, __m512i __B) 4251 { 4252 return (__m512i)__builtin_ia32_selectd_512((__mmask16) __U, 4253 (__v16si)_mm512_unpacklo_epi32(__A, __B), 4254 (__v16si)_mm512_setzero_si512()); 4255 } 4256 4257 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4258 _mm512_unpackhi_epi64(__m512i __A, __m512i __B) 4259 { 4260 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, 4261 1, 9, 1+2, 9+2, 1+4, 9+4, 1+6, 9+6); 4262 } 4263 4264 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4265 _mm512_mask_unpackhi_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 4266 { 4267 return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U, 4268 (__v8di)_mm512_unpackhi_epi64(__A, __B), 4269 (__v8di)__W); 4270 } 4271 4272 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4273 _mm512_maskz_unpackhi_epi64(__mmask8 __U, __m512i __A, __m512i __B) 4274 { 4275 return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U, 4276 (__v8di)_mm512_unpackhi_epi64(__A, __B), 4277 (__v8di)_mm512_setzero_si512()); 4278 } 4279 4280 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4281 _mm512_unpacklo_epi64 (__m512i __A, __m512i __B) 4282 { 4283 return (__m512i)__builtin_shufflevector((__v8di)__A, (__v8di)__B, 4284 0, 8, 0+2, 8+2, 0+4, 8+4, 0+6, 8+6); 4285 } 4286 4287 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4288 _mm512_mask_unpacklo_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 4289 { 4290 return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U, 4291 (__v8di)_mm512_unpacklo_epi64(__A, __B), 4292 (__v8di)__W); 4293 } 4294 4295 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4296 _mm512_maskz_unpacklo_epi64 (__mmask8 __U, __m512i __A, __m512i __B) 4297 { 4298 return (__m512i)__builtin_ia32_selectq_512((__mmask8) __U, 4299 (__v8di)_mm512_unpacklo_epi64(__A, __B), 4300 (__v8di)_mm512_setzero_si512()); 4301 } 4302 4303 4304 /* SIMD load ops */ 4305 4306 static __inline __m512i __DEFAULT_FN_ATTRS512 4307 _mm512_loadu_si512 (void const *__P) 4308 { 4309 struct __loadu_si512 { 4310 __m512i_u __v; 4311 } __attribute__((__packed__, __may_alias__)); 4312 return ((const struct __loadu_si512*)__P)->__v; 4313 } 4314 4315 static __inline __m512i __DEFAULT_FN_ATTRS512 4316 _mm512_loadu_epi32 (void const *__P) 4317 { 4318 struct __loadu_epi32 { 4319 __m512i_u __v; 4320 } __attribute__((__packed__, __may_alias__)); 4321 return ((const struct __loadu_epi32*)__P)->__v; 4322 } 4323 4324 static __inline __m512i __DEFAULT_FN_ATTRS512 4325 _mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void const *__P) 4326 { 4327 return (__m512i) __builtin_ia32_loaddqusi512_mask ((const int *) __P, 4328 (__v16si) __W, 4329 (__mmask16) __U); 4330 } 4331 4332 4333 static __inline __m512i __DEFAULT_FN_ATTRS512 4334 _mm512_maskz_loadu_epi32(__mmask16 __U, void const *__P) 4335 { 4336 return (__m512i) __builtin_ia32_loaddqusi512_mask ((const int *)__P, 4337 (__v16si) 4338 _mm512_setzero_si512 (), 4339 (__mmask16) __U); 4340 } 4341 4342 static __inline __m512i __DEFAULT_FN_ATTRS512 4343 _mm512_loadu_epi64 (void const *__P) 4344 { 4345 struct __loadu_epi64 { 4346 __m512i_u __v; 4347 } __attribute__((__packed__, __may_alias__)); 4348 return ((const struct __loadu_epi64*)__P)->__v; 4349 } 4350 4351 static __inline __m512i __DEFAULT_FN_ATTRS512 4352 _mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void const *__P) 4353 { 4354 return (__m512i) __builtin_ia32_loaddqudi512_mask ((const long long *) __P, 4355 (__v8di) __W, 4356 (__mmask8) __U); 4357 } 4358 4359 static __inline __m512i __DEFAULT_FN_ATTRS512 4360 _mm512_maskz_loadu_epi64(__mmask8 __U, void const *__P) 4361 { 4362 return (__m512i) __builtin_ia32_loaddqudi512_mask ((const long long *)__P, 4363 (__v8di) 4364 _mm512_setzero_si512 (), 4365 (__mmask8) __U); 4366 } 4367 4368 static __inline __m512 __DEFAULT_FN_ATTRS512 4369 _mm512_mask_loadu_ps (__m512 __W, __mmask16 __U, void const *__P) 4370 { 4371 return (__m512) __builtin_ia32_loadups512_mask ((const float *) __P, 4372 (__v16sf) __W, 4373 (__mmask16) __U); 4374 } 4375 4376 static __inline __m512 __DEFAULT_FN_ATTRS512 4377 _mm512_maskz_loadu_ps(__mmask16 __U, void const *__P) 4378 { 4379 return (__m512) __builtin_ia32_loadups512_mask ((const float *)__P, 4380 (__v16sf) 4381 _mm512_setzero_ps (), 4382 (__mmask16) __U); 4383 } 4384 4385 static __inline __m512d __DEFAULT_FN_ATTRS512 4386 _mm512_mask_loadu_pd (__m512d __W, __mmask8 __U, void const *__P) 4387 { 4388 return (__m512d) __builtin_ia32_loadupd512_mask ((const double *) __P, 4389 (__v8df) __W, 4390 (__mmask8) __U); 4391 } 4392 4393 static __inline __m512d __DEFAULT_FN_ATTRS512 4394 _mm512_maskz_loadu_pd(__mmask8 __U, void const *__P) 4395 { 4396 return (__m512d) __builtin_ia32_loadupd512_mask ((const double *)__P, 4397 (__v8df) 4398 _mm512_setzero_pd (), 4399 (__mmask8) __U); 4400 } 4401 4402 static __inline __m512d __DEFAULT_FN_ATTRS512 4403 _mm512_loadu_pd(void const *__p) 4404 { 4405 struct __loadu_pd { 4406 __m512d_u __v; 4407 } __attribute__((__packed__, __may_alias__)); 4408 return ((const struct __loadu_pd*)__p)->__v; 4409 } 4410 4411 static __inline __m512 __DEFAULT_FN_ATTRS512 4412 _mm512_loadu_ps(void const *__p) 4413 { 4414 struct __loadu_ps { 4415 __m512_u __v; 4416 } __attribute__((__packed__, __may_alias__)); 4417 return ((const struct __loadu_ps*)__p)->__v; 4418 } 4419 4420 static __inline __m512 __DEFAULT_FN_ATTRS512 4421 _mm512_load_ps(void const *__p) 4422 { 4423 return *(const __m512*)__p; 4424 } 4425 4426 static __inline __m512 __DEFAULT_FN_ATTRS512 4427 _mm512_mask_load_ps (__m512 __W, __mmask16 __U, void const *__P) 4428 { 4429 return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *) __P, 4430 (__v16sf) __W, 4431 (__mmask16) __U); 4432 } 4433 4434 static __inline __m512 __DEFAULT_FN_ATTRS512 4435 _mm512_maskz_load_ps(__mmask16 __U, void const *__P) 4436 { 4437 return (__m512) __builtin_ia32_loadaps512_mask ((const __v16sf *)__P, 4438 (__v16sf) 4439 _mm512_setzero_ps (), 4440 (__mmask16) __U); 4441 } 4442 4443 static __inline __m512d __DEFAULT_FN_ATTRS512 4444 _mm512_load_pd(void const *__p) 4445 { 4446 return *(const __m512d*)__p; 4447 } 4448 4449 static __inline __m512d __DEFAULT_FN_ATTRS512 4450 _mm512_mask_load_pd (__m512d __W, __mmask8 __U, void const *__P) 4451 { 4452 return (__m512d) __builtin_ia32_loadapd512_mask ((const __v8df *) __P, 4453 (__v8df) __W, 4454 (__mmask8) __U); 4455 } 4456 4457 static __inline __m512d __DEFAULT_FN_ATTRS512 4458 _mm512_maskz_load_pd(__mmask8 __U, void const *__P) 4459 { 4460 return (__m512d) __builtin_ia32_loadapd512_mask ((const __v8df *)__P, 4461 (__v8df) 4462 _mm512_setzero_pd (), 4463 (__mmask8) __U); 4464 } 4465 4466 static __inline __m512i __DEFAULT_FN_ATTRS512 4467 _mm512_load_si512 (void const *__P) 4468 { 4469 return *(const __m512i *) __P; 4470 } 4471 4472 static __inline __m512i __DEFAULT_FN_ATTRS512 4473 _mm512_load_epi32 (void const *__P) 4474 { 4475 return *(const __m512i *) __P; 4476 } 4477 4478 static __inline __m512i __DEFAULT_FN_ATTRS512 4479 _mm512_load_epi64 (void const *__P) 4480 { 4481 return *(const __m512i *) __P; 4482 } 4483 4484 /* SIMD store ops */ 4485 4486 static __inline void __DEFAULT_FN_ATTRS512 4487 _mm512_storeu_epi64 (void *__P, __m512i __A) 4488 { 4489 struct __storeu_epi64 { 4490 __m512i_u __v; 4491 } __attribute__((__packed__, __may_alias__)); 4492 ((struct __storeu_epi64*)__P)->__v = __A; 4493 } 4494 4495 static __inline void __DEFAULT_FN_ATTRS512 4496 _mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A) 4497 { 4498 __builtin_ia32_storedqudi512_mask ((long long *)__P, (__v8di) __A, 4499 (__mmask8) __U); 4500 } 4501 4502 static __inline void __DEFAULT_FN_ATTRS512 4503 _mm512_storeu_si512 (void *__P, __m512i __A) 4504 { 4505 struct __storeu_si512 { 4506 __m512i_u __v; 4507 } __attribute__((__packed__, __may_alias__)); 4508 ((struct __storeu_si512*)__P)->__v = __A; 4509 } 4510 4511 static __inline void __DEFAULT_FN_ATTRS512 4512 _mm512_storeu_epi32 (void *__P, __m512i __A) 4513 { 4514 struct __storeu_epi32 { 4515 __m512i_u __v; 4516 } __attribute__((__packed__, __may_alias__)); 4517 ((struct __storeu_epi32*)__P)->__v = __A; 4518 } 4519 4520 static __inline void __DEFAULT_FN_ATTRS512 4521 _mm512_mask_storeu_epi32(void *__P, __mmask16 __U, __m512i __A) 4522 { 4523 __builtin_ia32_storedqusi512_mask ((int *)__P, (__v16si) __A, 4524 (__mmask16) __U); 4525 } 4526 4527 static __inline void __DEFAULT_FN_ATTRS512 4528 _mm512_mask_storeu_pd(void *__P, __mmask8 __U, __m512d __A) 4529 { 4530 __builtin_ia32_storeupd512_mask ((double *)__P, (__v8df) __A, (__mmask8) __U); 4531 } 4532 4533 static __inline void __DEFAULT_FN_ATTRS512 4534 _mm512_storeu_pd(void *__P, __m512d __A) 4535 { 4536 struct __storeu_pd { 4537 __m512d_u __v; 4538 } __attribute__((__packed__, __may_alias__)); 4539 ((struct __storeu_pd*)__P)->__v = __A; 4540 } 4541 4542 static __inline void __DEFAULT_FN_ATTRS512 4543 _mm512_mask_storeu_ps(void *__P, __mmask16 __U, __m512 __A) 4544 { 4545 __builtin_ia32_storeups512_mask ((float *)__P, (__v16sf) __A, 4546 (__mmask16) __U); 4547 } 4548 4549 static __inline void __DEFAULT_FN_ATTRS512 4550 _mm512_storeu_ps(void *__P, __m512 __A) 4551 { 4552 struct __storeu_ps { 4553 __m512_u __v; 4554 } __attribute__((__packed__, __may_alias__)); 4555 ((struct __storeu_ps*)__P)->__v = __A; 4556 } 4557 4558 static __inline void __DEFAULT_FN_ATTRS512 4559 _mm512_mask_store_pd(void *__P, __mmask8 __U, __m512d __A) 4560 { 4561 __builtin_ia32_storeapd512_mask ((__v8df *)__P, (__v8df) __A, (__mmask8) __U); 4562 } 4563 4564 static __inline void __DEFAULT_FN_ATTRS512 4565 _mm512_store_pd(void *__P, __m512d __A) 4566 { 4567 *(__m512d*)__P = __A; 4568 } 4569 4570 static __inline void __DEFAULT_FN_ATTRS512 4571 _mm512_mask_store_ps(void *__P, __mmask16 __U, __m512 __A) 4572 { 4573 __builtin_ia32_storeaps512_mask ((__v16sf *)__P, (__v16sf) __A, 4574 (__mmask16) __U); 4575 } 4576 4577 static __inline void __DEFAULT_FN_ATTRS512 4578 _mm512_store_ps(void *__P, __m512 __A) 4579 { 4580 *(__m512*)__P = __A; 4581 } 4582 4583 static __inline void __DEFAULT_FN_ATTRS512 4584 _mm512_store_si512 (void *__P, __m512i __A) 4585 { 4586 *(__m512i *) __P = __A; 4587 } 4588 4589 static __inline void __DEFAULT_FN_ATTRS512 4590 _mm512_store_epi32 (void *__P, __m512i __A) 4591 { 4592 *(__m512i *) __P = __A; 4593 } 4594 4595 static __inline void __DEFAULT_FN_ATTRS512 4596 _mm512_store_epi64 (void *__P, __m512i __A) 4597 { 4598 *(__m512i *) __P = __A; 4599 } 4600 4601 /* Mask ops */ 4602 4603 static __inline __mmask16 __DEFAULT_FN_ATTRS 4604 _mm512_knot(__mmask16 __M) 4605 { 4606 return __builtin_ia32_knothi(__M); 4607 } 4608 4609 /* Integer compare */ 4610 4611 #define _mm512_cmpeq_epi32_mask(A, B) \ 4612 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_EQ) 4613 #define _mm512_mask_cmpeq_epi32_mask(k, A, B) \ 4614 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_EQ) 4615 #define _mm512_cmpge_epi32_mask(A, B) \ 4616 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_GE) 4617 #define _mm512_mask_cmpge_epi32_mask(k, A, B) \ 4618 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GE) 4619 #define _mm512_cmpgt_epi32_mask(A, B) \ 4620 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_GT) 4621 #define _mm512_mask_cmpgt_epi32_mask(k, A, B) \ 4622 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_GT) 4623 #define _mm512_cmple_epi32_mask(A, B) \ 4624 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_LE) 4625 #define _mm512_mask_cmple_epi32_mask(k, A, B) \ 4626 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LE) 4627 #define _mm512_cmplt_epi32_mask(A, B) \ 4628 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_LT) 4629 #define _mm512_mask_cmplt_epi32_mask(k, A, B) \ 4630 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_LT) 4631 #define _mm512_cmpneq_epi32_mask(A, B) \ 4632 _mm512_cmp_epi32_mask((A), (B), _MM_CMPINT_NE) 4633 #define _mm512_mask_cmpneq_epi32_mask(k, A, B) \ 4634 _mm512_mask_cmp_epi32_mask((k), (A), (B), _MM_CMPINT_NE) 4635 4636 #define _mm512_cmpeq_epu32_mask(A, B) \ 4637 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_EQ) 4638 #define _mm512_mask_cmpeq_epu32_mask(k, A, B) \ 4639 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_EQ) 4640 #define _mm512_cmpge_epu32_mask(A, B) \ 4641 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_GE) 4642 #define _mm512_mask_cmpge_epu32_mask(k, A, B) \ 4643 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GE) 4644 #define _mm512_cmpgt_epu32_mask(A, B) \ 4645 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_GT) 4646 #define _mm512_mask_cmpgt_epu32_mask(k, A, B) \ 4647 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_GT) 4648 #define _mm512_cmple_epu32_mask(A, B) \ 4649 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_LE) 4650 #define _mm512_mask_cmple_epu32_mask(k, A, B) \ 4651 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LE) 4652 #define _mm512_cmplt_epu32_mask(A, B) \ 4653 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_LT) 4654 #define _mm512_mask_cmplt_epu32_mask(k, A, B) \ 4655 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_LT) 4656 #define _mm512_cmpneq_epu32_mask(A, B) \ 4657 _mm512_cmp_epu32_mask((A), (B), _MM_CMPINT_NE) 4658 #define _mm512_mask_cmpneq_epu32_mask(k, A, B) \ 4659 _mm512_mask_cmp_epu32_mask((k), (A), (B), _MM_CMPINT_NE) 4660 4661 #define _mm512_cmpeq_epi64_mask(A, B) \ 4662 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_EQ) 4663 #define _mm512_mask_cmpeq_epi64_mask(k, A, B) \ 4664 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_EQ) 4665 #define _mm512_cmpge_epi64_mask(A, B) \ 4666 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_GE) 4667 #define _mm512_mask_cmpge_epi64_mask(k, A, B) \ 4668 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GE) 4669 #define _mm512_cmpgt_epi64_mask(A, B) \ 4670 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_GT) 4671 #define _mm512_mask_cmpgt_epi64_mask(k, A, B) \ 4672 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_GT) 4673 #define _mm512_cmple_epi64_mask(A, B) \ 4674 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_LE) 4675 #define _mm512_mask_cmple_epi64_mask(k, A, B) \ 4676 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LE) 4677 #define _mm512_cmplt_epi64_mask(A, B) \ 4678 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_LT) 4679 #define _mm512_mask_cmplt_epi64_mask(k, A, B) \ 4680 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_LT) 4681 #define _mm512_cmpneq_epi64_mask(A, B) \ 4682 _mm512_cmp_epi64_mask((A), (B), _MM_CMPINT_NE) 4683 #define _mm512_mask_cmpneq_epi64_mask(k, A, B) \ 4684 _mm512_mask_cmp_epi64_mask((k), (A), (B), _MM_CMPINT_NE) 4685 4686 #define _mm512_cmpeq_epu64_mask(A, B) \ 4687 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_EQ) 4688 #define _mm512_mask_cmpeq_epu64_mask(k, A, B) \ 4689 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_EQ) 4690 #define _mm512_cmpge_epu64_mask(A, B) \ 4691 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_GE) 4692 #define _mm512_mask_cmpge_epu64_mask(k, A, B) \ 4693 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GE) 4694 #define _mm512_cmpgt_epu64_mask(A, B) \ 4695 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_GT) 4696 #define _mm512_mask_cmpgt_epu64_mask(k, A, B) \ 4697 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_GT) 4698 #define _mm512_cmple_epu64_mask(A, B) \ 4699 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_LE) 4700 #define _mm512_mask_cmple_epu64_mask(k, A, B) \ 4701 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LE) 4702 #define _mm512_cmplt_epu64_mask(A, B) \ 4703 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_LT) 4704 #define _mm512_mask_cmplt_epu64_mask(k, A, B) \ 4705 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_LT) 4706 #define _mm512_cmpneq_epu64_mask(A, B) \ 4707 _mm512_cmp_epu64_mask((A), (B), _MM_CMPINT_NE) 4708 #define _mm512_mask_cmpneq_epu64_mask(k, A, B) \ 4709 _mm512_mask_cmp_epu64_mask((k), (A), (B), _MM_CMPINT_NE) 4710 4711 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4712 _mm512_cvtepi8_epi32(__m128i __A) 4713 { 4714 /* This function always performs a signed extension, but __v16qi is a char 4715 which may be signed or unsigned, so use __v16qs. */ 4716 return (__m512i)__builtin_convertvector((__v16qs)__A, __v16si); 4717 } 4718 4719 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4720 _mm512_mask_cvtepi8_epi32(__m512i __W, __mmask16 __U, __m128i __A) 4721 { 4722 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4723 (__v16si)_mm512_cvtepi8_epi32(__A), 4724 (__v16si)__W); 4725 } 4726 4727 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4728 _mm512_maskz_cvtepi8_epi32(__mmask16 __U, __m128i __A) 4729 { 4730 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4731 (__v16si)_mm512_cvtepi8_epi32(__A), 4732 (__v16si)_mm512_setzero_si512()); 4733 } 4734 4735 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4736 _mm512_cvtepi8_epi64(__m128i __A) 4737 { 4738 /* This function always performs a signed extension, but __v16qi is a char 4739 which may be signed or unsigned, so use __v16qs. */ 4740 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qs)__A, (__v16qs)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di); 4741 } 4742 4743 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4744 _mm512_mask_cvtepi8_epi64(__m512i __W, __mmask8 __U, __m128i __A) 4745 { 4746 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4747 (__v8di)_mm512_cvtepi8_epi64(__A), 4748 (__v8di)__W); 4749 } 4750 4751 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4752 _mm512_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) 4753 { 4754 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4755 (__v8di)_mm512_cvtepi8_epi64(__A), 4756 (__v8di)_mm512_setzero_si512 ()); 4757 } 4758 4759 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4760 _mm512_cvtepi32_epi64(__m256i __X) 4761 { 4762 return (__m512i)__builtin_convertvector((__v8si)__X, __v8di); 4763 } 4764 4765 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4766 _mm512_mask_cvtepi32_epi64(__m512i __W, __mmask8 __U, __m256i __X) 4767 { 4768 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4769 (__v8di)_mm512_cvtepi32_epi64(__X), 4770 (__v8di)__W); 4771 } 4772 4773 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4774 _mm512_maskz_cvtepi32_epi64(__mmask8 __U, __m256i __X) 4775 { 4776 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4777 (__v8di)_mm512_cvtepi32_epi64(__X), 4778 (__v8di)_mm512_setzero_si512()); 4779 } 4780 4781 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4782 _mm512_cvtepi16_epi32(__m256i __A) 4783 { 4784 return (__m512i)__builtin_convertvector((__v16hi)__A, __v16si); 4785 } 4786 4787 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4788 _mm512_mask_cvtepi16_epi32(__m512i __W, __mmask16 __U, __m256i __A) 4789 { 4790 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4791 (__v16si)_mm512_cvtepi16_epi32(__A), 4792 (__v16si)__W); 4793 } 4794 4795 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4796 _mm512_maskz_cvtepi16_epi32(__mmask16 __U, __m256i __A) 4797 { 4798 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4799 (__v16si)_mm512_cvtepi16_epi32(__A), 4800 (__v16si)_mm512_setzero_si512 ()); 4801 } 4802 4803 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4804 _mm512_cvtepi16_epi64(__m128i __A) 4805 { 4806 return (__m512i)__builtin_convertvector((__v8hi)__A, __v8di); 4807 } 4808 4809 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4810 _mm512_mask_cvtepi16_epi64(__m512i __W, __mmask8 __U, __m128i __A) 4811 { 4812 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4813 (__v8di)_mm512_cvtepi16_epi64(__A), 4814 (__v8di)__W); 4815 } 4816 4817 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4818 _mm512_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) 4819 { 4820 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4821 (__v8di)_mm512_cvtepi16_epi64(__A), 4822 (__v8di)_mm512_setzero_si512()); 4823 } 4824 4825 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4826 _mm512_cvtepu8_epi32(__m128i __A) 4827 { 4828 return (__m512i)__builtin_convertvector((__v16qu)__A, __v16si); 4829 } 4830 4831 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4832 _mm512_mask_cvtepu8_epi32(__m512i __W, __mmask16 __U, __m128i __A) 4833 { 4834 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4835 (__v16si)_mm512_cvtepu8_epi32(__A), 4836 (__v16si)__W); 4837 } 4838 4839 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4840 _mm512_maskz_cvtepu8_epi32(__mmask16 __U, __m128i __A) 4841 { 4842 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4843 (__v16si)_mm512_cvtepu8_epi32(__A), 4844 (__v16si)_mm512_setzero_si512()); 4845 } 4846 4847 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4848 _mm512_cvtepu8_epi64(__m128i __A) 4849 { 4850 return (__m512i)__builtin_convertvector(__builtin_shufflevector((__v16qu)__A, (__v16qu)__A, 0, 1, 2, 3, 4, 5, 6, 7), __v8di); 4851 } 4852 4853 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4854 _mm512_mask_cvtepu8_epi64(__m512i __W, __mmask8 __U, __m128i __A) 4855 { 4856 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4857 (__v8di)_mm512_cvtepu8_epi64(__A), 4858 (__v8di)__W); 4859 } 4860 4861 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4862 _mm512_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) 4863 { 4864 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4865 (__v8di)_mm512_cvtepu8_epi64(__A), 4866 (__v8di)_mm512_setzero_si512()); 4867 } 4868 4869 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4870 _mm512_cvtepu32_epi64(__m256i __X) 4871 { 4872 return (__m512i)__builtin_convertvector((__v8su)__X, __v8di); 4873 } 4874 4875 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4876 _mm512_mask_cvtepu32_epi64(__m512i __W, __mmask8 __U, __m256i __X) 4877 { 4878 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4879 (__v8di)_mm512_cvtepu32_epi64(__X), 4880 (__v8di)__W); 4881 } 4882 4883 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4884 _mm512_maskz_cvtepu32_epi64(__mmask8 __U, __m256i __X) 4885 { 4886 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4887 (__v8di)_mm512_cvtepu32_epi64(__X), 4888 (__v8di)_mm512_setzero_si512()); 4889 } 4890 4891 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4892 _mm512_cvtepu16_epi32(__m256i __A) 4893 { 4894 return (__m512i)__builtin_convertvector((__v16hu)__A, __v16si); 4895 } 4896 4897 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4898 _mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) 4899 { 4900 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4901 (__v16si)_mm512_cvtepu16_epi32(__A), 4902 (__v16si)__W); 4903 } 4904 4905 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4906 _mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) 4907 { 4908 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 4909 (__v16si)_mm512_cvtepu16_epi32(__A), 4910 (__v16si)_mm512_setzero_si512()); 4911 } 4912 4913 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4914 _mm512_cvtepu16_epi64(__m128i __A) 4915 { 4916 return (__m512i)__builtin_convertvector((__v8hu)__A, __v8di); 4917 } 4918 4919 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4920 _mm512_mask_cvtepu16_epi64(__m512i __W, __mmask8 __U, __m128i __A) 4921 { 4922 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4923 (__v8di)_mm512_cvtepu16_epi64(__A), 4924 (__v8di)__W); 4925 } 4926 4927 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4928 _mm512_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) 4929 { 4930 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 4931 (__v8di)_mm512_cvtepu16_epi64(__A), 4932 (__v8di)_mm512_setzero_si512()); 4933 } 4934 4935 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4936 _mm512_rorv_epi32 (__m512i __A, __m512i __B) 4937 { 4938 return (__m512i)__builtin_ia32_prorvd512((__v16si)__A, (__v16si)__B); 4939 } 4940 4941 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4942 _mm512_mask_rorv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 4943 { 4944 return (__m512i)__builtin_ia32_selectd_512(__U, 4945 (__v16si)_mm512_rorv_epi32(__A, __B), 4946 (__v16si)__W); 4947 } 4948 4949 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4950 _mm512_maskz_rorv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) 4951 { 4952 return (__m512i)__builtin_ia32_selectd_512(__U, 4953 (__v16si)_mm512_rorv_epi32(__A, __B), 4954 (__v16si)_mm512_setzero_si512()); 4955 } 4956 4957 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4958 _mm512_rorv_epi64 (__m512i __A, __m512i __B) 4959 { 4960 return (__m512i)__builtin_ia32_prorvq512((__v8di)__A, (__v8di)__B); 4961 } 4962 4963 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4964 _mm512_mask_rorv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 4965 { 4966 return (__m512i)__builtin_ia32_selectq_512(__U, 4967 (__v8di)_mm512_rorv_epi64(__A, __B), 4968 (__v8di)__W); 4969 } 4970 4971 static __inline__ __m512i __DEFAULT_FN_ATTRS512 4972 _mm512_maskz_rorv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) 4973 { 4974 return (__m512i)__builtin_ia32_selectq_512(__U, 4975 (__v8di)_mm512_rorv_epi64(__A, __B), 4976 (__v8di)_mm512_setzero_si512()); 4977 } 4978 4979 4980 4981 #define _mm512_cmp_epi32_mask(a, b, p) \ 4982 ((__mmask16)__builtin_ia32_cmpd512_mask((__v16si)(__m512i)(a), \ 4983 (__v16si)(__m512i)(b), (int)(p), \ 4984 (__mmask16)-1)) 4985 4986 #define _mm512_cmp_epu32_mask(a, b, p) \ 4987 ((__mmask16)__builtin_ia32_ucmpd512_mask((__v16si)(__m512i)(a), \ 4988 (__v16si)(__m512i)(b), (int)(p), \ 4989 (__mmask16)-1)) 4990 4991 #define _mm512_cmp_epi64_mask(a, b, p) \ 4992 ((__mmask8)__builtin_ia32_cmpq512_mask((__v8di)(__m512i)(a), \ 4993 (__v8di)(__m512i)(b), (int)(p), \ 4994 (__mmask8)-1)) 4995 4996 #define _mm512_cmp_epu64_mask(a, b, p) \ 4997 ((__mmask8)__builtin_ia32_ucmpq512_mask((__v8di)(__m512i)(a), \ 4998 (__v8di)(__m512i)(b), (int)(p), \ 4999 (__mmask8)-1)) 5000 5001 #define _mm512_mask_cmp_epi32_mask(m, a, b, p) \ 5002 ((__mmask16)__builtin_ia32_cmpd512_mask((__v16si)(__m512i)(a), \ 5003 (__v16si)(__m512i)(b), (int)(p), \ 5004 (__mmask16)(m))) 5005 5006 #define _mm512_mask_cmp_epu32_mask(m, a, b, p) \ 5007 ((__mmask16)__builtin_ia32_ucmpd512_mask((__v16si)(__m512i)(a), \ 5008 (__v16si)(__m512i)(b), (int)(p), \ 5009 (__mmask16)(m))) 5010 5011 #define _mm512_mask_cmp_epi64_mask(m, a, b, p) \ 5012 ((__mmask8)__builtin_ia32_cmpq512_mask((__v8di)(__m512i)(a), \ 5013 (__v8di)(__m512i)(b), (int)(p), \ 5014 (__mmask8)(m))) 5015 5016 #define _mm512_mask_cmp_epu64_mask(m, a, b, p) \ 5017 ((__mmask8)__builtin_ia32_ucmpq512_mask((__v8di)(__m512i)(a), \ 5018 (__v8di)(__m512i)(b), (int)(p), \ 5019 (__mmask8)(m))) 5020 5021 #define _mm512_rol_epi32(a, b) \ 5022 ((__m512i)__builtin_ia32_prold512((__v16si)(__m512i)(a), (int)(b))) 5023 5024 #define _mm512_mask_rol_epi32(W, U, a, b) \ 5025 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 5026 (__v16si)_mm512_rol_epi32((a), (b)), \ 5027 (__v16si)(__m512i)(W))) 5028 5029 #define _mm512_maskz_rol_epi32(U, a, b) \ 5030 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 5031 (__v16si)_mm512_rol_epi32((a), (b)), \ 5032 (__v16si)_mm512_setzero_si512())) 5033 5034 #define _mm512_rol_epi64(a, b) \ 5035 ((__m512i)__builtin_ia32_prolq512((__v8di)(__m512i)(a), (int)(b))) 5036 5037 #define _mm512_mask_rol_epi64(W, U, a, b) \ 5038 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 5039 (__v8di)_mm512_rol_epi64((a), (b)), \ 5040 (__v8di)(__m512i)(W))) 5041 5042 #define _mm512_maskz_rol_epi64(U, a, b) \ 5043 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 5044 (__v8di)_mm512_rol_epi64((a), (b)), \ 5045 (__v8di)_mm512_setzero_si512())) 5046 5047 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5048 _mm512_rolv_epi32 (__m512i __A, __m512i __B) 5049 { 5050 return (__m512i)__builtin_ia32_prolvd512((__v16si)__A, (__v16si)__B); 5051 } 5052 5053 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5054 _mm512_mask_rolv_epi32 (__m512i __W, __mmask16 __U, __m512i __A, __m512i __B) 5055 { 5056 return (__m512i)__builtin_ia32_selectd_512(__U, 5057 (__v16si)_mm512_rolv_epi32(__A, __B), 5058 (__v16si)__W); 5059 } 5060 5061 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5062 _mm512_maskz_rolv_epi32 (__mmask16 __U, __m512i __A, __m512i __B) 5063 { 5064 return (__m512i)__builtin_ia32_selectd_512(__U, 5065 (__v16si)_mm512_rolv_epi32(__A, __B), 5066 (__v16si)_mm512_setzero_si512()); 5067 } 5068 5069 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5070 _mm512_rolv_epi64 (__m512i __A, __m512i __B) 5071 { 5072 return (__m512i)__builtin_ia32_prolvq512((__v8di)__A, (__v8di)__B); 5073 } 5074 5075 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5076 _mm512_mask_rolv_epi64 (__m512i __W, __mmask8 __U, __m512i __A, __m512i __B) 5077 { 5078 return (__m512i)__builtin_ia32_selectq_512(__U, 5079 (__v8di)_mm512_rolv_epi64(__A, __B), 5080 (__v8di)__W); 5081 } 5082 5083 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5084 _mm512_maskz_rolv_epi64 (__mmask8 __U, __m512i __A, __m512i __B) 5085 { 5086 return (__m512i)__builtin_ia32_selectq_512(__U, 5087 (__v8di)_mm512_rolv_epi64(__A, __B), 5088 (__v8di)_mm512_setzero_si512()); 5089 } 5090 5091 #define _mm512_ror_epi32(A, B) \ 5092 ((__m512i)__builtin_ia32_prord512((__v16si)(__m512i)(A), (int)(B))) 5093 5094 #define _mm512_mask_ror_epi32(W, U, A, B) \ 5095 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 5096 (__v16si)_mm512_ror_epi32((A), (B)), \ 5097 (__v16si)(__m512i)(W))) 5098 5099 #define _mm512_maskz_ror_epi32(U, A, B) \ 5100 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 5101 (__v16si)_mm512_ror_epi32((A), (B)), \ 5102 (__v16si)_mm512_setzero_si512())) 5103 5104 #define _mm512_ror_epi64(A, B) \ 5105 ((__m512i)__builtin_ia32_prorq512((__v8di)(__m512i)(A), (int)(B))) 5106 5107 #define _mm512_mask_ror_epi64(W, U, A, B) \ 5108 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 5109 (__v8di)_mm512_ror_epi64((A), (B)), \ 5110 (__v8di)(__m512i)(W))) 5111 5112 #define _mm512_maskz_ror_epi64(U, A, B) \ 5113 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 5114 (__v8di)_mm512_ror_epi64((A), (B)), \ 5115 (__v8di)_mm512_setzero_si512())) 5116 5117 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5118 _mm512_slli_epi32(__m512i __A, unsigned int __B) 5119 { 5120 return (__m512i)__builtin_ia32_pslldi512((__v16si)__A, __B); 5121 } 5122 5123 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5124 _mm512_mask_slli_epi32(__m512i __W, __mmask16 __U, __m512i __A, 5125 unsigned int __B) 5126 { 5127 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5128 (__v16si)_mm512_slli_epi32(__A, __B), 5129 (__v16si)__W); 5130 } 5131 5132 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5133 _mm512_maskz_slli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) { 5134 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5135 (__v16si)_mm512_slli_epi32(__A, __B), 5136 (__v16si)_mm512_setzero_si512()); 5137 } 5138 5139 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5140 _mm512_slli_epi64(__m512i __A, unsigned int __B) 5141 { 5142 return (__m512i)__builtin_ia32_psllqi512((__v8di)__A, __B); 5143 } 5144 5145 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5146 _mm512_mask_slli_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) 5147 { 5148 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5149 (__v8di)_mm512_slli_epi64(__A, __B), 5150 (__v8di)__W); 5151 } 5152 5153 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5154 _mm512_maskz_slli_epi64(__mmask8 __U, __m512i __A, unsigned int __B) 5155 { 5156 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5157 (__v8di)_mm512_slli_epi64(__A, __B), 5158 (__v8di)_mm512_setzero_si512()); 5159 } 5160 5161 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5162 _mm512_srli_epi32(__m512i __A, unsigned int __B) 5163 { 5164 return (__m512i)__builtin_ia32_psrldi512((__v16si)__A, __B); 5165 } 5166 5167 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5168 _mm512_mask_srli_epi32(__m512i __W, __mmask16 __U, __m512i __A, 5169 unsigned int __B) 5170 { 5171 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5172 (__v16si)_mm512_srli_epi32(__A, __B), 5173 (__v16si)__W); 5174 } 5175 5176 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5177 _mm512_maskz_srli_epi32(__mmask16 __U, __m512i __A, unsigned int __B) { 5178 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5179 (__v16si)_mm512_srli_epi32(__A, __B), 5180 (__v16si)_mm512_setzero_si512()); 5181 } 5182 5183 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5184 _mm512_srli_epi64(__m512i __A, unsigned int __B) 5185 { 5186 return (__m512i)__builtin_ia32_psrlqi512((__v8di)__A, __B); 5187 } 5188 5189 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5190 _mm512_mask_srli_epi64(__m512i __W, __mmask8 __U, __m512i __A, 5191 unsigned int __B) 5192 { 5193 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5194 (__v8di)_mm512_srli_epi64(__A, __B), 5195 (__v8di)__W); 5196 } 5197 5198 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5199 _mm512_maskz_srli_epi64(__mmask8 __U, __m512i __A, 5200 unsigned int __B) 5201 { 5202 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5203 (__v8di)_mm512_srli_epi64(__A, __B), 5204 (__v8di)_mm512_setzero_si512()); 5205 } 5206 5207 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5208 _mm512_mask_load_epi32 (__m512i __W, __mmask16 __U, void const *__P) 5209 { 5210 return (__m512i) __builtin_ia32_movdqa32load512_mask ((const __v16si *) __P, 5211 (__v16si) __W, 5212 (__mmask16) __U); 5213 } 5214 5215 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5216 _mm512_maskz_load_epi32 (__mmask16 __U, void const *__P) 5217 { 5218 return (__m512i) __builtin_ia32_movdqa32load512_mask ((const __v16si *) __P, 5219 (__v16si) 5220 _mm512_setzero_si512 (), 5221 (__mmask16) __U); 5222 } 5223 5224 static __inline__ void __DEFAULT_FN_ATTRS512 5225 _mm512_mask_store_epi32 (void *__P, __mmask16 __U, __m512i __A) 5226 { 5227 __builtin_ia32_movdqa32store512_mask ((__v16si *) __P, (__v16si) __A, 5228 (__mmask16) __U); 5229 } 5230 5231 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5232 _mm512_mask_mov_epi32 (__m512i __W, __mmask16 __U, __m512i __A) 5233 { 5234 return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U, 5235 (__v16si) __A, 5236 (__v16si) __W); 5237 } 5238 5239 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5240 _mm512_maskz_mov_epi32 (__mmask16 __U, __m512i __A) 5241 { 5242 return (__m512i) __builtin_ia32_selectd_512 ((__mmask16) __U, 5243 (__v16si) __A, 5244 (__v16si) _mm512_setzero_si512 ()); 5245 } 5246 5247 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5248 _mm512_mask_mov_epi64 (__m512i __W, __mmask8 __U, __m512i __A) 5249 { 5250 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U, 5251 (__v8di) __A, 5252 (__v8di) __W); 5253 } 5254 5255 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5256 _mm512_maskz_mov_epi64 (__mmask8 __U, __m512i __A) 5257 { 5258 return (__m512i) __builtin_ia32_selectq_512 ((__mmask8) __U, 5259 (__v8di) __A, 5260 (__v8di) _mm512_setzero_si512 ()); 5261 } 5262 5263 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5264 _mm512_mask_load_epi64 (__m512i __W, __mmask8 __U, void const *__P) 5265 { 5266 return (__m512i) __builtin_ia32_movdqa64load512_mask ((const __v8di *) __P, 5267 (__v8di) __W, 5268 (__mmask8) __U); 5269 } 5270 5271 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5272 _mm512_maskz_load_epi64 (__mmask8 __U, void const *__P) 5273 { 5274 return (__m512i) __builtin_ia32_movdqa64load512_mask ((const __v8di *) __P, 5275 (__v8di) 5276 _mm512_setzero_si512 (), 5277 (__mmask8) __U); 5278 } 5279 5280 static __inline__ void __DEFAULT_FN_ATTRS512 5281 _mm512_mask_store_epi64 (void *__P, __mmask8 __U, __m512i __A) 5282 { 5283 __builtin_ia32_movdqa64store512_mask ((__v8di *) __P, (__v8di) __A, 5284 (__mmask8) __U); 5285 } 5286 5287 static __inline__ __m512d __DEFAULT_FN_ATTRS512 5288 _mm512_movedup_pd (__m512d __A) 5289 { 5290 return (__m512d)__builtin_shufflevector((__v8df)__A, (__v8df)__A, 5291 0, 0, 2, 2, 4, 4, 6, 6); 5292 } 5293 5294 static __inline__ __m512d __DEFAULT_FN_ATTRS512 5295 _mm512_mask_movedup_pd (__m512d __W, __mmask8 __U, __m512d __A) 5296 { 5297 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 5298 (__v8df)_mm512_movedup_pd(__A), 5299 (__v8df)__W); 5300 } 5301 5302 static __inline__ __m512d __DEFAULT_FN_ATTRS512 5303 _mm512_maskz_movedup_pd (__mmask8 __U, __m512d __A) 5304 { 5305 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 5306 (__v8df)_mm512_movedup_pd(__A), 5307 (__v8df)_mm512_setzero_pd()); 5308 } 5309 5310 #define _mm512_fixupimm_round_pd(A, B, C, imm, R) \ 5311 ((__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \ 5312 (__v8df)(__m512d)(B), \ 5313 (__v8di)(__m512i)(C), (int)(imm), \ 5314 (__mmask8)-1, (int)(R))) 5315 5316 #define _mm512_mask_fixupimm_round_pd(A, U, B, C, imm, R) \ 5317 ((__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \ 5318 (__v8df)(__m512d)(B), \ 5319 (__v8di)(__m512i)(C), (int)(imm), \ 5320 (__mmask8)(U), (int)(R))) 5321 5322 #define _mm512_fixupimm_pd(A, B, C, imm) \ 5323 ((__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \ 5324 (__v8df)(__m512d)(B), \ 5325 (__v8di)(__m512i)(C), (int)(imm), \ 5326 (__mmask8)-1, \ 5327 _MM_FROUND_CUR_DIRECTION)) 5328 5329 #define _mm512_mask_fixupimm_pd(A, U, B, C, imm) \ 5330 ((__m512d)__builtin_ia32_fixupimmpd512_mask((__v8df)(__m512d)(A), \ 5331 (__v8df)(__m512d)(B), \ 5332 (__v8di)(__m512i)(C), (int)(imm), \ 5333 (__mmask8)(U), \ 5334 _MM_FROUND_CUR_DIRECTION)) 5335 5336 #define _mm512_maskz_fixupimm_round_pd(U, A, B, C, imm, R) \ 5337 ((__m512d)__builtin_ia32_fixupimmpd512_maskz((__v8df)(__m512d)(A), \ 5338 (__v8df)(__m512d)(B), \ 5339 (__v8di)(__m512i)(C), \ 5340 (int)(imm), (__mmask8)(U), \ 5341 (int)(R))) 5342 5343 #define _mm512_maskz_fixupimm_pd(U, A, B, C, imm) \ 5344 ((__m512d)__builtin_ia32_fixupimmpd512_maskz((__v8df)(__m512d)(A), \ 5345 (__v8df)(__m512d)(B), \ 5346 (__v8di)(__m512i)(C), \ 5347 (int)(imm), (__mmask8)(U), \ 5348 _MM_FROUND_CUR_DIRECTION)) 5349 5350 #define _mm512_fixupimm_round_ps(A, B, C, imm, R) \ 5351 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \ 5352 (__v16sf)(__m512)(B), \ 5353 (__v16si)(__m512i)(C), (int)(imm), \ 5354 (__mmask16)-1, (int)(R))) 5355 5356 #define _mm512_mask_fixupimm_round_ps(A, U, B, C, imm, R) \ 5357 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \ 5358 (__v16sf)(__m512)(B), \ 5359 (__v16si)(__m512i)(C), (int)(imm), \ 5360 (__mmask16)(U), (int)(R))) 5361 5362 #define _mm512_fixupimm_ps(A, B, C, imm) \ 5363 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \ 5364 (__v16sf)(__m512)(B), \ 5365 (__v16si)(__m512i)(C), (int)(imm), \ 5366 (__mmask16)-1, \ 5367 _MM_FROUND_CUR_DIRECTION)) 5368 5369 #define _mm512_mask_fixupimm_ps(A, U, B, C, imm) \ 5370 ((__m512)__builtin_ia32_fixupimmps512_mask((__v16sf)(__m512)(A), \ 5371 (__v16sf)(__m512)(B), \ 5372 (__v16si)(__m512i)(C), (int)(imm), \ 5373 (__mmask16)(U), \ 5374 _MM_FROUND_CUR_DIRECTION)) 5375 5376 #define _mm512_maskz_fixupimm_round_ps(U, A, B, C, imm, R) \ 5377 ((__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \ 5378 (__v16sf)(__m512)(B), \ 5379 (__v16si)(__m512i)(C), \ 5380 (int)(imm), (__mmask16)(U), \ 5381 (int)(R))) 5382 5383 #define _mm512_maskz_fixupimm_ps(U, A, B, C, imm) \ 5384 ((__m512)__builtin_ia32_fixupimmps512_maskz((__v16sf)(__m512)(A), \ 5385 (__v16sf)(__m512)(B), \ 5386 (__v16si)(__m512i)(C), \ 5387 (int)(imm), (__mmask16)(U), \ 5388 _MM_FROUND_CUR_DIRECTION)) 5389 5390 #define _mm_fixupimm_round_sd(A, B, C, imm, R) \ 5391 ((__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \ 5392 (__v2df)(__m128d)(B), \ 5393 (__v2di)(__m128i)(C), (int)(imm), \ 5394 (__mmask8)-1, (int)(R))) 5395 5396 #define _mm_mask_fixupimm_round_sd(A, U, B, C, imm, R) \ 5397 ((__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \ 5398 (__v2df)(__m128d)(B), \ 5399 (__v2di)(__m128i)(C), (int)(imm), \ 5400 (__mmask8)(U), (int)(R))) 5401 5402 #define _mm_fixupimm_sd(A, B, C, imm) \ 5403 ((__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \ 5404 (__v2df)(__m128d)(B), \ 5405 (__v2di)(__m128i)(C), (int)(imm), \ 5406 (__mmask8)-1, \ 5407 _MM_FROUND_CUR_DIRECTION)) 5408 5409 #define _mm_mask_fixupimm_sd(A, U, B, C, imm) \ 5410 ((__m128d)__builtin_ia32_fixupimmsd_mask((__v2df)(__m128d)(A), \ 5411 (__v2df)(__m128d)(B), \ 5412 (__v2di)(__m128i)(C), (int)(imm), \ 5413 (__mmask8)(U), \ 5414 _MM_FROUND_CUR_DIRECTION)) 5415 5416 #define _mm_maskz_fixupimm_round_sd(U, A, B, C, imm, R) \ 5417 ((__m128d)__builtin_ia32_fixupimmsd_maskz((__v2df)(__m128d)(A), \ 5418 (__v2df)(__m128d)(B), \ 5419 (__v2di)(__m128i)(C), (int)(imm), \ 5420 (__mmask8)(U), (int)(R))) 5421 5422 #define _mm_maskz_fixupimm_sd(U, A, B, C, imm) \ 5423 ((__m128d)__builtin_ia32_fixupimmsd_maskz((__v2df)(__m128d)(A), \ 5424 (__v2df)(__m128d)(B), \ 5425 (__v2di)(__m128i)(C), (int)(imm), \ 5426 (__mmask8)(U), \ 5427 _MM_FROUND_CUR_DIRECTION)) 5428 5429 #define _mm_fixupimm_round_ss(A, B, C, imm, R) \ 5430 ((__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \ 5431 (__v4sf)(__m128)(B), \ 5432 (__v4si)(__m128i)(C), (int)(imm), \ 5433 (__mmask8)-1, (int)(R))) 5434 5435 #define _mm_mask_fixupimm_round_ss(A, U, B, C, imm, R) \ 5436 ((__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \ 5437 (__v4sf)(__m128)(B), \ 5438 (__v4si)(__m128i)(C), (int)(imm), \ 5439 (__mmask8)(U), (int)(R))) 5440 5441 #define _mm_fixupimm_ss(A, B, C, imm) \ 5442 ((__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \ 5443 (__v4sf)(__m128)(B), \ 5444 (__v4si)(__m128i)(C), (int)(imm), \ 5445 (__mmask8)-1, \ 5446 _MM_FROUND_CUR_DIRECTION)) 5447 5448 #define _mm_mask_fixupimm_ss(A, U, B, C, imm) \ 5449 ((__m128)__builtin_ia32_fixupimmss_mask((__v4sf)(__m128)(A), \ 5450 (__v4sf)(__m128)(B), \ 5451 (__v4si)(__m128i)(C), (int)(imm), \ 5452 (__mmask8)(U), \ 5453 _MM_FROUND_CUR_DIRECTION)) 5454 5455 #define _mm_maskz_fixupimm_round_ss(U, A, B, C, imm, R) \ 5456 ((__m128)__builtin_ia32_fixupimmss_maskz((__v4sf)(__m128)(A), \ 5457 (__v4sf)(__m128)(B), \ 5458 (__v4si)(__m128i)(C), (int)(imm), \ 5459 (__mmask8)(U), (int)(R))) 5460 5461 #define _mm_maskz_fixupimm_ss(U, A, B, C, imm) \ 5462 ((__m128)__builtin_ia32_fixupimmss_maskz((__v4sf)(__m128)(A), \ 5463 (__v4sf)(__m128)(B), \ 5464 (__v4si)(__m128i)(C), (int)(imm), \ 5465 (__mmask8)(U), \ 5466 _MM_FROUND_CUR_DIRECTION)) 5467 5468 #define _mm_getexp_round_sd(A, B, R) \ 5469 ((__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \ 5470 (__v2df)(__m128d)(B), \ 5471 (__v2df)_mm_setzero_pd(), \ 5472 (__mmask8)-1, (int)(R))) 5473 5474 5475 static __inline__ __m128d __DEFAULT_FN_ATTRS128 5476 _mm_getexp_sd (__m128d __A, __m128d __B) 5477 { 5478 return (__m128d) __builtin_ia32_getexpsd128_round_mask ((__v2df) __A, 5479 (__v2df) __B, (__v2df) _mm_setzero_pd(), (__mmask8) -1, _MM_FROUND_CUR_DIRECTION); 5480 } 5481 5482 static __inline__ __m128d __DEFAULT_FN_ATTRS128 5483 _mm_mask_getexp_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 5484 { 5485 return (__m128d) __builtin_ia32_getexpsd128_round_mask ( (__v2df) __A, 5486 (__v2df) __B, 5487 (__v2df) __W, 5488 (__mmask8) __U, 5489 _MM_FROUND_CUR_DIRECTION); 5490 } 5491 5492 #define _mm_mask_getexp_round_sd(W, U, A, B, R) \ 5493 ((__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \ 5494 (__v2df)(__m128d)(B), \ 5495 (__v2df)(__m128d)(W), \ 5496 (__mmask8)(U), (int)(R))) 5497 5498 static __inline__ __m128d __DEFAULT_FN_ATTRS128 5499 _mm_maskz_getexp_sd (__mmask8 __U, __m128d __A, __m128d __B) 5500 { 5501 return (__m128d) __builtin_ia32_getexpsd128_round_mask ( (__v2df) __A, 5502 (__v2df) __B, 5503 (__v2df) _mm_setzero_pd (), 5504 (__mmask8) __U, 5505 _MM_FROUND_CUR_DIRECTION); 5506 } 5507 5508 #define _mm_maskz_getexp_round_sd(U, A, B, R) \ 5509 ((__m128d)__builtin_ia32_getexpsd128_round_mask((__v2df)(__m128d)(A), \ 5510 (__v2df)(__m128d)(B), \ 5511 (__v2df)_mm_setzero_pd(), \ 5512 (__mmask8)(U), (int)(R))) 5513 5514 #define _mm_getexp_round_ss(A, B, R) \ 5515 ((__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \ 5516 (__v4sf)(__m128)(B), \ 5517 (__v4sf)_mm_setzero_ps(), \ 5518 (__mmask8)-1, (int)(R))) 5519 5520 static __inline__ __m128 __DEFAULT_FN_ATTRS128 5521 _mm_getexp_ss (__m128 __A, __m128 __B) 5522 { 5523 return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A, 5524 (__v4sf) __B, (__v4sf) _mm_setzero_ps(), (__mmask8) -1, _MM_FROUND_CUR_DIRECTION); 5525 } 5526 5527 static __inline__ __m128 __DEFAULT_FN_ATTRS128 5528 _mm_mask_getexp_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 5529 { 5530 return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A, 5531 (__v4sf) __B, 5532 (__v4sf) __W, 5533 (__mmask8) __U, 5534 _MM_FROUND_CUR_DIRECTION); 5535 } 5536 5537 #define _mm_mask_getexp_round_ss(W, U, A, B, R) \ 5538 ((__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \ 5539 (__v4sf)(__m128)(B), \ 5540 (__v4sf)(__m128)(W), \ 5541 (__mmask8)(U), (int)(R))) 5542 5543 static __inline__ __m128 __DEFAULT_FN_ATTRS128 5544 _mm_maskz_getexp_ss (__mmask8 __U, __m128 __A, __m128 __B) 5545 { 5546 return (__m128) __builtin_ia32_getexpss128_round_mask ((__v4sf) __A, 5547 (__v4sf) __B, 5548 (__v4sf) _mm_setzero_ps (), 5549 (__mmask8) __U, 5550 _MM_FROUND_CUR_DIRECTION); 5551 } 5552 5553 #define _mm_maskz_getexp_round_ss(U, A, B, R) \ 5554 ((__m128)__builtin_ia32_getexpss128_round_mask((__v4sf)(__m128)(A), \ 5555 (__v4sf)(__m128)(B), \ 5556 (__v4sf)_mm_setzero_ps(), \ 5557 (__mmask8)(U), (int)(R))) 5558 5559 #define _mm_getmant_round_sd(A, B, C, D, R) \ 5560 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5561 (__v2df)(__m128d)(B), \ 5562 (int)(((D)<<2) | (C)), \ 5563 (__v2df)_mm_setzero_pd(), \ 5564 (__mmask8)-1, (int)(R))) 5565 5566 #define _mm_getmant_sd(A, B, C, D) \ 5567 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5568 (__v2df)(__m128d)(B), \ 5569 (int)(((D)<<2) | (C)), \ 5570 (__v2df)_mm_setzero_pd(), \ 5571 (__mmask8)-1, \ 5572 _MM_FROUND_CUR_DIRECTION)) 5573 5574 #define _mm_mask_getmant_sd(W, U, A, B, C, D) \ 5575 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5576 (__v2df)(__m128d)(B), \ 5577 (int)(((D)<<2) | (C)), \ 5578 (__v2df)(__m128d)(W), \ 5579 (__mmask8)(U), \ 5580 _MM_FROUND_CUR_DIRECTION)) 5581 5582 #define _mm_mask_getmant_round_sd(W, U, A, B, C, D, R) \ 5583 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5584 (__v2df)(__m128d)(B), \ 5585 (int)(((D)<<2) | (C)), \ 5586 (__v2df)(__m128d)(W), \ 5587 (__mmask8)(U), (int)(R))) 5588 5589 #define _mm_maskz_getmant_sd(U, A, B, C, D) \ 5590 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5591 (__v2df)(__m128d)(B), \ 5592 (int)(((D)<<2) | (C)), \ 5593 (__v2df)_mm_setzero_pd(), \ 5594 (__mmask8)(U), \ 5595 _MM_FROUND_CUR_DIRECTION)) 5596 5597 #define _mm_maskz_getmant_round_sd(U, A, B, C, D, R) \ 5598 ((__m128d)__builtin_ia32_getmantsd_round_mask((__v2df)(__m128d)(A), \ 5599 (__v2df)(__m128d)(B), \ 5600 (int)(((D)<<2) | (C)), \ 5601 (__v2df)_mm_setzero_pd(), \ 5602 (__mmask8)(U), (int)(R))) 5603 5604 #define _mm_getmant_round_ss(A, B, C, D, R) \ 5605 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5606 (__v4sf)(__m128)(B), \ 5607 (int)(((D)<<2) | (C)), \ 5608 (__v4sf)_mm_setzero_ps(), \ 5609 (__mmask8)-1, (int)(R))) 5610 5611 #define _mm_getmant_ss(A, B, C, D) \ 5612 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5613 (__v4sf)(__m128)(B), \ 5614 (int)(((D)<<2) | (C)), \ 5615 (__v4sf)_mm_setzero_ps(), \ 5616 (__mmask8)-1, \ 5617 _MM_FROUND_CUR_DIRECTION)) 5618 5619 #define _mm_mask_getmant_ss(W, U, A, B, C, D) \ 5620 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5621 (__v4sf)(__m128)(B), \ 5622 (int)(((D)<<2) | (C)), \ 5623 (__v4sf)(__m128)(W), \ 5624 (__mmask8)(U), \ 5625 _MM_FROUND_CUR_DIRECTION)) 5626 5627 #define _mm_mask_getmant_round_ss(W, U, A, B, C, D, R) \ 5628 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5629 (__v4sf)(__m128)(B), \ 5630 (int)(((D)<<2) | (C)), \ 5631 (__v4sf)(__m128)(W), \ 5632 (__mmask8)(U), (int)(R))) 5633 5634 #define _mm_maskz_getmant_ss(U, A, B, C, D) \ 5635 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5636 (__v4sf)(__m128)(B), \ 5637 (int)(((D)<<2) | (C)), \ 5638 (__v4sf)_mm_setzero_ps(), \ 5639 (__mmask8)(U), \ 5640 _MM_FROUND_CUR_DIRECTION)) 5641 5642 #define _mm_maskz_getmant_round_ss(U, A, B, C, D, R) \ 5643 ((__m128)__builtin_ia32_getmantss_round_mask((__v4sf)(__m128)(A), \ 5644 (__v4sf)(__m128)(B), \ 5645 (int)(((D)<<2) | (C)), \ 5646 (__v4sf)_mm_setzero_ps(), \ 5647 (__mmask8)(U), (int)(R))) 5648 5649 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 5650 _mm512_kmov (__mmask16 __A) 5651 { 5652 return __A; 5653 } 5654 5655 #define _mm_comi_round_sd(A, B, P, R) \ 5656 ((int)__builtin_ia32_vcomisd((__v2df)(__m128d)(A), (__v2df)(__m128d)(B), \ 5657 (int)(P), (int)(R))) 5658 5659 #define _mm_comi_round_ss(A, B, P, R) \ 5660 ((int)__builtin_ia32_vcomiss((__v4sf)(__m128)(A), (__v4sf)(__m128)(B), \ 5661 (int)(P), (int)(R))) 5662 5663 #ifdef __x86_64__ 5664 #define _mm_cvt_roundsd_si64(A, R) \ 5665 ((long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R))) 5666 #endif 5667 5668 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5669 _mm512_sll_epi32(__m512i __A, __m128i __B) 5670 { 5671 return (__m512i)__builtin_ia32_pslld512((__v16si) __A, (__v4si)__B); 5672 } 5673 5674 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5675 _mm512_mask_sll_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) 5676 { 5677 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5678 (__v16si)_mm512_sll_epi32(__A, __B), 5679 (__v16si)__W); 5680 } 5681 5682 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5683 _mm512_maskz_sll_epi32(__mmask16 __U, __m512i __A, __m128i __B) 5684 { 5685 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5686 (__v16si)_mm512_sll_epi32(__A, __B), 5687 (__v16si)_mm512_setzero_si512()); 5688 } 5689 5690 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5691 _mm512_sll_epi64(__m512i __A, __m128i __B) 5692 { 5693 return (__m512i)__builtin_ia32_psllq512((__v8di)__A, (__v2di)__B); 5694 } 5695 5696 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5697 _mm512_mask_sll_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) 5698 { 5699 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5700 (__v8di)_mm512_sll_epi64(__A, __B), 5701 (__v8di)__W); 5702 } 5703 5704 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5705 _mm512_maskz_sll_epi64(__mmask8 __U, __m512i __A, __m128i __B) 5706 { 5707 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5708 (__v8di)_mm512_sll_epi64(__A, __B), 5709 (__v8di)_mm512_setzero_si512()); 5710 } 5711 5712 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5713 _mm512_sllv_epi32(__m512i __X, __m512i __Y) 5714 { 5715 return (__m512i)__builtin_ia32_psllv16si((__v16si)__X, (__v16si)__Y); 5716 } 5717 5718 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5719 _mm512_mask_sllv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) 5720 { 5721 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5722 (__v16si)_mm512_sllv_epi32(__X, __Y), 5723 (__v16si)__W); 5724 } 5725 5726 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5727 _mm512_maskz_sllv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) 5728 { 5729 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5730 (__v16si)_mm512_sllv_epi32(__X, __Y), 5731 (__v16si)_mm512_setzero_si512()); 5732 } 5733 5734 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5735 _mm512_sllv_epi64(__m512i __X, __m512i __Y) 5736 { 5737 return (__m512i)__builtin_ia32_psllv8di((__v8di)__X, (__v8di)__Y); 5738 } 5739 5740 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5741 _mm512_mask_sllv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) 5742 { 5743 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5744 (__v8di)_mm512_sllv_epi64(__X, __Y), 5745 (__v8di)__W); 5746 } 5747 5748 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5749 _mm512_maskz_sllv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) 5750 { 5751 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5752 (__v8di)_mm512_sllv_epi64(__X, __Y), 5753 (__v8di)_mm512_setzero_si512()); 5754 } 5755 5756 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5757 _mm512_sra_epi32(__m512i __A, __m128i __B) 5758 { 5759 return (__m512i)__builtin_ia32_psrad512((__v16si) __A, (__v4si)__B); 5760 } 5761 5762 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5763 _mm512_mask_sra_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) 5764 { 5765 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5766 (__v16si)_mm512_sra_epi32(__A, __B), 5767 (__v16si)__W); 5768 } 5769 5770 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5771 _mm512_maskz_sra_epi32(__mmask16 __U, __m512i __A, __m128i __B) 5772 { 5773 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5774 (__v16si)_mm512_sra_epi32(__A, __B), 5775 (__v16si)_mm512_setzero_si512()); 5776 } 5777 5778 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5779 _mm512_sra_epi64(__m512i __A, __m128i __B) 5780 { 5781 return (__m512i)__builtin_ia32_psraq512((__v8di)__A, (__v2di)__B); 5782 } 5783 5784 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5785 _mm512_mask_sra_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) 5786 { 5787 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5788 (__v8di)_mm512_sra_epi64(__A, __B), 5789 (__v8di)__W); 5790 } 5791 5792 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5793 _mm512_maskz_sra_epi64(__mmask8 __U, __m512i __A, __m128i __B) 5794 { 5795 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5796 (__v8di)_mm512_sra_epi64(__A, __B), 5797 (__v8di)_mm512_setzero_si512()); 5798 } 5799 5800 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5801 _mm512_srav_epi32(__m512i __X, __m512i __Y) 5802 { 5803 return (__m512i)__builtin_ia32_psrav16si((__v16si)__X, (__v16si)__Y); 5804 } 5805 5806 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5807 _mm512_mask_srav_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) 5808 { 5809 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5810 (__v16si)_mm512_srav_epi32(__X, __Y), 5811 (__v16si)__W); 5812 } 5813 5814 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5815 _mm512_maskz_srav_epi32(__mmask16 __U, __m512i __X, __m512i __Y) 5816 { 5817 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5818 (__v16si)_mm512_srav_epi32(__X, __Y), 5819 (__v16si)_mm512_setzero_si512()); 5820 } 5821 5822 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5823 _mm512_srav_epi64(__m512i __X, __m512i __Y) 5824 { 5825 return (__m512i)__builtin_ia32_psrav8di((__v8di)__X, (__v8di)__Y); 5826 } 5827 5828 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5829 _mm512_mask_srav_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) 5830 { 5831 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5832 (__v8di)_mm512_srav_epi64(__X, __Y), 5833 (__v8di)__W); 5834 } 5835 5836 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5837 _mm512_maskz_srav_epi64(__mmask8 __U, __m512i __X, __m512i __Y) 5838 { 5839 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5840 (__v8di)_mm512_srav_epi64(__X, __Y), 5841 (__v8di)_mm512_setzero_si512()); 5842 } 5843 5844 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5845 _mm512_srl_epi32(__m512i __A, __m128i __B) 5846 { 5847 return (__m512i)__builtin_ia32_psrld512((__v16si) __A, (__v4si)__B); 5848 } 5849 5850 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5851 _mm512_mask_srl_epi32(__m512i __W, __mmask16 __U, __m512i __A, __m128i __B) 5852 { 5853 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5854 (__v16si)_mm512_srl_epi32(__A, __B), 5855 (__v16si)__W); 5856 } 5857 5858 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5859 _mm512_maskz_srl_epi32(__mmask16 __U, __m512i __A, __m128i __B) 5860 { 5861 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5862 (__v16si)_mm512_srl_epi32(__A, __B), 5863 (__v16si)_mm512_setzero_si512()); 5864 } 5865 5866 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5867 _mm512_srl_epi64(__m512i __A, __m128i __B) 5868 { 5869 return (__m512i)__builtin_ia32_psrlq512((__v8di)__A, (__v2di)__B); 5870 } 5871 5872 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5873 _mm512_mask_srl_epi64(__m512i __W, __mmask8 __U, __m512i __A, __m128i __B) 5874 { 5875 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5876 (__v8di)_mm512_srl_epi64(__A, __B), 5877 (__v8di)__W); 5878 } 5879 5880 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5881 _mm512_maskz_srl_epi64(__mmask8 __U, __m512i __A, __m128i __B) 5882 { 5883 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5884 (__v8di)_mm512_srl_epi64(__A, __B), 5885 (__v8di)_mm512_setzero_si512()); 5886 } 5887 5888 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5889 _mm512_srlv_epi32(__m512i __X, __m512i __Y) 5890 { 5891 return (__m512i)__builtin_ia32_psrlv16si((__v16si)__X, (__v16si)__Y); 5892 } 5893 5894 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5895 _mm512_mask_srlv_epi32(__m512i __W, __mmask16 __U, __m512i __X, __m512i __Y) 5896 { 5897 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5898 (__v16si)_mm512_srlv_epi32(__X, __Y), 5899 (__v16si)__W); 5900 } 5901 5902 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5903 _mm512_maskz_srlv_epi32(__mmask16 __U, __m512i __X, __m512i __Y) 5904 { 5905 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 5906 (__v16si)_mm512_srlv_epi32(__X, __Y), 5907 (__v16si)_mm512_setzero_si512()); 5908 } 5909 5910 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5911 _mm512_srlv_epi64 (__m512i __X, __m512i __Y) 5912 { 5913 return (__m512i)__builtin_ia32_psrlv8di((__v8di)__X, (__v8di)__Y); 5914 } 5915 5916 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5917 _mm512_mask_srlv_epi64(__m512i __W, __mmask8 __U, __m512i __X, __m512i __Y) 5918 { 5919 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5920 (__v8di)_mm512_srlv_epi64(__X, __Y), 5921 (__v8di)__W); 5922 } 5923 5924 static __inline__ __m512i __DEFAULT_FN_ATTRS512 5925 _mm512_maskz_srlv_epi64(__mmask8 __U, __m512i __X, __m512i __Y) 5926 { 5927 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 5928 (__v8di)_mm512_srlv_epi64(__X, __Y), 5929 (__v8di)_mm512_setzero_si512()); 5930 } 5931 5932 #define _mm512_ternarylogic_epi32(A, B, C, imm) \ 5933 ((__m512i)__builtin_ia32_pternlogd512_mask((__v16si)(__m512i)(A), \ 5934 (__v16si)(__m512i)(B), \ 5935 (__v16si)(__m512i)(C), (int)(imm), \ 5936 (__mmask16)-1)) 5937 5938 #define _mm512_mask_ternarylogic_epi32(A, U, B, C, imm) \ 5939 ((__m512i)__builtin_ia32_pternlogd512_mask((__v16si)(__m512i)(A), \ 5940 (__v16si)(__m512i)(B), \ 5941 (__v16si)(__m512i)(C), (int)(imm), \ 5942 (__mmask16)(U))) 5943 5944 #define _mm512_maskz_ternarylogic_epi32(U, A, B, C, imm) \ 5945 ((__m512i)__builtin_ia32_pternlogd512_maskz((__v16si)(__m512i)(A), \ 5946 (__v16si)(__m512i)(B), \ 5947 (__v16si)(__m512i)(C), \ 5948 (int)(imm), (__mmask16)(U))) 5949 5950 #define _mm512_ternarylogic_epi64(A, B, C, imm) \ 5951 ((__m512i)__builtin_ia32_pternlogq512_mask((__v8di)(__m512i)(A), \ 5952 (__v8di)(__m512i)(B), \ 5953 (__v8di)(__m512i)(C), (int)(imm), \ 5954 (__mmask8)-1)) 5955 5956 #define _mm512_mask_ternarylogic_epi64(A, U, B, C, imm) \ 5957 ((__m512i)__builtin_ia32_pternlogq512_mask((__v8di)(__m512i)(A), \ 5958 (__v8di)(__m512i)(B), \ 5959 (__v8di)(__m512i)(C), (int)(imm), \ 5960 (__mmask8)(U))) 5961 5962 #define _mm512_maskz_ternarylogic_epi64(U, A, B, C, imm) \ 5963 ((__m512i)__builtin_ia32_pternlogq512_maskz((__v8di)(__m512i)(A), \ 5964 (__v8di)(__m512i)(B), \ 5965 (__v8di)(__m512i)(C), (int)(imm), \ 5966 (__mmask8)(U))) 5967 5968 #ifdef __x86_64__ 5969 #define _mm_cvt_roundsd_i64(A, R) \ 5970 ((long long)__builtin_ia32_vcvtsd2si64((__v2df)(__m128d)(A), (int)(R))) 5971 #endif 5972 5973 #define _mm_cvt_roundsd_si32(A, R) \ 5974 ((int)__builtin_ia32_vcvtsd2si32((__v2df)(__m128d)(A), (int)(R))) 5975 5976 #define _mm_cvt_roundsd_i32(A, R) \ 5977 ((int)__builtin_ia32_vcvtsd2si32((__v2df)(__m128d)(A), (int)(R))) 5978 5979 #define _mm_cvt_roundsd_u32(A, R) \ 5980 ((unsigned int)__builtin_ia32_vcvtsd2usi32((__v2df)(__m128d)(A), (int)(R))) 5981 5982 static __inline__ unsigned __DEFAULT_FN_ATTRS128 5983 _mm_cvtsd_u32 (__m128d __A) 5984 { 5985 return (unsigned) __builtin_ia32_vcvtsd2usi32 ((__v2df) __A, 5986 _MM_FROUND_CUR_DIRECTION); 5987 } 5988 5989 #ifdef __x86_64__ 5990 #define _mm_cvt_roundsd_u64(A, R) \ 5991 ((unsigned long long)__builtin_ia32_vcvtsd2usi64((__v2df)(__m128d)(A), \ 5992 (int)(R))) 5993 5994 static __inline__ unsigned long long __DEFAULT_FN_ATTRS128 5995 _mm_cvtsd_u64 (__m128d __A) 5996 { 5997 return (unsigned long long) __builtin_ia32_vcvtsd2usi64 ((__v2df) 5998 __A, 5999 _MM_FROUND_CUR_DIRECTION); 6000 } 6001 #endif 6002 6003 #define _mm_cvt_roundss_si32(A, R) \ 6004 ((int)__builtin_ia32_vcvtss2si32((__v4sf)(__m128)(A), (int)(R))) 6005 6006 #define _mm_cvt_roundss_i32(A, R) \ 6007 ((int)__builtin_ia32_vcvtss2si32((__v4sf)(__m128)(A), (int)(R))) 6008 6009 #ifdef __x86_64__ 6010 #define _mm_cvt_roundss_si64(A, R) \ 6011 ((long long)__builtin_ia32_vcvtss2si64((__v4sf)(__m128)(A), (int)(R))) 6012 6013 #define _mm_cvt_roundss_i64(A, R) \ 6014 ((long long)__builtin_ia32_vcvtss2si64((__v4sf)(__m128)(A), (int)(R))) 6015 #endif 6016 6017 #define _mm_cvt_roundss_u32(A, R) \ 6018 ((unsigned int)__builtin_ia32_vcvtss2usi32((__v4sf)(__m128)(A), (int)(R))) 6019 6020 static __inline__ unsigned __DEFAULT_FN_ATTRS128 6021 _mm_cvtss_u32 (__m128 __A) 6022 { 6023 return (unsigned) __builtin_ia32_vcvtss2usi32 ((__v4sf) __A, 6024 _MM_FROUND_CUR_DIRECTION); 6025 } 6026 6027 #ifdef __x86_64__ 6028 #define _mm_cvt_roundss_u64(A, R) \ 6029 ((unsigned long long)__builtin_ia32_vcvtss2usi64((__v4sf)(__m128)(A), \ 6030 (int)(R))) 6031 6032 static __inline__ unsigned long long __DEFAULT_FN_ATTRS128 6033 _mm_cvtss_u64 (__m128 __A) 6034 { 6035 return (unsigned long long) __builtin_ia32_vcvtss2usi64 ((__v4sf) 6036 __A, 6037 _MM_FROUND_CUR_DIRECTION); 6038 } 6039 #endif 6040 6041 #define _mm_cvtt_roundsd_i32(A, R) \ 6042 ((int)__builtin_ia32_vcvttsd2si32((__v2df)(__m128d)(A), (int)(R))) 6043 6044 #define _mm_cvtt_roundsd_si32(A, R) \ 6045 ((int)__builtin_ia32_vcvttsd2si32((__v2df)(__m128d)(A), (int)(R))) 6046 6047 static __inline__ int __DEFAULT_FN_ATTRS128 6048 _mm_cvttsd_i32 (__m128d __A) 6049 { 6050 return (int) __builtin_ia32_vcvttsd2si32 ((__v2df) __A, 6051 _MM_FROUND_CUR_DIRECTION); 6052 } 6053 6054 #ifdef __x86_64__ 6055 #define _mm_cvtt_roundsd_si64(A, R) \ 6056 ((long long)__builtin_ia32_vcvttsd2si64((__v2df)(__m128d)(A), (int)(R))) 6057 6058 #define _mm_cvtt_roundsd_i64(A, R) \ 6059 ((long long)__builtin_ia32_vcvttsd2si64((__v2df)(__m128d)(A), (int)(R))) 6060 6061 static __inline__ long long __DEFAULT_FN_ATTRS128 6062 _mm_cvttsd_i64 (__m128d __A) 6063 { 6064 return (long long) __builtin_ia32_vcvttsd2si64 ((__v2df) __A, 6065 _MM_FROUND_CUR_DIRECTION); 6066 } 6067 #endif 6068 6069 #define _mm_cvtt_roundsd_u32(A, R) \ 6070 ((unsigned int)__builtin_ia32_vcvttsd2usi32((__v2df)(__m128d)(A), (int)(R))) 6071 6072 static __inline__ unsigned __DEFAULT_FN_ATTRS128 6073 _mm_cvttsd_u32 (__m128d __A) 6074 { 6075 return (unsigned) __builtin_ia32_vcvttsd2usi32 ((__v2df) __A, 6076 _MM_FROUND_CUR_DIRECTION); 6077 } 6078 6079 #ifdef __x86_64__ 6080 #define _mm_cvtt_roundsd_u64(A, R) \ 6081 ((unsigned long long)__builtin_ia32_vcvttsd2usi64((__v2df)(__m128d)(A), \ 6082 (int)(R))) 6083 6084 static __inline__ unsigned long long __DEFAULT_FN_ATTRS128 6085 _mm_cvttsd_u64 (__m128d __A) 6086 { 6087 return (unsigned long long) __builtin_ia32_vcvttsd2usi64 ((__v2df) 6088 __A, 6089 _MM_FROUND_CUR_DIRECTION); 6090 } 6091 #endif 6092 6093 #define _mm_cvtt_roundss_i32(A, R) \ 6094 ((int)__builtin_ia32_vcvttss2si32((__v4sf)(__m128)(A), (int)(R))) 6095 6096 #define _mm_cvtt_roundss_si32(A, R) \ 6097 ((int)__builtin_ia32_vcvttss2si32((__v4sf)(__m128)(A), (int)(R))) 6098 6099 static __inline__ int __DEFAULT_FN_ATTRS128 6100 _mm_cvttss_i32 (__m128 __A) 6101 { 6102 return (int) __builtin_ia32_vcvttss2si32 ((__v4sf) __A, 6103 _MM_FROUND_CUR_DIRECTION); 6104 } 6105 6106 #ifdef __x86_64__ 6107 #define _mm_cvtt_roundss_i64(A, R) \ 6108 ((long long)__builtin_ia32_vcvttss2si64((__v4sf)(__m128)(A), (int)(R))) 6109 6110 #define _mm_cvtt_roundss_si64(A, R) \ 6111 ((long long)__builtin_ia32_vcvttss2si64((__v4sf)(__m128)(A), (int)(R))) 6112 6113 static __inline__ long long __DEFAULT_FN_ATTRS128 6114 _mm_cvttss_i64 (__m128 __A) 6115 { 6116 return (long long) __builtin_ia32_vcvttss2si64 ((__v4sf) __A, 6117 _MM_FROUND_CUR_DIRECTION); 6118 } 6119 #endif 6120 6121 #define _mm_cvtt_roundss_u32(A, R) \ 6122 ((unsigned int)__builtin_ia32_vcvttss2usi32((__v4sf)(__m128)(A), (int)(R))) 6123 6124 static __inline__ unsigned __DEFAULT_FN_ATTRS128 6125 _mm_cvttss_u32 (__m128 __A) 6126 { 6127 return (unsigned) __builtin_ia32_vcvttss2usi32 ((__v4sf) __A, 6128 _MM_FROUND_CUR_DIRECTION); 6129 } 6130 6131 #ifdef __x86_64__ 6132 #define _mm_cvtt_roundss_u64(A, R) \ 6133 ((unsigned long long)__builtin_ia32_vcvttss2usi64((__v4sf)(__m128)(A), \ 6134 (int)(R))) 6135 6136 static __inline__ unsigned long long __DEFAULT_FN_ATTRS128 6137 _mm_cvttss_u64 (__m128 __A) 6138 { 6139 return (unsigned long long) __builtin_ia32_vcvttss2usi64 ((__v4sf) 6140 __A, 6141 _MM_FROUND_CUR_DIRECTION); 6142 } 6143 #endif 6144 6145 #define _mm512_permute_pd(X, C) \ 6146 ((__m512d)__builtin_ia32_vpermilpd512((__v8df)(__m512d)(X), (int)(C))) 6147 6148 #define _mm512_mask_permute_pd(W, U, X, C) \ 6149 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6150 (__v8df)_mm512_permute_pd((X), (C)), \ 6151 (__v8df)(__m512d)(W))) 6152 6153 #define _mm512_maskz_permute_pd(U, X, C) \ 6154 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6155 (__v8df)_mm512_permute_pd((X), (C)), \ 6156 (__v8df)_mm512_setzero_pd())) 6157 6158 #define _mm512_permute_ps(X, C) \ 6159 ((__m512)__builtin_ia32_vpermilps512((__v16sf)(__m512)(X), (int)(C))) 6160 6161 #define _mm512_mask_permute_ps(W, U, X, C) \ 6162 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6163 (__v16sf)_mm512_permute_ps((X), (C)), \ 6164 (__v16sf)(__m512)(W))) 6165 6166 #define _mm512_maskz_permute_ps(U, X, C) \ 6167 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6168 (__v16sf)_mm512_permute_ps((X), (C)), \ 6169 (__v16sf)_mm512_setzero_ps())) 6170 6171 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6172 _mm512_permutevar_pd(__m512d __A, __m512i __C) 6173 { 6174 return (__m512d)__builtin_ia32_vpermilvarpd512((__v8df)__A, (__v8di)__C); 6175 } 6176 6177 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6178 _mm512_mask_permutevar_pd(__m512d __W, __mmask8 __U, __m512d __A, __m512i __C) 6179 { 6180 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 6181 (__v8df)_mm512_permutevar_pd(__A, __C), 6182 (__v8df)__W); 6183 } 6184 6185 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6186 _mm512_maskz_permutevar_pd(__mmask8 __U, __m512d __A, __m512i __C) 6187 { 6188 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 6189 (__v8df)_mm512_permutevar_pd(__A, __C), 6190 (__v8df)_mm512_setzero_pd()); 6191 } 6192 6193 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6194 _mm512_permutevar_ps(__m512 __A, __m512i __C) 6195 { 6196 return (__m512)__builtin_ia32_vpermilvarps512((__v16sf)__A, (__v16si)__C); 6197 } 6198 6199 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6200 _mm512_mask_permutevar_ps(__m512 __W, __mmask16 __U, __m512 __A, __m512i __C) 6201 { 6202 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 6203 (__v16sf)_mm512_permutevar_ps(__A, __C), 6204 (__v16sf)__W); 6205 } 6206 6207 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6208 _mm512_maskz_permutevar_ps(__mmask16 __U, __m512 __A, __m512i __C) 6209 { 6210 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 6211 (__v16sf)_mm512_permutevar_ps(__A, __C), 6212 (__v16sf)_mm512_setzero_ps()); 6213 } 6214 6215 static __inline __m512d __DEFAULT_FN_ATTRS512 6216 _mm512_permutex2var_pd(__m512d __A, __m512i __I, __m512d __B) 6217 { 6218 return (__m512d)__builtin_ia32_vpermi2varpd512((__v8df)__A, (__v8di)__I, 6219 (__v8df)__B); 6220 } 6221 6222 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6223 _mm512_mask_permutex2var_pd(__m512d __A, __mmask8 __U, __m512i __I, __m512d __B) 6224 { 6225 return (__m512d)__builtin_ia32_selectpd_512(__U, 6226 (__v8df)_mm512_permutex2var_pd(__A, __I, __B), 6227 (__v8df)__A); 6228 } 6229 6230 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6231 _mm512_mask2_permutex2var_pd(__m512d __A, __m512i __I, __mmask8 __U, 6232 __m512d __B) 6233 { 6234 return (__m512d)__builtin_ia32_selectpd_512(__U, 6235 (__v8df)_mm512_permutex2var_pd(__A, __I, __B), 6236 (__v8df)(__m512d)__I); 6237 } 6238 6239 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6240 _mm512_maskz_permutex2var_pd(__mmask8 __U, __m512d __A, __m512i __I, 6241 __m512d __B) 6242 { 6243 return (__m512d)__builtin_ia32_selectpd_512(__U, 6244 (__v8df)_mm512_permutex2var_pd(__A, __I, __B), 6245 (__v8df)_mm512_setzero_pd()); 6246 } 6247 6248 static __inline __m512 __DEFAULT_FN_ATTRS512 6249 _mm512_permutex2var_ps(__m512 __A, __m512i __I, __m512 __B) 6250 { 6251 return (__m512)__builtin_ia32_vpermi2varps512((__v16sf)__A, (__v16si)__I, 6252 (__v16sf) __B); 6253 } 6254 6255 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6256 _mm512_mask_permutex2var_ps(__m512 __A, __mmask16 __U, __m512i __I, __m512 __B) 6257 { 6258 return (__m512)__builtin_ia32_selectps_512(__U, 6259 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), 6260 (__v16sf)__A); 6261 } 6262 6263 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6264 _mm512_mask2_permutex2var_ps(__m512 __A, __m512i __I, __mmask16 __U, __m512 __B) 6265 { 6266 return (__m512)__builtin_ia32_selectps_512(__U, 6267 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), 6268 (__v16sf)(__m512)__I); 6269 } 6270 6271 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6272 _mm512_maskz_permutex2var_ps(__mmask16 __U, __m512 __A, __m512i __I, __m512 __B) 6273 { 6274 return (__m512)__builtin_ia32_selectps_512(__U, 6275 (__v16sf)_mm512_permutex2var_ps(__A, __I, __B), 6276 (__v16sf)_mm512_setzero_ps()); 6277 } 6278 6279 6280 #define _mm512_cvtt_roundpd_epu32(A, R) \ 6281 ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \ 6282 (__v8si)_mm256_undefined_si256(), \ 6283 (__mmask8)-1, (int)(R))) 6284 6285 #define _mm512_mask_cvtt_roundpd_epu32(W, U, A, R) \ 6286 ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \ 6287 (__v8si)(__m256i)(W), \ 6288 (__mmask8)(U), (int)(R))) 6289 6290 #define _mm512_maskz_cvtt_roundpd_epu32(U, A, R) \ 6291 ((__m256i)__builtin_ia32_cvttpd2udq512_mask((__v8df)(__m512d)(A), \ 6292 (__v8si)_mm256_setzero_si256(), \ 6293 (__mmask8)(U), (int)(R))) 6294 6295 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6296 _mm512_cvttpd_epu32 (__m512d __A) 6297 { 6298 return (__m256i) __builtin_ia32_cvttpd2udq512_mask ((__v8df) __A, 6299 (__v8si) 6300 _mm256_undefined_si256 (), 6301 (__mmask8) -1, 6302 _MM_FROUND_CUR_DIRECTION); 6303 } 6304 6305 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6306 _mm512_mask_cvttpd_epu32 (__m256i __W, __mmask8 __U, __m512d __A) 6307 { 6308 return (__m256i) __builtin_ia32_cvttpd2udq512_mask ((__v8df) __A, 6309 (__v8si) __W, 6310 (__mmask8) __U, 6311 _MM_FROUND_CUR_DIRECTION); 6312 } 6313 6314 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6315 _mm512_maskz_cvttpd_epu32 (__mmask8 __U, __m512d __A) 6316 { 6317 return (__m256i) __builtin_ia32_cvttpd2udq512_mask ((__v8df) __A, 6318 (__v8si) 6319 _mm256_setzero_si256 (), 6320 (__mmask8) __U, 6321 _MM_FROUND_CUR_DIRECTION); 6322 } 6323 6324 #define _mm_roundscale_round_sd(A, B, imm, R) \ 6325 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6326 (__v2df)(__m128d)(B), \ 6327 (__v2df)_mm_setzero_pd(), \ 6328 (__mmask8)-1, (int)(imm), \ 6329 (int)(R))) 6330 6331 #define _mm_roundscale_sd(A, B, imm) \ 6332 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6333 (__v2df)(__m128d)(B), \ 6334 (__v2df)_mm_setzero_pd(), \ 6335 (__mmask8)-1, (int)(imm), \ 6336 _MM_FROUND_CUR_DIRECTION)) 6337 6338 #define _mm_mask_roundscale_sd(W, U, A, B, imm) \ 6339 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6340 (__v2df)(__m128d)(B), \ 6341 (__v2df)(__m128d)(W), \ 6342 (__mmask8)(U), (int)(imm), \ 6343 _MM_FROUND_CUR_DIRECTION)) 6344 6345 #define _mm_mask_roundscale_round_sd(W, U, A, B, I, R) \ 6346 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6347 (__v2df)(__m128d)(B), \ 6348 (__v2df)(__m128d)(W), \ 6349 (__mmask8)(U), (int)(I), \ 6350 (int)(R))) 6351 6352 #define _mm_maskz_roundscale_sd(U, A, B, I) \ 6353 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6354 (__v2df)(__m128d)(B), \ 6355 (__v2df)_mm_setzero_pd(), \ 6356 (__mmask8)(U), (int)(I), \ 6357 _MM_FROUND_CUR_DIRECTION)) 6358 6359 #define _mm_maskz_roundscale_round_sd(U, A, B, I, R) \ 6360 ((__m128d)__builtin_ia32_rndscalesd_round_mask((__v2df)(__m128d)(A), \ 6361 (__v2df)(__m128d)(B), \ 6362 (__v2df)_mm_setzero_pd(), \ 6363 (__mmask8)(U), (int)(I), \ 6364 (int)(R))) 6365 6366 #define _mm_roundscale_round_ss(A, B, imm, R) \ 6367 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6368 (__v4sf)(__m128)(B), \ 6369 (__v4sf)_mm_setzero_ps(), \ 6370 (__mmask8)-1, (int)(imm), \ 6371 (int)(R))) 6372 6373 #define _mm_roundscale_ss(A, B, imm) \ 6374 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6375 (__v4sf)(__m128)(B), \ 6376 (__v4sf)_mm_setzero_ps(), \ 6377 (__mmask8)-1, (int)(imm), \ 6378 _MM_FROUND_CUR_DIRECTION)) 6379 6380 #define _mm_mask_roundscale_ss(W, U, A, B, I) \ 6381 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6382 (__v4sf)(__m128)(B), \ 6383 (__v4sf)(__m128)(W), \ 6384 (__mmask8)(U), (int)(I), \ 6385 _MM_FROUND_CUR_DIRECTION)) 6386 6387 #define _mm_mask_roundscale_round_ss(W, U, A, B, I, R) \ 6388 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6389 (__v4sf)(__m128)(B), \ 6390 (__v4sf)(__m128)(W), \ 6391 (__mmask8)(U), (int)(I), \ 6392 (int)(R))) 6393 6394 #define _mm_maskz_roundscale_ss(U, A, B, I) \ 6395 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6396 (__v4sf)(__m128)(B), \ 6397 (__v4sf)_mm_setzero_ps(), \ 6398 (__mmask8)(U), (int)(I), \ 6399 _MM_FROUND_CUR_DIRECTION)) 6400 6401 #define _mm_maskz_roundscale_round_ss(U, A, B, I, R) \ 6402 ((__m128)__builtin_ia32_rndscaless_round_mask((__v4sf)(__m128)(A), \ 6403 (__v4sf)(__m128)(B), \ 6404 (__v4sf)_mm_setzero_ps(), \ 6405 (__mmask8)(U), (int)(I), \ 6406 (int)(R))) 6407 6408 #define _mm512_scalef_round_pd(A, B, R) \ 6409 ((__m512d)__builtin_ia32_scalefpd512_mask((__v8df)(__m512d)(A), \ 6410 (__v8df)(__m512d)(B), \ 6411 (__v8df)_mm512_undefined_pd(), \ 6412 (__mmask8)-1, (int)(R))) 6413 6414 #define _mm512_mask_scalef_round_pd(W, U, A, B, R) \ 6415 ((__m512d)__builtin_ia32_scalefpd512_mask((__v8df)(__m512d)(A), \ 6416 (__v8df)(__m512d)(B), \ 6417 (__v8df)(__m512d)(W), \ 6418 (__mmask8)(U), (int)(R))) 6419 6420 #define _mm512_maskz_scalef_round_pd(U, A, B, R) \ 6421 ((__m512d)__builtin_ia32_scalefpd512_mask((__v8df)(__m512d)(A), \ 6422 (__v8df)(__m512d)(B), \ 6423 (__v8df)_mm512_setzero_pd(), \ 6424 (__mmask8)(U), (int)(R))) 6425 6426 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6427 _mm512_scalef_pd (__m512d __A, __m512d __B) 6428 { 6429 return (__m512d) __builtin_ia32_scalefpd512_mask ((__v8df) __A, 6430 (__v8df) __B, 6431 (__v8df) 6432 _mm512_undefined_pd (), 6433 (__mmask8) -1, 6434 _MM_FROUND_CUR_DIRECTION); 6435 } 6436 6437 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6438 _mm512_mask_scalef_pd (__m512d __W, __mmask8 __U, __m512d __A, __m512d __B) 6439 { 6440 return (__m512d) __builtin_ia32_scalefpd512_mask ((__v8df) __A, 6441 (__v8df) __B, 6442 (__v8df) __W, 6443 (__mmask8) __U, 6444 _MM_FROUND_CUR_DIRECTION); 6445 } 6446 6447 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6448 _mm512_maskz_scalef_pd (__mmask8 __U, __m512d __A, __m512d __B) 6449 { 6450 return (__m512d) __builtin_ia32_scalefpd512_mask ((__v8df) __A, 6451 (__v8df) __B, 6452 (__v8df) 6453 _mm512_setzero_pd (), 6454 (__mmask8) __U, 6455 _MM_FROUND_CUR_DIRECTION); 6456 } 6457 6458 #define _mm512_scalef_round_ps(A, B, R) \ 6459 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \ 6460 (__v16sf)(__m512)(B), \ 6461 (__v16sf)_mm512_undefined_ps(), \ 6462 (__mmask16)-1, (int)(R))) 6463 6464 #define _mm512_mask_scalef_round_ps(W, U, A, B, R) \ 6465 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \ 6466 (__v16sf)(__m512)(B), \ 6467 (__v16sf)(__m512)(W), \ 6468 (__mmask16)(U), (int)(R))) 6469 6470 #define _mm512_maskz_scalef_round_ps(U, A, B, R) \ 6471 ((__m512)__builtin_ia32_scalefps512_mask((__v16sf)(__m512)(A), \ 6472 (__v16sf)(__m512)(B), \ 6473 (__v16sf)_mm512_setzero_ps(), \ 6474 (__mmask16)(U), (int)(R))) 6475 6476 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6477 _mm512_scalef_ps (__m512 __A, __m512 __B) 6478 { 6479 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A, 6480 (__v16sf) __B, 6481 (__v16sf) 6482 _mm512_undefined_ps (), 6483 (__mmask16) -1, 6484 _MM_FROUND_CUR_DIRECTION); 6485 } 6486 6487 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6488 _mm512_mask_scalef_ps (__m512 __W, __mmask16 __U, __m512 __A, __m512 __B) 6489 { 6490 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A, 6491 (__v16sf) __B, 6492 (__v16sf) __W, 6493 (__mmask16) __U, 6494 _MM_FROUND_CUR_DIRECTION); 6495 } 6496 6497 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6498 _mm512_maskz_scalef_ps (__mmask16 __U, __m512 __A, __m512 __B) 6499 { 6500 return (__m512) __builtin_ia32_scalefps512_mask ((__v16sf) __A, 6501 (__v16sf) __B, 6502 (__v16sf) 6503 _mm512_setzero_ps (), 6504 (__mmask16) __U, 6505 _MM_FROUND_CUR_DIRECTION); 6506 } 6507 6508 #define _mm_scalef_round_sd(A, B, R) \ 6509 ((__m128d)__builtin_ia32_scalefsd_round_mask((__v2df)(__m128d)(A), \ 6510 (__v2df)(__m128d)(B), \ 6511 (__v2df)_mm_setzero_pd(), \ 6512 (__mmask8)-1, (int)(R))) 6513 6514 static __inline__ __m128d __DEFAULT_FN_ATTRS128 6515 _mm_scalef_sd (__m128d __A, __m128d __B) 6516 { 6517 return (__m128d) __builtin_ia32_scalefsd_round_mask ((__v2df) __A, 6518 (__v2df)( __B), (__v2df) _mm_setzero_pd(), 6519 (__mmask8) -1, 6520 _MM_FROUND_CUR_DIRECTION); 6521 } 6522 6523 static __inline__ __m128d __DEFAULT_FN_ATTRS128 6524 _mm_mask_scalef_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 6525 { 6526 return (__m128d) __builtin_ia32_scalefsd_round_mask ( (__v2df) __A, 6527 (__v2df) __B, 6528 (__v2df) __W, 6529 (__mmask8) __U, 6530 _MM_FROUND_CUR_DIRECTION); 6531 } 6532 6533 #define _mm_mask_scalef_round_sd(W, U, A, B, R) \ 6534 ((__m128d)__builtin_ia32_scalefsd_round_mask((__v2df)(__m128d)(A), \ 6535 (__v2df)(__m128d)(B), \ 6536 (__v2df)(__m128d)(W), \ 6537 (__mmask8)(U), (int)(R))) 6538 6539 static __inline__ __m128d __DEFAULT_FN_ATTRS128 6540 _mm_maskz_scalef_sd (__mmask8 __U, __m128d __A, __m128d __B) 6541 { 6542 return (__m128d) __builtin_ia32_scalefsd_round_mask ( (__v2df) __A, 6543 (__v2df) __B, 6544 (__v2df) _mm_setzero_pd (), 6545 (__mmask8) __U, 6546 _MM_FROUND_CUR_DIRECTION); 6547 } 6548 6549 #define _mm_maskz_scalef_round_sd(U, A, B, R) \ 6550 ((__m128d)__builtin_ia32_scalefsd_round_mask((__v2df)(__m128d)(A), \ 6551 (__v2df)(__m128d)(B), \ 6552 (__v2df)_mm_setzero_pd(), \ 6553 (__mmask8)(U), (int)(R))) 6554 6555 #define _mm_scalef_round_ss(A, B, R) \ 6556 ((__m128)__builtin_ia32_scalefss_round_mask((__v4sf)(__m128)(A), \ 6557 (__v4sf)(__m128)(B), \ 6558 (__v4sf)_mm_setzero_ps(), \ 6559 (__mmask8)-1, (int)(R))) 6560 6561 static __inline__ __m128 __DEFAULT_FN_ATTRS128 6562 _mm_scalef_ss (__m128 __A, __m128 __B) 6563 { 6564 return (__m128) __builtin_ia32_scalefss_round_mask ((__v4sf) __A, 6565 (__v4sf)( __B), (__v4sf) _mm_setzero_ps(), 6566 (__mmask8) -1, 6567 _MM_FROUND_CUR_DIRECTION); 6568 } 6569 6570 static __inline__ __m128 __DEFAULT_FN_ATTRS128 6571 _mm_mask_scalef_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 6572 { 6573 return (__m128) __builtin_ia32_scalefss_round_mask ( (__v4sf) __A, 6574 (__v4sf) __B, 6575 (__v4sf) __W, 6576 (__mmask8) __U, 6577 _MM_FROUND_CUR_DIRECTION); 6578 } 6579 6580 #define _mm_mask_scalef_round_ss(W, U, A, B, R) \ 6581 ((__m128)__builtin_ia32_scalefss_round_mask((__v4sf)(__m128)(A), \ 6582 (__v4sf)(__m128)(B), \ 6583 (__v4sf)(__m128)(W), \ 6584 (__mmask8)(U), (int)(R))) 6585 6586 static __inline__ __m128 __DEFAULT_FN_ATTRS128 6587 _mm_maskz_scalef_ss (__mmask8 __U, __m128 __A, __m128 __B) 6588 { 6589 return (__m128) __builtin_ia32_scalefss_round_mask ( (__v4sf) __A, 6590 (__v4sf) __B, 6591 (__v4sf) _mm_setzero_ps (), 6592 (__mmask8) __U, 6593 _MM_FROUND_CUR_DIRECTION); 6594 } 6595 6596 #define _mm_maskz_scalef_round_ss(U, A, B, R) \ 6597 ((__m128)__builtin_ia32_scalefss_round_mask((__v4sf)(__m128)(A), \ 6598 (__v4sf)(__m128)(B), \ 6599 (__v4sf)_mm_setzero_ps(), \ 6600 (__mmask8)(U), \ 6601 (int)(R))) 6602 6603 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6604 _mm512_srai_epi32(__m512i __A, unsigned int __B) 6605 { 6606 return (__m512i)__builtin_ia32_psradi512((__v16si)__A, __B); 6607 } 6608 6609 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6610 _mm512_mask_srai_epi32(__m512i __W, __mmask16 __U, __m512i __A, 6611 unsigned int __B) 6612 { 6613 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 6614 (__v16si)_mm512_srai_epi32(__A, __B), 6615 (__v16si)__W); 6616 } 6617 6618 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6619 _mm512_maskz_srai_epi32(__mmask16 __U, __m512i __A, 6620 unsigned int __B) { 6621 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U, 6622 (__v16si)_mm512_srai_epi32(__A, __B), 6623 (__v16si)_mm512_setzero_si512()); 6624 } 6625 6626 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6627 _mm512_srai_epi64(__m512i __A, unsigned int __B) 6628 { 6629 return (__m512i)__builtin_ia32_psraqi512((__v8di)__A, __B); 6630 } 6631 6632 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6633 _mm512_mask_srai_epi64(__m512i __W, __mmask8 __U, __m512i __A, unsigned int __B) 6634 { 6635 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 6636 (__v8di)_mm512_srai_epi64(__A, __B), 6637 (__v8di)__W); 6638 } 6639 6640 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6641 _mm512_maskz_srai_epi64(__mmask8 __U, __m512i __A, unsigned int __B) 6642 { 6643 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__U, 6644 (__v8di)_mm512_srai_epi64(__A, __B), 6645 (__v8di)_mm512_setzero_si512()); 6646 } 6647 6648 #define _mm512_shuffle_f32x4(A, B, imm) \ 6649 ((__m512)__builtin_ia32_shuf_f32x4((__v16sf)(__m512)(A), \ 6650 (__v16sf)(__m512)(B), (int)(imm))) 6651 6652 #define _mm512_mask_shuffle_f32x4(W, U, A, B, imm) \ 6653 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6654 (__v16sf)_mm512_shuffle_f32x4((A), (B), (imm)), \ 6655 (__v16sf)(__m512)(W))) 6656 6657 #define _mm512_maskz_shuffle_f32x4(U, A, B, imm) \ 6658 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6659 (__v16sf)_mm512_shuffle_f32x4((A), (B), (imm)), \ 6660 (__v16sf)_mm512_setzero_ps())) 6661 6662 #define _mm512_shuffle_f64x2(A, B, imm) \ 6663 ((__m512d)__builtin_ia32_shuf_f64x2((__v8df)(__m512d)(A), \ 6664 (__v8df)(__m512d)(B), (int)(imm))) 6665 6666 #define _mm512_mask_shuffle_f64x2(W, U, A, B, imm) \ 6667 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6668 (__v8df)_mm512_shuffle_f64x2((A), (B), (imm)), \ 6669 (__v8df)(__m512d)(W))) 6670 6671 #define _mm512_maskz_shuffle_f64x2(U, A, B, imm) \ 6672 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6673 (__v8df)_mm512_shuffle_f64x2((A), (B), (imm)), \ 6674 (__v8df)_mm512_setzero_pd())) 6675 6676 #define _mm512_shuffle_i32x4(A, B, imm) \ 6677 ((__m512i)__builtin_ia32_shuf_i32x4((__v16si)(__m512i)(A), \ 6678 (__v16si)(__m512i)(B), (int)(imm))) 6679 6680 #define _mm512_mask_shuffle_i32x4(W, U, A, B, imm) \ 6681 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 6682 (__v16si)_mm512_shuffle_i32x4((A), (B), (imm)), \ 6683 (__v16si)(__m512i)(W))) 6684 6685 #define _mm512_maskz_shuffle_i32x4(U, A, B, imm) \ 6686 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 6687 (__v16si)_mm512_shuffle_i32x4((A), (B), (imm)), \ 6688 (__v16si)_mm512_setzero_si512())) 6689 6690 #define _mm512_shuffle_i64x2(A, B, imm) \ 6691 ((__m512i)__builtin_ia32_shuf_i64x2((__v8di)(__m512i)(A), \ 6692 (__v8di)(__m512i)(B), (int)(imm))) 6693 6694 #define _mm512_mask_shuffle_i64x2(W, U, A, B, imm) \ 6695 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 6696 (__v8di)_mm512_shuffle_i64x2((A), (B), (imm)), \ 6697 (__v8di)(__m512i)(W))) 6698 6699 #define _mm512_maskz_shuffle_i64x2(U, A, B, imm) \ 6700 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 6701 (__v8di)_mm512_shuffle_i64x2((A), (B), (imm)), \ 6702 (__v8di)_mm512_setzero_si512())) 6703 6704 #define _mm512_shuffle_pd(A, B, M) \ 6705 ((__m512d)__builtin_ia32_shufpd512((__v8df)(__m512d)(A), \ 6706 (__v8df)(__m512d)(B), (int)(M))) 6707 6708 #define _mm512_mask_shuffle_pd(W, U, A, B, M) \ 6709 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6710 (__v8df)_mm512_shuffle_pd((A), (B), (M)), \ 6711 (__v8df)(__m512d)(W))) 6712 6713 #define _mm512_maskz_shuffle_pd(U, A, B, M) \ 6714 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 6715 (__v8df)_mm512_shuffle_pd((A), (B), (M)), \ 6716 (__v8df)_mm512_setzero_pd())) 6717 6718 #define _mm512_shuffle_ps(A, B, M) \ 6719 ((__m512)__builtin_ia32_shufps512((__v16sf)(__m512)(A), \ 6720 (__v16sf)(__m512)(B), (int)(M))) 6721 6722 #define _mm512_mask_shuffle_ps(W, U, A, B, M) \ 6723 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6724 (__v16sf)_mm512_shuffle_ps((A), (B), (M)), \ 6725 (__v16sf)(__m512)(W))) 6726 6727 #define _mm512_maskz_shuffle_ps(U, A, B, M) \ 6728 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 6729 (__v16sf)_mm512_shuffle_ps((A), (B), (M)), \ 6730 (__v16sf)_mm512_setzero_ps())) 6731 6732 #define _mm_sqrt_round_sd(A, B, R) \ 6733 ((__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \ 6734 (__v2df)(__m128d)(B), \ 6735 (__v2df)_mm_setzero_pd(), \ 6736 (__mmask8)-1, (int)(R))) 6737 6738 static __inline__ __m128d __DEFAULT_FN_ATTRS128 6739 _mm_mask_sqrt_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 6740 { 6741 return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A, 6742 (__v2df) __B, 6743 (__v2df) __W, 6744 (__mmask8) __U, 6745 _MM_FROUND_CUR_DIRECTION); 6746 } 6747 6748 #define _mm_mask_sqrt_round_sd(W, U, A, B, R) \ 6749 ((__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \ 6750 (__v2df)(__m128d)(B), \ 6751 (__v2df)(__m128d)(W), \ 6752 (__mmask8)(U), (int)(R))) 6753 6754 static __inline__ __m128d __DEFAULT_FN_ATTRS128 6755 _mm_maskz_sqrt_sd (__mmask8 __U, __m128d __A, __m128d __B) 6756 { 6757 return (__m128d) __builtin_ia32_sqrtsd_round_mask ( (__v2df) __A, 6758 (__v2df) __B, 6759 (__v2df) _mm_setzero_pd (), 6760 (__mmask8) __U, 6761 _MM_FROUND_CUR_DIRECTION); 6762 } 6763 6764 #define _mm_maskz_sqrt_round_sd(U, A, B, R) \ 6765 ((__m128d)__builtin_ia32_sqrtsd_round_mask((__v2df)(__m128d)(A), \ 6766 (__v2df)(__m128d)(B), \ 6767 (__v2df)_mm_setzero_pd(), \ 6768 (__mmask8)(U), (int)(R))) 6769 6770 #define _mm_sqrt_round_ss(A, B, R) \ 6771 ((__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \ 6772 (__v4sf)(__m128)(B), \ 6773 (__v4sf)_mm_setzero_ps(), \ 6774 (__mmask8)-1, (int)(R))) 6775 6776 static __inline__ __m128 __DEFAULT_FN_ATTRS128 6777 _mm_mask_sqrt_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 6778 { 6779 return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __A, 6780 (__v4sf) __B, 6781 (__v4sf) __W, 6782 (__mmask8) __U, 6783 _MM_FROUND_CUR_DIRECTION); 6784 } 6785 6786 #define _mm_mask_sqrt_round_ss(W, U, A, B, R) \ 6787 ((__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \ 6788 (__v4sf)(__m128)(B), \ 6789 (__v4sf)(__m128)(W), (__mmask8)(U), \ 6790 (int)(R))) 6791 6792 static __inline__ __m128 __DEFAULT_FN_ATTRS128 6793 _mm_maskz_sqrt_ss (__mmask8 __U, __m128 __A, __m128 __B) 6794 { 6795 return (__m128) __builtin_ia32_sqrtss_round_mask ( (__v4sf) __A, 6796 (__v4sf) __B, 6797 (__v4sf) _mm_setzero_ps (), 6798 (__mmask8) __U, 6799 _MM_FROUND_CUR_DIRECTION); 6800 } 6801 6802 #define _mm_maskz_sqrt_round_ss(U, A, B, R) \ 6803 ((__m128)__builtin_ia32_sqrtss_round_mask((__v4sf)(__m128)(A), \ 6804 (__v4sf)(__m128)(B), \ 6805 (__v4sf)_mm_setzero_ps(), \ 6806 (__mmask8)(U), (int)(R))) 6807 6808 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6809 _mm512_broadcast_f32x4(__m128 __A) 6810 { 6811 return (__m512)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A, 6812 0, 1, 2, 3, 0, 1, 2, 3, 6813 0, 1, 2, 3, 0, 1, 2, 3); 6814 } 6815 6816 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6817 _mm512_mask_broadcast_f32x4(__m512 __O, __mmask16 __M, __m128 __A) 6818 { 6819 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, 6820 (__v16sf)_mm512_broadcast_f32x4(__A), 6821 (__v16sf)__O); 6822 } 6823 6824 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6825 _mm512_maskz_broadcast_f32x4(__mmask16 __M, __m128 __A) 6826 { 6827 return (__m512)__builtin_ia32_selectps_512((__mmask16)__M, 6828 (__v16sf)_mm512_broadcast_f32x4(__A), 6829 (__v16sf)_mm512_setzero_ps()); 6830 } 6831 6832 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6833 _mm512_broadcast_f64x4(__m256d __A) 6834 { 6835 return (__m512d)__builtin_shufflevector((__v4df)__A, (__v4df)__A, 6836 0, 1, 2, 3, 0, 1, 2, 3); 6837 } 6838 6839 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6840 _mm512_mask_broadcast_f64x4(__m512d __O, __mmask8 __M, __m256d __A) 6841 { 6842 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M, 6843 (__v8df)_mm512_broadcast_f64x4(__A), 6844 (__v8df)__O); 6845 } 6846 6847 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6848 _mm512_maskz_broadcast_f64x4(__mmask8 __M, __m256d __A) 6849 { 6850 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__M, 6851 (__v8df)_mm512_broadcast_f64x4(__A), 6852 (__v8df)_mm512_setzero_pd()); 6853 } 6854 6855 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6856 _mm512_broadcast_i32x4(__m128i __A) 6857 { 6858 return (__m512i)__builtin_shufflevector((__v4si)__A, (__v4si)__A, 6859 0, 1, 2, 3, 0, 1, 2, 3, 6860 0, 1, 2, 3, 0, 1, 2, 3); 6861 } 6862 6863 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6864 _mm512_mask_broadcast_i32x4(__m512i __O, __mmask16 __M, __m128i __A) 6865 { 6866 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 6867 (__v16si)_mm512_broadcast_i32x4(__A), 6868 (__v16si)__O); 6869 } 6870 6871 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6872 _mm512_maskz_broadcast_i32x4(__mmask16 __M, __m128i __A) 6873 { 6874 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 6875 (__v16si)_mm512_broadcast_i32x4(__A), 6876 (__v16si)_mm512_setzero_si512()); 6877 } 6878 6879 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6880 _mm512_broadcast_i64x4(__m256i __A) 6881 { 6882 return (__m512i)__builtin_shufflevector((__v4di)__A, (__v4di)__A, 6883 0, 1, 2, 3, 0, 1, 2, 3); 6884 } 6885 6886 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6887 _mm512_mask_broadcast_i64x4(__m512i __O, __mmask8 __M, __m256i __A) 6888 { 6889 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 6890 (__v8di)_mm512_broadcast_i64x4(__A), 6891 (__v8di)__O); 6892 } 6893 6894 static __inline__ __m512i __DEFAULT_FN_ATTRS512 6895 _mm512_maskz_broadcast_i64x4(__mmask8 __M, __m256i __A) 6896 { 6897 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 6898 (__v8di)_mm512_broadcast_i64x4(__A), 6899 (__v8di)_mm512_setzero_si512()); 6900 } 6901 6902 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6903 _mm512_mask_broadcastsd_pd (__m512d __O, __mmask8 __M, __m128d __A) 6904 { 6905 return (__m512d)__builtin_ia32_selectpd_512(__M, 6906 (__v8df) _mm512_broadcastsd_pd(__A), 6907 (__v8df) __O); 6908 } 6909 6910 static __inline__ __m512d __DEFAULT_FN_ATTRS512 6911 _mm512_maskz_broadcastsd_pd (__mmask8 __M, __m128d __A) 6912 { 6913 return (__m512d)__builtin_ia32_selectpd_512(__M, 6914 (__v8df) _mm512_broadcastsd_pd(__A), 6915 (__v8df) _mm512_setzero_pd()); 6916 } 6917 6918 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6919 _mm512_mask_broadcastss_ps (__m512 __O, __mmask16 __M, __m128 __A) 6920 { 6921 return (__m512)__builtin_ia32_selectps_512(__M, 6922 (__v16sf) _mm512_broadcastss_ps(__A), 6923 (__v16sf) __O); 6924 } 6925 6926 static __inline__ __m512 __DEFAULT_FN_ATTRS512 6927 _mm512_maskz_broadcastss_ps (__mmask16 __M, __m128 __A) 6928 { 6929 return (__m512)__builtin_ia32_selectps_512(__M, 6930 (__v16sf) _mm512_broadcastss_ps(__A), 6931 (__v16sf) _mm512_setzero_ps()); 6932 } 6933 6934 static __inline__ __m128i __DEFAULT_FN_ATTRS512 6935 _mm512_cvtsepi32_epi8 (__m512i __A) 6936 { 6937 return (__m128i) __builtin_ia32_pmovsdb512_mask ((__v16si) __A, 6938 (__v16qi) _mm_undefined_si128 (), 6939 (__mmask16) -1); 6940 } 6941 6942 static __inline__ __m128i __DEFAULT_FN_ATTRS512 6943 _mm512_mask_cvtsepi32_epi8 (__m128i __O, __mmask16 __M, __m512i __A) 6944 { 6945 return (__m128i) __builtin_ia32_pmovsdb512_mask ((__v16si) __A, 6946 (__v16qi) __O, __M); 6947 } 6948 6949 static __inline__ __m128i __DEFAULT_FN_ATTRS512 6950 _mm512_maskz_cvtsepi32_epi8 (__mmask16 __M, __m512i __A) 6951 { 6952 return (__m128i) __builtin_ia32_pmovsdb512_mask ((__v16si) __A, 6953 (__v16qi) _mm_setzero_si128 (), 6954 __M); 6955 } 6956 6957 static __inline__ void __DEFAULT_FN_ATTRS512 6958 _mm512_mask_cvtsepi32_storeu_epi8 (void * __P, __mmask16 __M, __m512i __A) 6959 { 6960 __builtin_ia32_pmovsdb512mem_mask ((__v16qi *) __P, (__v16si) __A, __M); 6961 } 6962 6963 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6964 _mm512_cvtsepi32_epi16 (__m512i __A) 6965 { 6966 return (__m256i) __builtin_ia32_pmovsdw512_mask ((__v16si) __A, 6967 (__v16hi) _mm256_undefined_si256 (), 6968 (__mmask16) -1); 6969 } 6970 6971 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6972 _mm512_mask_cvtsepi32_epi16 (__m256i __O, __mmask16 __M, __m512i __A) 6973 { 6974 return (__m256i) __builtin_ia32_pmovsdw512_mask ((__v16si) __A, 6975 (__v16hi) __O, __M); 6976 } 6977 6978 static __inline__ __m256i __DEFAULT_FN_ATTRS512 6979 _mm512_maskz_cvtsepi32_epi16 (__mmask16 __M, __m512i __A) 6980 { 6981 return (__m256i) __builtin_ia32_pmovsdw512_mask ((__v16si) __A, 6982 (__v16hi) _mm256_setzero_si256 (), 6983 __M); 6984 } 6985 6986 static __inline__ void __DEFAULT_FN_ATTRS512 6987 _mm512_mask_cvtsepi32_storeu_epi16 (void *__P, __mmask16 __M, __m512i __A) 6988 { 6989 __builtin_ia32_pmovsdw512mem_mask ((__v16hi*) __P, (__v16si) __A, __M); 6990 } 6991 6992 static __inline__ __m128i __DEFAULT_FN_ATTRS512 6993 _mm512_cvtsepi64_epi8 (__m512i __A) 6994 { 6995 return (__m128i) __builtin_ia32_pmovsqb512_mask ((__v8di) __A, 6996 (__v16qi) _mm_undefined_si128 (), 6997 (__mmask8) -1); 6998 } 6999 7000 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7001 _mm512_mask_cvtsepi64_epi8 (__m128i __O, __mmask8 __M, __m512i __A) 7002 { 7003 return (__m128i) __builtin_ia32_pmovsqb512_mask ((__v8di) __A, 7004 (__v16qi) __O, __M); 7005 } 7006 7007 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7008 _mm512_maskz_cvtsepi64_epi8 (__mmask8 __M, __m512i __A) 7009 { 7010 return (__m128i) __builtin_ia32_pmovsqb512_mask ((__v8di) __A, 7011 (__v16qi) _mm_setzero_si128 (), 7012 __M); 7013 } 7014 7015 static __inline__ void __DEFAULT_FN_ATTRS512 7016 _mm512_mask_cvtsepi64_storeu_epi8 (void * __P, __mmask8 __M, __m512i __A) 7017 { 7018 __builtin_ia32_pmovsqb512mem_mask ((__v16qi *) __P, (__v8di) __A, __M); 7019 } 7020 7021 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7022 _mm512_cvtsepi64_epi32 (__m512i __A) 7023 { 7024 return (__m256i) __builtin_ia32_pmovsqd512_mask ((__v8di) __A, 7025 (__v8si) _mm256_undefined_si256 (), 7026 (__mmask8) -1); 7027 } 7028 7029 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7030 _mm512_mask_cvtsepi64_epi32 (__m256i __O, __mmask8 __M, __m512i __A) 7031 { 7032 return (__m256i) __builtin_ia32_pmovsqd512_mask ((__v8di) __A, 7033 (__v8si) __O, __M); 7034 } 7035 7036 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7037 _mm512_maskz_cvtsepi64_epi32 (__mmask8 __M, __m512i __A) 7038 { 7039 return (__m256i) __builtin_ia32_pmovsqd512_mask ((__v8di) __A, 7040 (__v8si) _mm256_setzero_si256 (), 7041 __M); 7042 } 7043 7044 static __inline__ void __DEFAULT_FN_ATTRS512 7045 _mm512_mask_cvtsepi64_storeu_epi32 (void *__P, __mmask8 __M, __m512i __A) 7046 { 7047 __builtin_ia32_pmovsqd512mem_mask ((__v8si *) __P, (__v8di) __A, __M); 7048 } 7049 7050 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7051 _mm512_cvtsepi64_epi16 (__m512i __A) 7052 { 7053 return (__m128i) __builtin_ia32_pmovsqw512_mask ((__v8di) __A, 7054 (__v8hi) _mm_undefined_si128 (), 7055 (__mmask8) -1); 7056 } 7057 7058 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7059 _mm512_mask_cvtsepi64_epi16 (__m128i __O, __mmask8 __M, __m512i __A) 7060 { 7061 return (__m128i) __builtin_ia32_pmovsqw512_mask ((__v8di) __A, 7062 (__v8hi) __O, __M); 7063 } 7064 7065 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7066 _mm512_maskz_cvtsepi64_epi16 (__mmask8 __M, __m512i __A) 7067 { 7068 return (__m128i) __builtin_ia32_pmovsqw512_mask ((__v8di) __A, 7069 (__v8hi) _mm_setzero_si128 (), 7070 __M); 7071 } 7072 7073 static __inline__ void __DEFAULT_FN_ATTRS512 7074 _mm512_mask_cvtsepi64_storeu_epi16 (void * __P, __mmask8 __M, __m512i __A) 7075 { 7076 __builtin_ia32_pmovsqw512mem_mask ((__v8hi *) __P, (__v8di) __A, __M); 7077 } 7078 7079 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7080 _mm512_cvtusepi32_epi8 (__m512i __A) 7081 { 7082 return (__m128i) __builtin_ia32_pmovusdb512_mask ((__v16si) __A, 7083 (__v16qi) _mm_undefined_si128 (), 7084 (__mmask16) -1); 7085 } 7086 7087 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7088 _mm512_mask_cvtusepi32_epi8 (__m128i __O, __mmask16 __M, __m512i __A) 7089 { 7090 return (__m128i) __builtin_ia32_pmovusdb512_mask ((__v16si) __A, 7091 (__v16qi) __O, 7092 __M); 7093 } 7094 7095 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7096 _mm512_maskz_cvtusepi32_epi8 (__mmask16 __M, __m512i __A) 7097 { 7098 return (__m128i) __builtin_ia32_pmovusdb512_mask ((__v16si) __A, 7099 (__v16qi) _mm_setzero_si128 (), 7100 __M); 7101 } 7102 7103 static __inline__ void __DEFAULT_FN_ATTRS512 7104 _mm512_mask_cvtusepi32_storeu_epi8 (void * __P, __mmask16 __M, __m512i __A) 7105 { 7106 __builtin_ia32_pmovusdb512mem_mask ((__v16qi *) __P, (__v16si) __A, __M); 7107 } 7108 7109 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7110 _mm512_cvtusepi32_epi16 (__m512i __A) 7111 { 7112 return (__m256i) __builtin_ia32_pmovusdw512_mask ((__v16si) __A, 7113 (__v16hi) _mm256_undefined_si256 (), 7114 (__mmask16) -1); 7115 } 7116 7117 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7118 _mm512_mask_cvtusepi32_epi16 (__m256i __O, __mmask16 __M, __m512i __A) 7119 { 7120 return (__m256i) __builtin_ia32_pmovusdw512_mask ((__v16si) __A, 7121 (__v16hi) __O, 7122 __M); 7123 } 7124 7125 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7126 _mm512_maskz_cvtusepi32_epi16 (__mmask16 __M, __m512i __A) 7127 { 7128 return (__m256i) __builtin_ia32_pmovusdw512_mask ((__v16si) __A, 7129 (__v16hi) _mm256_setzero_si256 (), 7130 __M); 7131 } 7132 7133 static __inline__ void __DEFAULT_FN_ATTRS512 7134 _mm512_mask_cvtusepi32_storeu_epi16 (void *__P, __mmask16 __M, __m512i __A) 7135 { 7136 __builtin_ia32_pmovusdw512mem_mask ((__v16hi*) __P, (__v16si) __A, __M); 7137 } 7138 7139 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7140 _mm512_cvtusepi64_epi8 (__m512i __A) 7141 { 7142 return (__m128i) __builtin_ia32_pmovusqb512_mask ((__v8di) __A, 7143 (__v16qi) _mm_undefined_si128 (), 7144 (__mmask8) -1); 7145 } 7146 7147 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7148 _mm512_mask_cvtusepi64_epi8 (__m128i __O, __mmask8 __M, __m512i __A) 7149 { 7150 return (__m128i) __builtin_ia32_pmovusqb512_mask ((__v8di) __A, 7151 (__v16qi) __O, 7152 __M); 7153 } 7154 7155 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7156 _mm512_maskz_cvtusepi64_epi8 (__mmask8 __M, __m512i __A) 7157 { 7158 return (__m128i) __builtin_ia32_pmovusqb512_mask ((__v8di) __A, 7159 (__v16qi) _mm_setzero_si128 (), 7160 __M); 7161 } 7162 7163 static __inline__ void __DEFAULT_FN_ATTRS512 7164 _mm512_mask_cvtusepi64_storeu_epi8 (void * __P, __mmask8 __M, __m512i __A) 7165 { 7166 __builtin_ia32_pmovusqb512mem_mask ((__v16qi *) __P, (__v8di) __A, __M); 7167 } 7168 7169 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7170 _mm512_cvtusepi64_epi32 (__m512i __A) 7171 { 7172 return (__m256i) __builtin_ia32_pmovusqd512_mask ((__v8di) __A, 7173 (__v8si) _mm256_undefined_si256 (), 7174 (__mmask8) -1); 7175 } 7176 7177 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7178 _mm512_mask_cvtusepi64_epi32 (__m256i __O, __mmask8 __M, __m512i __A) 7179 { 7180 return (__m256i) __builtin_ia32_pmovusqd512_mask ((__v8di) __A, 7181 (__v8si) __O, __M); 7182 } 7183 7184 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7185 _mm512_maskz_cvtusepi64_epi32 (__mmask8 __M, __m512i __A) 7186 { 7187 return (__m256i) __builtin_ia32_pmovusqd512_mask ((__v8di) __A, 7188 (__v8si) _mm256_setzero_si256 (), 7189 __M); 7190 } 7191 7192 static __inline__ void __DEFAULT_FN_ATTRS512 7193 _mm512_mask_cvtusepi64_storeu_epi32 (void* __P, __mmask8 __M, __m512i __A) 7194 { 7195 __builtin_ia32_pmovusqd512mem_mask ((__v8si*) __P, (__v8di) __A, __M); 7196 } 7197 7198 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7199 _mm512_cvtusepi64_epi16 (__m512i __A) 7200 { 7201 return (__m128i) __builtin_ia32_pmovusqw512_mask ((__v8di) __A, 7202 (__v8hi) _mm_undefined_si128 (), 7203 (__mmask8) -1); 7204 } 7205 7206 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7207 _mm512_mask_cvtusepi64_epi16 (__m128i __O, __mmask8 __M, __m512i __A) 7208 { 7209 return (__m128i) __builtin_ia32_pmovusqw512_mask ((__v8di) __A, 7210 (__v8hi) __O, __M); 7211 } 7212 7213 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7214 _mm512_maskz_cvtusepi64_epi16 (__mmask8 __M, __m512i __A) 7215 { 7216 return (__m128i) __builtin_ia32_pmovusqw512_mask ((__v8di) __A, 7217 (__v8hi) _mm_setzero_si128 (), 7218 __M); 7219 } 7220 7221 static __inline__ void __DEFAULT_FN_ATTRS512 7222 _mm512_mask_cvtusepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A) 7223 { 7224 __builtin_ia32_pmovusqw512mem_mask ((__v8hi*) __P, (__v8di) __A, __M); 7225 } 7226 7227 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7228 _mm512_cvtepi32_epi8 (__m512i __A) 7229 { 7230 return (__m128i) __builtin_ia32_pmovdb512_mask ((__v16si) __A, 7231 (__v16qi) _mm_undefined_si128 (), 7232 (__mmask16) -1); 7233 } 7234 7235 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7236 _mm512_mask_cvtepi32_epi8 (__m128i __O, __mmask16 __M, __m512i __A) 7237 { 7238 return (__m128i) __builtin_ia32_pmovdb512_mask ((__v16si) __A, 7239 (__v16qi) __O, __M); 7240 } 7241 7242 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7243 _mm512_maskz_cvtepi32_epi8 (__mmask16 __M, __m512i __A) 7244 { 7245 return (__m128i) __builtin_ia32_pmovdb512_mask ((__v16si) __A, 7246 (__v16qi) _mm_setzero_si128 (), 7247 __M); 7248 } 7249 7250 static __inline__ void __DEFAULT_FN_ATTRS512 7251 _mm512_mask_cvtepi32_storeu_epi8 (void * __P, __mmask16 __M, __m512i __A) 7252 { 7253 __builtin_ia32_pmovdb512mem_mask ((__v16qi *) __P, (__v16si) __A, __M); 7254 } 7255 7256 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7257 _mm512_cvtepi32_epi16 (__m512i __A) 7258 { 7259 return (__m256i) __builtin_ia32_pmovdw512_mask ((__v16si) __A, 7260 (__v16hi) _mm256_undefined_si256 (), 7261 (__mmask16) -1); 7262 } 7263 7264 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7265 _mm512_mask_cvtepi32_epi16 (__m256i __O, __mmask16 __M, __m512i __A) 7266 { 7267 return (__m256i) __builtin_ia32_pmovdw512_mask ((__v16si) __A, 7268 (__v16hi) __O, __M); 7269 } 7270 7271 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7272 _mm512_maskz_cvtepi32_epi16 (__mmask16 __M, __m512i __A) 7273 { 7274 return (__m256i) __builtin_ia32_pmovdw512_mask ((__v16si) __A, 7275 (__v16hi) _mm256_setzero_si256 (), 7276 __M); 7277 } 7278 7279 static __inline__ void __DEFAULT_FN_ATTRS512 7280 _mm512_mask_cvtepi32_storeu_epi16 (void * __P, __mmask16 __M, __m512i __A) 7281 { 7282 __builtin_ia32_pmovdw512mem_mask ((__v16hi *) __P, (__v16si) __A, __M); 7283 } 7284 7285 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7286 _mm512_cvtepi64_epi8 (__m512i __A) 7287 { 7288 return (__m128i) __builtin_ia32_pmovqb512_mask ((__v8di) __A, 7289 (__v16qi) _mm_undefined_si128 (), 7290 (__mmask8) -1); 7291 } 7292 7293 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7294 _mm512_mask_cvtepi64_epi8 (__m128i __O, __mmask8 __M, __m512i __A) 7295 { 7296 return (__m128i) __builtin_ia32_pmovqb512_mask ((__v8di) __A, 7297 (__v16qi) __O, __M); 7298 } 7299 7300 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7301 _mm512_maskz_cvtepi64_epi8 (__mmask8 __M, __m512i __A) 7302 { 7303 return (__m128i) __builtin_ia32_pmovqb512_mask ((__v8di) __A, 7304 (__v16qi) _mm_setzero_si128 (), 7305 __M); 7306 } 7307 7308 static __inline__ void __DEFAULT_FN_ATTRS512 7309 _mm512_mask_cvtepi64_storeu_epi8 (void * __P, __mmask8 __M, __m512i __A) 7310 { 7311 __builtin_ia32_pmovqb512mem_mask ((__v16qi *) __P, (__v8di) __A, __M); 7312 } 7313 7314 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7315 _mm512_cvtepi64_epi32 (__m512i __A) 7316 { 7317 return (__m256i) __builtin_ia32_pmovqd512_mask ((__v8di) __A, 7318 (__v8si) _mm256_undefined_si256 (), 7319 (__mmask8) -1); 7320 } 7321 7322 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7323 _mm512_mask_cvtepi64_epi32 (__m256i __O, __mmask8 __M, __m512i __A) 7324 { 7325 return (__m256i) __builtin_ia32_pmovqd512_mask ((__v8di) __A, 7326 (__v8si) __O, __M); 7327 } 7328 7329 static __inline__ __m256i __DEFAULT_FN_ATTRS512 7330 _mm512_maskz_cvtepi64_epi32 (__mmask8 __M, __m512i __A) 7331 { 7332 return (__m256i) __builtin_ia32_pmovqd512_mask ((__v8di) __A, 7333 (__v8si) _mm256_setzero_si256 (), 7334 __M); 7335 } 7336 7337 static __inline__ void __DEFAULT_FN_ATTRS512 7338 _mm512_mask_cvtepi64_storeu_epi32 (void* __P, __mmask8 __M, __m512i __A) 7339 { 7340 __builtin_ia32_pmovqd512mem_mask ((__v8si *) __P, (__v8di) __A, __M); 7341 } 7342 7343 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7344 _mm512_cvtepi64_epi16 (__m512i __A) 7345 { 7346 return (__m128i) __builtin_ia32_pmovqw512_mask ((__v8di) __A, 7347 (__v8hi) _mm_undefined_si128 (), 7348 (__mmask8) -1); 7349 } 7350 7351 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7352 _mm512_mask_cvtepi64_epi16 (__m128i __O, __mmask8 __M, __m512i __A) 7353 { 7354 return (__m128i) __builtin_ia32_pmovqw512_mask ((__v8di) __A, 7355 (__v8hi) __O, __M); 7356 } 7357 7358 static __inline__ __m128i __DEFAULT_FN_ATTRS512 7359 _mm512_maskz_cvtepi64_epi16 (__mmask8 __M, __m512i __A) 7360 { 7361 return (__m128i) __builtin_ia32_pmovqw512_mask ((__v8di) __A, 7362 (__v8hi) _mm_setzero_si128 (), 7363 __M); 7364 } 7365 7366 static __inline__ void __DEFAULT_FN_ATTRS512 7367 _mm512_mask_cvtepi64_storeu_epi16 (void *__P, __mmask8 __M, __m512i __A) 7368 { 7369 __builtin_ia32_pmovqw512mem_mask ((__v8hi *) __P, (__v8di) __A, __M); 7370 } 7371 7372 #define _mm512_extracti32x4_epi32(A, imm) \ 7373 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \ 7374 (__v4si)_mm_undefined_si128(), \ 7375 (__mmask8)-1)) 7376 7377 #define _mm512_mask_extracti32x4_epi32(W, U, A, imm) \ 7378 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \ 7379 (__v4si)(__m128i)(W), \ 7380 (__mmask8)(U))) 7381 7382 #define _mm512_maskz_extracti32x4_epi32(U, A, imm) \ 7383 ((__m128i)__builtin_ia32_extracti32x4_mask((__v16si)(__m512i)(A), (int)(imm), \ 7384 (__v4si)_mm_setzero_si128(), \ 7385 (__mmask8)(U))) 7386 7387 #define _mm512_extracti64x4_epi64(A, imm) \ 7388 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \ 7389 (__v4di)_mm256_undefined_si256(), \ 7390 (__mmask8)-1)) 7391 7392 #define _mm512_mask_extracti64x4_epi64(W, U, A, imm) \ 7393 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \ 7394 (__v4di)(__m256i)(W), \ 7395 (__mmask8)(U))) 7396 7397 #define _mm512_maskz_extracti64x4_epi64(U, A, imm) \ 7398 ((__m256i)__builtin_ia32_extracti64x4_mask((__v8di)(__m512i)(A), (int)(imm), \ 7399 (__v4di)_mm256_setzero_si256(), \ 7400 (__mmask8)(U))) 7401 7402 #define _mm512_insertf64x4(A, B, imm) \ 7403 ((__m512d)__builtin_ia32_insertf64x4((__v8df)(__m512d)(A), \ 7404 (__v4df)(__m256d)(B), (int)(imm))) 7405 7406 #define _mm512_mask_insertf64x4(W, U, A, B, imm) \ 7407 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 7408 (__v8df)_mm512_insertf64x4((A), (B), (imm)), \ 7409 (__v8df)(__m512d)(W))) 7410 7411 #define _mm512_maskz_insertf64x4(U, A, B, imm) \ 7412 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 7413 (__v8df)_mm512_insertf64x4((A), (B), (imm)), \ 7414 (__v8df)_mm512_setzero_pd())) 7415 7416 #define _mm512_inserti64x4(A, B, imm) \ 7417 ((__m512i)__builtin_ia32_inserti64x4((__v8di)(__m512i)(A), \ 7418 (__v4di)(__m256i)(B), (int)(imm))) 7419 7420 #define _mm512_mask_inserti64x4(W, U, A, B, imm) \ 7421 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 7422 (__v8di)_mm512_inserti64x4((A), (B), (imm)), \ 7423 (__v8di)(__m512i)(W))) 7424 7425 #define _mm512_maskz_inserti64x4(U, A, B, imm) \ 7426 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 7427 (__v8di)_mm512_inserti64x4((A), (B), (imm)), \ 7428 (__v8di)_mm512_setzero_si512())) 7429 7430 #define _mm512_insertf32x4(A, B, imm) \ 7431 ((__m512)__builtin_ia32_insertf32x4((__v16sf)(__m512)(A), \ 7432 (__v4sf)(__m128)(B), (int)(imm))) 7433 7434 #define _mm512_mask_insertf32x4(W, U, A, B, imm) \ 7435 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 7436 (__v16sf)_mm512_insertf32x4((A), (B), (imm)), \ 7437 (__v16sf)(__m512)(W))) 7438 7439 #define _mm512_maskz_insertf32x4(U, A, B, imm) \ 7440 ((__m512)__builtin_ia32_selectps_512((__mmask16)(U), \ 7441 (__v16sf)_mm512_insertf32x4((A), (B), (imm)), \ 7442 (__v16sf)_mm512_setzero_ps())) 7443 7444 #define _mm512_inserti32x4(A, B, imm) \ 7445 ((__m512i)__builtin_ia32_inserti32x4((__v16si)(__m512i)(A), \ 7446 (__v4si)(__m128i)(B), (int)(imm))) 7447 7448 #define _mm512_mask_inserti32x4(W, U, A, B, imm) \ 7449 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 7450 (__v16si)_mm512_inserti32x4((A), (B), (imm)), \ 7451 (__v16si)(__m512i)(W))) 7452 7453 #define _mm512_maskz_inserti32x4(U, A, B, imm) \ 7454 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 7455 (__v16si)_mm512_inserti32x4((A), (B), (imm)), \ 7456 (__v16si)_mm512_setzero_si512())) 7457 7458 #define _mm512_getmant_round_pd(A, B, C, R) \ 7459 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7460 (int)(((C)<<2) | (B)), \ 7461 (__v8df)_mm512_undefined_pd(), \ 7462 (__mmask8)-1, (int)(R))) 7463 7464 #define _mm512_mask_getmant_round_pd(W, U, A, B, C, R) \ 7465 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7466 (int)(((C)<<2) | (B)), \ 7467 (__v8df)(__m512d)(W), \ 7468 (__mmask8)(U), (int)(R))) 7469 7470 #define _mm512_maskz_getmant_round_pd(U, A, B, C, R) \ 7471 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7472 (int)(((C)<<2) | (B)), \ 7473 (__v8df)_mm512_setzero_pd(), \ 7474 (__mmask8)(U), (int)(R))) 7475 7476 #define _mm512_getmant_pd(A, B, C) \ 7477 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7478 (int)(((C)<<2) | (B)), \ 7479 (__v8df)_mm512_setzero_pd(), \ 7480 (__mmask8)-1, \ 7481 _MM_FROUND_CUR_DIRECTION)) 7482 7483 #define _mm512_mask_getmant_pd(W, U, A, B, C) \ 7484 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7485 (int)(((C)<<2) | (B)), \ 7486 (__v8df)(__m512d)(W), \ 7487 (__mmask8)(U), \ 7488 _MM_FROUND_CUR_DIRECTION)) 7489 7490 #define _mm512_maskz_getmant_pd(U, A, B, C) \ 7491 ((__m512d)__builtin_ia32_getmantpd512_mask((__v8df)(__m512d)(A), \ 7492 (int)(((C)<<2) | (B)), \ 7493 (__v8df)_mm512_setzero_pd(), \ 7494 (__mmask8)(U), \ 7495 _MM_FROUND_CUR_DIRECTION)) 7496 7497 #define _mm512_getmant_round_ps(A, B, C, R) \ 7498 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7499 (int)(((C)<<2) | (B)), \ 7500 (__v16sf)_mm512_undefined_ps(), \ 7501 (__mmask16)-1, (int)(R))) 7502 7503 #define _mm512_mask_getmant_round_ps(W, U, A, B, C, R) \ 7504 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7505 (int)(((C)<<2) | (B)), \ 7506 (__v16sf)(__m512)(W), \ 7507 (__mmask16)(U), (int)(R))) 7508 7509 #define _mm512_maskz_getmant_round_ps(U, A, B, C, R) \ 7510 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7511 (int)(((C)<<2) | (B)), \ 7512 (__v16sf)_mm512_setzero_ps(), \ 7513 (__mmask16)(U), (int)(R))) 7514 7515 #define _mm512_getmant_ps(A, B, C) \ 7516 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7517 (int)(((C)<<2)|(B)), \ 7518 (__v16sf)_mm512_undefined_ps(), \ 7519 (__mmask16)-1, \ 7520 _MM_FROUND_CUR_DIRECTION)) 7521 7522 #define _mm512_mask_getmant_ps(W, U, A, B, C) \ 7523 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7524 (int)(((C)<<2)|(B)), \ 7525 (__v16sf)(__m512)(W), \ 7526 (__mmask16)(U), \ 7527 _MM_FROUND_CUR_DIRECTION)) 7528 7529 #define _mm512_maskz_getmant_ps(U, A, B, C) \ 7530 ((__m512)__builtin_ia32_getmantps512_mask((__v16sf)(__m512)(A), \ 7531 (int)(((C)<<2)|(B)), \ 7532 (__v16sf)_mm512_setzero_ps(), \ 7533 (__mmask16)(U), \ 7534 _MM_FROUND_CUR_DIRECTION)) 7535 7536 #define _mm512_getexp_round_pd(A, R) \ 7537 ((__m512d)__builtin_ia32_getexppd512_mask((__v8df)(__m512d)(A), \ 7538 (__v8df)_mm512_undefined_pd(), \ 7539 (__mmask8)-1, (int)(R))) 7540 7541 #define _mm512_mask_getexp_round_pd(W, U, A, R) \ 7542 ((__m512d)__builtin_ia32_getexppd512_mask((__v8df)(__m512d)(A), \ 7543 (__v8df)(__m512d)(W), \ 7544 (__mmask8)(U), (int)(R))) 7545 7546 #define _mm512_maskz_getexp_round_pd(U, A, R) \ 7547 ((__m512d)__builtin_ia32_getexppd512_mask((__v8df)(__m512d)(A), \ 7548 (__v8df)_mm512_setzero_pd(), \ 7549 (__mmask8)(U), (int)(R))) 7550 7551 static __inline__ __m512d __DEFAULT_FN_ATTRS512 7552 _mm512_getexp_pd (__m512d __A) 7553 { 7554 return (__m512d) __builtin_ia32_getexppd512_mask ((__v8df) __A, 7555 (__v8df) _mm512_undefined_pd (), 7556 (__mmask8) -1, 7557 _MM_FROUND_CUR_DIRECTION); 7558 } 7559 7560 static __inline__ __m512d __DEFAULT_FN_ATTRS512 7561 _mm512_mask_getexp_pd (__m512d __W, __mmask8 __U, __m512d __A) 7562 { 7563 return (__m512d) __builtin_ia32_getexppd512_mask ((__v8df) __A, 7564 (__v8df) __W, 7565 (__mmask8) __U, 7566 _MM_FROUND_CUR_DIRECTION); 7567 } 7568 7569 static __inline__ __m512d __DEFAULT_FN_ATTRS512 7570 _mm512_maskz_getexp_pd (__mmask8 __U, __m512d __A) 7571 { 7572 return (__m512d) __builtin_ia32_getexppd512_mask ((__v8df) __A, 7573 (__v8df) _mm512_setzero_pd (), 7574 (__mmask8) __U, 7575 _MM_FROUND_CUR_DIRECTION); 7576 } 7577 7578 #define _mm512_getexp_round_ps(A, R) \ 7579 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \ 7580 (__v16sf)_mm512_undefined_ps(), \ 7581 (__mmask16)-1, (int)(R))) 7582 7583 #define _mm512_mask_getexp_round_ps(W, U, A, R) \ 7584 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \ 7585 (__v16sf)(__m512)(W), \ 7586 (__mmask16)(U), (int)(R))) 7587 7588 #define _mm512_maskz_getexp_round_ps(U, A, R) \ 7589 ((__m512)__builtin_ia32_getexpps512_mask((__v16sf)(__m512)(A), \ 7590 (__v16sf)_mm512_setzero_ps(), \ 7591 (__mmask16)(U), (int)(R))) 7592 7593 static __inline__ __m512 __DEFAULT_FN_ATTRS512 7594 _mm512_getexp_ps (__m512 __A) 7595 { 7596 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A, 7597 (__v16sf) _mm512_undefined_ps (), 7598 (__mmask16) -1, 7599 _MM_FROUND_CUR_DIRECTION); 7600 } 7601 7602 static __inline__ __m512 __DEFAULT_FN_ATTRS512 7603 _mm512_mask_getexp_ps (__m512 __W, __mmask16 __U, __m512 __A) 7604 { 7605 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A, 7606 (__v16sf) __W, 7607 (__mmask16) __U, 7608 _MM_FROUND_CUR_DIRECTION); 7609 } 7610 7611 static __inline__ __m512 __DEFAULT_FN_ATTRS512 7612 _mm512_maskz_getexp_ps (__mmask16 __U, __m512 __A) 7613 { 7614 return (__m512) __builtin_ia32_getexpps512_mask ((__v16sf) __A, 7615 (__v16sf) _mm512_setzero_ps (), 7616 (__mmask16) __U, 7617 _MM_FROUND_CUR_DIRECTION); 7618 } 7619 7620 #define _mm512_i64gather_ps(index, addr, scale) \ 7621 ((__m256)__builtin_ia32_gatherdiv16sf((__v8sf)_mm256_undefined_ps(), \ 7622 (void const *)(addr), \ 7623 (__v8di)(__m512i)(index), (__mmask8)-1, \ 7624 (int)(scale))) 7625 7626 #define _mm512_mask_i64gather_ps(v1_old, mask, index, addr, scale) \ 7627 ((__m256)__builtin_ia32_gatherdiv16sf((__v8sf)(__m256)(v1_old),\ 7628 (void const *)(addr), \ 7629 (__v8di)(__m512i)(index), \ 7630 (__mmask8)(mask), (int)(scale))) 7631 7632 #define _mm512_i64gather_epi32(index, addr, scale) \ 7633 ((__m256i)__builtin_ia32_gatherdiv16si((__v8si)_mm256_undefined_si256(), \ 7634 (void const *)(addr), \ 7635 (__v8di)(__m512i)(index), \ 7636 (__mmask8)-1, (int)(scale))) 7637 7638 #define _mm512_mask_i64gather_epi32(v1_old, mask, index, addr, scale) \ 7639 ((__m256i)__builtin_ia32_gatherdiv16si((__v8si)(__m256i)(v1_old), \ 7640 (void const *)(addr), \ 7641 (__v8di)(__m512i)(index), \ 7642 (__mmask8)(mask), (int)(scale))) 7643 7644 #define _mm512_i64gather_pd(index, addr, scale) \ 7645 ((__m512d)__builtin_ia32_gatherdiv8df((__v8df)_mm512_undefined_pd(), \ 7646 (void const *)(addr), \ 7647 (__v8di)(__m512i)(index), (__mmask8)-1, \ 7648 (int)(scale))) 7649 7650 #define _mm512_mask_i64gather_pd(v1_old, mask, index, addr, scale) \ 7651 ((__m512d)__builtin_ia32_gatherdiv8df((__v8df)(__m512d)(v1_old), \ 7652 (void const *)(addr), \ 7653 (__v8di)(__m512i)(index), \ 7654 (__mmask8)(mask), (int)(scale))) 7655 7656 #define _mm512_i64gather_epi64(index, addr, scale) \ 7657 ((__m512i)__builtin_ia32_gatherdiv8di((__v8di)_mm512_undefined_epi32(), \ 7658 (void const *)(addr), \ 7659 (__v8di)(__m512i)(index), (__mmask8)-1, \ 7660 (int)(scale))) 7661 7662 #define _mm512_mask_i64gather_epi64(v1_old, mask, index, addr, scale) \ 7663 ((__m512i)__builtin_ia32_gatherdiv8di((__v8di)(__m512i)(v1_old), \ 7664 (void const *)(addr), \ 7665 (__v8di)(__m512i)(index), \ 7666 (__mmask8)(mask), (int)(scale))) 7667 7668 #define _mm512_i32gather_ps(index, addr, scale) \ 7669 ((__m512)__builtin_ia32_gathersiv16sf((__v16sf)_mm512_undefined_ps(), \ 7670 (void const *)(addr), \ 7671 (__v16si)(__m512)(index), \ 7672 (__mmask16)-1, (int)(scale))) 7673 7674 #define _mm512_mask_i32gather_ps(v1_old, mask, index, addr, scale) \ 7675 ((__m512)__builtin_ia32_gathersiv16sf((__v16sf)(__m512)(v1_old), \ 7676 (void const *)(addr), \ 7677 (__v16si)(__m512)(index), \ 7678 (__mmask16)(mask), (int)(scale))) 7679 7680 #define _mm512_i32gather_epi32(index, addr, scale) \ 7681 ((__m512i)__builtin_ia32_gathersiv16si((__v16si)_mm512_undefined_epi32(), \ 7682 (void const *)(addr), \ 7683 (__v16si)(__m512i)(index), \ 7684 (__mmask16)-1, (int)(scale))) 7685 7686 #define _mm512_mask_i32gather_epi32(v1_old, mask, index, addr, scale) \ 7687 ((__m512i)__builtin_ia32_gathersiv16si((__v16si)(__m512i)(v1_old), \ 7688 (void const *)(addr), \ 7689 (__v16si)(__m512i)(index), \ 7690 (__mmask16)(mask), (int)(scale))) 7691 7692 #define _mm512_i32gather_pd(index, addr, scale) \ 7693 ((__m512d)__builtin_ia32_gathersiv8df((__v8df)_mm512_undefined_pd(), \ 7694 (void const *)(addr), \ 7695 (__v8si)(__m256i)(index), (__mmask8)-1, \ 7696 (int)(scale))) 7697 7698 #define _mm512_mask_i32gather_pd(v1_old, mask, index, addr, scale) \ 7699 ((__m512d)__builtin_ia32_gathersiv8df((__v8df)(__m512d)(v1_old), \ 7700 (void const *)(addr), \ 7701 (__v8si)(__m256i)(index), \ 7702 (__mmask8)(mask), (int)(scale))) 7703 7704 #define _mm512_i32gather_epi64(index, addr, scale) \ 7705 ((__m512i)__builtin_ia32_gathersiv8di((__v8di)_mm512_undefined_epi32(), \ 7706 (void const *)(addr), \ 7707 (__v8si)(__m256i)(index), (__mmask8)-1, \ 7708 (int)(scale))) 7709 7710 #define _mm512_mask_i32gather_epi64(v1_old, mask, index, addr, scale) \ 7711 ((__m512i)__builtin_ia32_gathersiv8di((__v8di)(__m512i)(v1_old), \ 7712 (void const *)(addr), \ 7713 (__v8si)(__m256i)(index), \ 7714 (__mmask8)(mask), (int)(scale))) 7715 7716 #define _mm512_i64scatter_ps(addr, index, v1, scale) \ 7717 __builtin_ia32_scatterdiv16sf((void *)(addr), (__mmask8)-1, \ 7718 (__v8di)(__m512i)(index), \ 7719 (__v8sf)(__m256)(v1), (int)(scale)) 7720 7721 #define _mm512_mask_i64scatter_ps(addr, mask, index, v1, scale) \ 7722 __builtin_ia32_scatterdiv16sf((void *)(addr), (__mmask8)(mask), \ 7723 (__v8di)(__m512i)(index), \ 7724 (__v8sf)(__m256)(v1), (int)(scale)) 7725 7726 #define _mm512_i64scatter_epi32(addr, index, v1, scale) \ 7727 __builtin_ia32_scatterdiv16si((void *)(addr), (__mmask8)-1, \ 7728 (__v8di)(__m512i)(index), \ 7729 (__v8si)(__m256i)(v1), (int)(scale)) 7730 7731 #define _mm512_mask_i64scatter_epi32(addr, mask, index, v1, scale) \ 7732 __builtin_ia32_scatterdiv16si((void *)(addr), (__mmask8)(mask), \ 7733 (__v8di)(__m512i)(index), \ 7734 (__v8si)(__m256i)(v1), (int)(scale)) 7735 7736 #define _mm512_i64scatter_pd(addr, index, v1, scale) \ 7737 __builtin_ia32_scatterdiv8df((void *)(addr), (__mmask8)-1, \ 7738 (__v8di)(__m512i)(index), \ 7739 (__v8df)(__m512d)(v1), (int)(scale)) 7740 7741 #define _mm512_mask_i64scatter_pd(addr, mask, index, v1, scale) \ 7742 __builtin_ia32_scatterdiv8df((void *)(addr), (__mmask8)(mask), \ 7743 (__v8di)(__m512i)(index), \ 7744 (__v8df)(__m512d)(v1), (int)(scale)) 7745 7746 #define _mm512_i64scatter_epi64(addr, index, v1, scale) \ 7747 __builtin_ia32_scatterdiv8di((void *)(addr), (__mmask8)-1, \ 7748 (__v8di)(__m512i)(index), \ 7749 (__v8di)(__m512i)(v1), (int)(scale)) 7750 7751 #define _mm512_mask_i64scatter_epi64(addr, mask, index, v1, scale) \ 7752 __builtin_ia32_scatterdiv8di((void *)(addr), (__mmask8)(mask), \ 7753 (__v8di)(__m512i)(index), \ 7754 (__v8di)(__m512i)(v1), (int)(scale)) 7755 7756 #define _mm512_i32scatter_ps(addr, index, v1, scale) \ 7757 __builtin_ia32_scattersiv16sf((void *)(addr), (__mmask16)-1, \ 7758 (__v16si)(__m512i)(index), \ 7759 (__v16sf)(__m512)(v1), (int)(scale)) 7760 7761 #define _mm512_mask_i32scatter_ps(addr, mask, index, v1, scale) \ 7762 __builtin_ia32_scattersiv16sf((void *)(addr), (__mmask16)(mask), \ 7763 (__v16si)(__m512i)(index), \ 7764 (__v16sf)(__m512)(v1), (int)(scale)) 7765 7766 #define _mm512_i32scatter_epi32(addr, index, v1, scale) \ 7767 __builtin_ia32_scattersiv16si((void *)(addr), (__mmask16)-1, \ 7768 (__v16si)(__m512i)(index), \ 7769 (__v16si)(__m512i)(v1), (int)(scale)) 7770 7771 #define _mm512_mask_i32scatter_epi32(addr, mask, index, v1, scale) \ 7772 __builtin_ia32_scattersiv16si((void *)(addr), (__mmask16)(mask), \ 7773 (__v16si)(__m512i)(index), \ 7774 (__v16si)(__m512i)(v1), (int)(scale)) 7775 7776 #define _mm512_i32scatter_pd(addr, index, v1, scale) \ 7777 __builtin_ia32_scattersiv8df((void *)(addr), (__mmask8)-1, \ 7778 (__v8si)(__m256i)(index), \ 7779 (__v8df)(__m512d)(v1), (int)(scale)) 7780 7781 #define _mm512_mask_i32scatter_pd(addr, mask, index, v1, scale) \ 7782 __builtin_ia32_scattersiv8df((void *)(addr), (__mmask8)(mask), \ 7783 (__v8si)(__m256i)(index), \ 7784 (__v8df)(__m512d)(v1), (int)(scale)) 7785 7786 #define _mm512_i32scatter_epi64(addr, index, v1, scale) \ 7787 __builtin_ia32_scattersiv8di((void *)(addr), (__mmask8)-1, \ 7788 (__v8si)(__m256i)(index), \ 7789 (__v8di)(__m512i)(v1), (int)(scale)) 7790 7791 #define _mm512_mask_i32scatter_epi64(addr, mask, index, v1, scale) \ 7792 __builtin_ia32_scattersiv8di((void *)(addr), (__mmask8)(mask), \ 7793 (__v8si)(__m256i)(index), \ 7794 (__v8di)(__m512i)(v1), (int)(scale)) 7795 7796 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7797 _mm_mask_fmadd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 7798 { 7799 return __builtin_ia32_vfmaddss3_mask((__v4sf)__W, 7800 (__v4sf)__A, 7801 (__v4sf)__B, 7802 (__mmask8)__U, 7803 _MM_FROUND_CUR_DIRECTION); 7804 } 7805 7806 #define _mm_fmadd_round_ss(A, B, C, R) \ 7807 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(A), \ 7808 (__v4sf)(__m128)(B), \ 7809 (__v4sf)(__m128)(C), (__mmask8)-1, \ 7810 (int)(R))) 7811 7812 #define _mm_mask_fmadd_round_ss(W, U, A, B, R) \ 7813 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(W), \ 7814 (__v4sf)(__m128)(A), \ 7815 (__v4sf)(__m128)(B), (__mmask8)(U), \ 7816 (int)(R))) 7817 7818 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7819 _mm_maskz_fmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) 7820 { 7821 return __builtin_ia32_vfmaddss3_maskz((__v4sf)__A, 7822 (__v4sf)__B, 7823 (__v4sf)__C, 7824 (__mmask8)__U, 7825 _MM_FROUND_CUR_DIRECTION); 7826 } 7827 7828 #define _mm_maskz_fmadd_round_ss(U, A, B, C, R) \ 7829 ((__m128)__builtin_ia32_vfmaddss3_maskz((__v4sf)(__m128)(A), \ 7830 (__v4sf)(__m128)(B), \ 7831 (__v4sf)(__m128)(C), (__mmask8)(U), \ 7832 (int)(R))) 7833 7834 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7835 _mm_mask3_fmadd_ss (__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) 7836 { 7837 return __builtin_ia32_vfmaddss3_mask3((__v4sf)__W, 7838 (__v4sf)__X, 7839 (__v4sf)__Y, 7840 (__mmask8)__U, 7841 _MM_FROUND_CUR_DIRECTION); 7842 } 7843 7844 #define _mm_mask3_fmadd_round_ss(W, X, Y, U, R) \ 7845 ((__m128)__builtin_ia32_vfmaddss3_mask3((__v4sf)(__m128)(W), \ 7846 (__v4sf)(__m128)(X), \ 7847 (__v4sf)(__m128)(Y), (__mmask8)(U), \ 7848 (int)(R))) 7849 7850 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7851 _mm_mask_fmsub_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 7852 { 7853 return __builtin_ia32_vfmaddss3_mask((__v4sf)__W, 7854 (__v4sf)__A, 7855 -(__v4sf)__B, 7856 (__mmask8)__U, 7857 _MM_FROUND_CUR_DIRECTION); 7858 } 7859 7860 #define _mm_fmsub_round_ss(A, B, C, R) \ 7861 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(A), \ 7862 (__v4sf)(__m128)(B), \ 7863 -(__v4sf)(__m128)(C), (__mmask8)-1, \ 7864 (int)(R))) 7865 7866 #define _mm_mask_fmsub_round_ss(W, U, A, B, R) \ 7867 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(W), \ 7868 (__v4sf)(__m128)(A), \ 7869 -(__v4sf)(__m128)(B), (__mmask8)(U), \ 7870 (int)(R))) 7871 7872 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7873 _mm_maskz_fmsub_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) 7874 { 7875 return __builtin_ia32_vfmaddss3_maskz((__v4sf)__A, 7876 (__v4sf)__B, 7877 -(__v4sf)__C, 7878 (__mmask8)__U, 7879 _MM_FROUND_CUR_DIRECTION); 7880 } 7881 7882 #define _mm_maskz_fmsub_round_ss(U, A, B, C, R) \ 7883 ((__m128)__builtin_ia32_vfmaddss3_maskz((__v4sf)(__m128)(A), \ 7884 (__v4sf)(__m128)(B), \ 7885 -(__v4sf)(__m128)(C), (__mmask8)(U), \ 7886 (int)(R))) 7887 7888 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7889 _mm_mask3_fmsub_ss (__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) 7890 { 7891 return __builtin_ia32_vfmsubss3_mask3((__v4sf)__W, 7892 (__v4sf)__X, 7893 (__v4sf)__Y, 7894 (__mmask8)__U, 7895 _MM_FROUND_CUR_DIRECTION); 7896 } 7897 7898 #define _mm_mask3_fmsub_round_ss(W, X, Y, U, R) \ 7899 ((__m128)__builtin_ia32_vfmsubss3_mask3((__v4sf)(__m128)(W), \ 7900 (__v4sf)(__m128)(X), \ 7901 (__v4sf)(__m128)(Y), (__mmask8)(U), \ 7902 (int)(R))) 7903 7904 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7905 _mm_mask_fnmadd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 7906 { 7907 return __builtin_ia32_vfmaddss3_mask((__v4sf)__W, 7908 -(__v4sf)__A, 7909 (__v4sf)__B, 7910 (__mmask8)__U, 7911 _MM_FROUND_CUR_DIRECTION); 7912 } 7913 7914 #define _mm_fnmadd_round_ss(A, B, C, R) \ 7915 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(A), \ 7916 -(__v4sf)(__m128)(B), \ 7917 (__v4sf)(__m128)(C), (__mmask8)-1, \ 7918 (int)(R))) 7919 7920 #define _mm_mask_fnmadd_round_ss(W, U, A, B, R) \ 7921 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(W), \ 7922 -(__v4sf)(__m128)(A), \ 7923 (__v4sf)(__m128)(B), (__mmask8)(U), \ 7924 (int)(R))) 7925 7926 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7927 _mm_maskz_fnmadd_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) 7928 { 7929 return __builtin_ia32_vfmaddss3_maskz((__v4sf)__A, 7930 -(__v4sf)__B, 7931 (__v4sf)__C, 7932 (__mmask8)__U, 7933 _MM_FROUND_CUR_DIRECTION); 7934 } 7935 7936 #define _mm_maskz_fnmadd_round_ss(U, A, B, C, R) \ 7937 ((__m128)__builtin_ia32_vfmaddss3_maskz((__v4sf)(__m128)(A), \ 7938 -(__v4sf)(__m128)(B), \ 7939 (__v4sf)(__m128)(C), (__mmask8)(U), \ 7940 (int)(R))) 7941 7942 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7943 _mm_mask3_fnmadd_ss (__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) 7944 { 7945 return __builtin_ia32_vfmaddss3_mask3((__v4sf)__W, 7946 -(__v4sf)__X, 7947 (__v4sf)__Y, 7948 (__mmask8)__U, 7949 _MM_FROUND_CUR_DIRECTION); 7950 } 7951 7952 #define _mm_mask3_fnmadd_round_ss(W, X, Y, U, R) \ 7953 ((__m128)__builtin_ia32_vfmaddss3_mask3((__v4sf)(__m128)(W), \ 7954 -(__v4sf)(__m128)(X), \ 7955 (__v4sf)(__m128)(Y), (__mmask8)(U), \ 7956 (int)(R))) 7957 7958 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7959 _mm_mask_fnmsub_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 7960 { 7961 return __builtin_ia32_vfmaddss3_mask((__v4sf)__W, 7962 -(__v4sf)__A, 7963 -(__v4sf)__B, 7964 (__mmask8)__U, 7965 _MM_FROUND_CUR_DIRECTION); 7966 } 7967 7968 #define _mm_fnmsub_round_ss(A, B, C, R) \ 7969 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(A), \ 7970 -(__v4sf)(__m128)(B), \ 7971 -(__v4sf)(__m128)(C), (__mmask8)-1, \ 7972 (int)(R))) 7973 7974 #define _mm_mask_fnmsub_round_ss(W, U, A, B, R) \ 7975 ((__m128)__builtin_ia32_vfmaddss3_mask((__v4sf)(__m128)(W), \ 7976 -(__v4sf)(__m128)(A), \ 7977 -(__v4sf)(__m128)(B), (__mmask8)(U), \ 7978 (int)(R))) 7979 7980 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7981 _mm_maskz_fnmsub_ss (__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) 7982 { 7983 return __builtin_ia32_vfmaddss3_maskz((__v4sf)__A, 7984 -(__v4sf)__B, 7985 -(__v4sf)__C, 7986 (__mmask8)__U, 7987 _MM_FROUND_CUR_DIRECTION); 7988 } 7989 7990 #define _mm_maskz_fnmsub_round_ss(U, A, B, C, R) \ 7991 ((__m128)__builtin_ia32_vfmaddss3_maskz((__v4sf)(__m128)(A), \ 7992 -(__v4sf)(__m128)(B), \ 7993 -(__v4sf)(__m128)(C), (__mmask8)(U), \ 7994 (int)(R))) 7995 7996 static __inline__ __m128 __DEFAULT_FN_ATTRS128 7997 _mm_mask3_fnmsub_ss (__m128 __W, __m128 __X, __m128 __Y, __mmask8 __U) 7998 { 7999 return __builtin_ia32_vfmsubss3_mask3((__v4sf)__W, 8000 -(__v4sf)__X, 8001 (__v4sf)__Y, 8002 (__mmask8)__U, 8003 _MM_FROUND_CUR_DIRECTION); 8004 } 8005 8006 #define _mm_mask3_fnmsub_round_ss(W, X, Y, U, R) \ 8007 ((__m128)__builtin_ia32_vfmsubss3_mask3((__v4sf)(__m128)(W), \ 8008 -(__v4sf)(__m128)(X), \ 8009 (__v4sf)(__m128)(Y), (__mmask8)(U), \ 8010 (int)(R))) 8011 8012 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8013 _mm_mask_fmadd_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 8014 { 8015 return __builtin_ia32_vfmaddsd3_mask((__v2df)__W, 8016 (__v2df)__A, 8017 (__v2df)__B, 8018 (__mmask8)__U, 8019 _MM_FROUND_CUR_DIRECTION); 8020 } 8021 8022 #define _mm_fmadd_round_sd(A, B, C, R) \ 8023 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(A), \ 8024 (__v2df)(__m128d)(B), \ 8025 (__v2df)(__m128d)(C), (__mmask8)-1, \ 8026 (int)(R))) 8027 8028 #define _mm_mask_fmadd_round_sd(W, U, A, B, R) \ 8029 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(W), \ 8030 (__v2df)(__m128d)(A), \ 8031 (__v2df)(__m128d)(B), (__mmask8)(U), \ 8032 (int)(R))) 8033 8034 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8035 _mm_maskz_fmadd_sd (__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) 8036 { 8037 return __builtin_ia32_vfmaddsd3_maskz((__v2df)__A, 8038 (__v2df)__B, 8039 (__v2df)__C, 8040 (__mmask8)__U, 8041 _MM_FROUND_CUR_DIRECTION); 8042 } 8043 8044 #define _mm_maskz_fmadd_round_sd(U, A, B, C, R) \ 8045 ((__m128d)__builtin_ia32_vfmaddsd3_maskz((__v2df)(__m128d)(A), \ 8046 (__v2df)(__m128d)(B), \ 8047 (__v2df)(__m128d)(C), (__mmask8)(U), \ 8048 (int)(R))) 8049 8050 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8051 _mm_mask3_fmadd_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U) 8052 { 8053 return __builtin_ia32_vfmaddsd3_mask3((__v2df)__W, 8054 (__v2df)__X, 8055 (__v2df)__Y, 8056 (__mmask8)__U, 8057 _MM_FROUND_CUR_DIRECTION); 8058 } 8059 8060 #define _mm_mask3_fmadd_round_sd(W, X, Y, U, R) \ 8061 ((__m128d)__builtin_ia32_vfmaddsd3_mask3((__v2df)(__m128d)(W), \ 8062 (__v2df)(__m128d)(X), \ 8063 (__v2df)(__m128d)(Y), (__mmask8)(U), \ 8064 (int)(R))) 8065 8066 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8067 _mm_mask_fmsub_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 8068 { 8069 return __builtin_ia32_vfmaddsd3_mask((__v2df)__W, 8070 (__v2df)__A, 8071 -(__v2df)__B, 8072 (__mmask8)__U, 8073 _MM_FROUND_CUR_DIRECTION); 8074 } 8075 8076 #define _mm_fmsub_round_sd(A, B, C, R) \ 8077 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(A), \ 8078 (__v2df)(__m128d)(B), \ 8079 -(__v2df)(__m128d)(C), (__mmask8)-1, \ 8080 (int)(R))) 8081 8082 #define _mm_mask_fmsub_round_sd(W, U, A, B, R) \ 8083 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(W), \ 8084 (__v2df)(__m128d)(A), \ 8085 -(__v2df)(__m128d)(B), (__mmask8)(U), \ 8086 (int)(R))) 8087 8088 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8089 _mm_maskz_fmsub_sd (__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) 8090 { 8091 return __builtin_ia32_vfmaddsd3_maskz((__v2df)__A, 8092 (__v2df)__B, 8093 -(__v2df)__C, 8094 (__mmask8)__U, 8095 _MM_FROUND_CUR_DIRECTION); 8096 } 8097 8098 #define _mm_maskz_fmsub_round_sd(U, A, B, C, R) \ 8099 ((__m128d)__builtin_ia32_vfmaddsd3_maskz((__v2df)(__m128d)(A), \ 8100 (__v2df)(__m128d)(B), \ 8101 -(__v2df)(__m128d)(C), \ 8102 (__mmask8)(U), (int)(R))) 8103 8104 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8105 _mm_mask3_fmsub_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U) 8106 { 8107 return __builtin_ia32_vfmsubsd3_mask3((__v2df)__W, 8108 (__v2df)__X, 8109 (__v2df)__Y, 8110 (__mmask8)__U, 8111 _MM_FROUND_CUR_DIRECTION); 8112 } 8113 8114 #define _mm_mask3_fmsub_round_sd(W, X, Y, U, R) \ 8115 ((__m128d)__builtin_ia32_vfmsubsd3_mask3((__v2df)(__m128d)(W), \ 8116 (__v2df)(__m128d)(X), \ 8117 (__v2df)(__m128d)(Y), \ 8118 (__mmask8)(U), (int)(R))) 8119 8120 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8121 _mm_mask_fnmadd_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 8122 { 8123 return __builtin_ia32_vfmaddsd3_mask((__v2df)__W, 8124 -(__v2df)__A, 8125 (__v2df)__B, 8126 (__mmask8)__U, 8127 _MM_FROUND_CUR_DIRECTION); 8128 } 8129 8130 #define _mm_fnmadd_round_sd(A, B, C, R) \ 8131 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(A), \ 8132 -(__v2df)(__m128d)(B), \ 8133 (__v2df)(__m128d)(C), (__mmask8)-1, \ 8134 (int)(R))) 8135 8136 #define _mm_mask_fnmadd_round_sd(W, U, A, B, R) \ 8137 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(W), \ 8138 -(__v2df)(__m128d)(A), \ 8139 (__v2df)(__m128d)(B), (__mmask8)(U), \ 8140 (int)(R))) 8141 8142 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8143 _mm_maskz_fnmadd_sd (__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) 8144 { 8145 return __builtin_ia32_vfmaddsd3_maskz((__v2df)__A, 8146 -(__v2df)__B, 8147 (__v2df)__C, 8148 (__mmask8)__U, 8149 _MM_FROUND_CUR_DIRECTION); 8150 } 8151 8152 #define _mm_maskz_fnmadd_round_sd(U, A, B, C, R) \ 8153 ((__m128d)__builtin_ia32_vfmaddsd3_maskz((__v2df)(__m128d)(A), \ 8154 -(__v2df)(__m128d)(B), \ 8155 (__v2df)(__m128d)(C), (__mmask8)(U), \ 8156 (int)(R))) 8157 8158 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8159 _mm_mask3_fnmadd_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U) 8160 { 8161 return __builtin_ia32_vfmaddsd3_mask3((__v2df)__W, 8162 -(__v2df)__X, 8163 (__v2df)__Y, 8164 (__mmask8)__U, 8165 _MM_FROUND_CUR_DIRECTION); 8166 } 8167 8168 #define _mm_mask3_fnmadd_round_sd(W, X, Y, U, R) \ 8169 ((__m128d)__builtin_ia32_vfmaddsd3_mask3((__v2df)(__m128d)(W), \ 8170 -(__v2df)(__m128d)(X), \ 8171 (__v2df)(__m128d)(Y), (__mmask8)(U), \ 8172 (int)(R))) 8173 8174 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8175 _mm_mask_fnmsub_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 8176 { 8177 return __builtin_ia32_vfmaddsd3_mask((__v2df)__W, 8178 -(__v2df)__A, 8179 -(__v2df)__B, 8180 (__mmask8)__U, 8181 _MM_FROUND_CUR_DIRECTION); 8182 } 8183 8184 #define _mm_fnmsub_round_sd(A, B, C, R) \ 8185 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(A), \ 8186 -(__v2df)(__m128d)(B), \ 8187 -(__v2df)(__m128d)(C), (__mmask8)-1, \ 8188 (int)(R))) 8189 8190 #define _mm_mask_fnmsub_round_sd(W, U, A, B, R) \ 8191 ((__m128d)__builtin_ia32_vfmaddsd3_mask((__v2df)(__m128d)(W), \ 8192 -(__v2df)(__m128d)(A), \ 8193 -(__v2df)(__m128d)(B), (__mmask8)(U), \ 8194 (int)(R))) 8195 8196 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8197 _mm_maskz_fnmsub_sd (__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) 8198 { 8199 return __builtin_ia32_vfmaddsd3_maskz((__v2df)__A, 8200 -(__v2df)__B, 8201 -(__v2df)__C, 8202 (__mmask8)__U, 8203 _MM_FROUND_CUR_DIRECTION); 8204 } 8205 8206 #define _mm_maskz_fnmsub_round_sd(U, A, B, C, R) \ 8207 ((__m128d)__builtin_ia32_vfmaddsd3_maskz((__v2df)(__m128d)(A), \ 8208 -(__v2df)(__m128d)(B), \ 8209 -(__v2df)(__m128d)(C), \ 8210 (__mmask8)(U), \ 8211 (int)(R))) 8212 8213 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8214 _mm_mask3_fnmsub_sd (__m128d __W, __m128d __X, __m128d __Y, __mmask8 __U) 8215 { 8216 return __builtin_ia32_vfmsubsd3_mask3((__v2df)__W, 8217 -(__v2df)__X, 8218 (__v2df)__Y, 8219 (__mmask8)__U, 8220 _MM_FROUND_CUR_DIRECTION); 8221 } 8222 8223 #define _mm_mask3_fnmsub_round_sd(W, X, Y, U, R) \ 8224 ((__m128d)__builtin_ia32_vfmsubsd3_mask3((__v2df)(__m128d)(W), \ 8225 -(__v2df)(__m128d)(X), \ 8226 (__v2df)(__m128d)(Y), \ 8227 (__mmask8)(U), (int)(R))) 8228 8229 #define _mm512_permutex_pd(X, C) \ 8230 ((__m512d)__builtin_ia32_permdf512((__v8df)(__m512d)(X), (int)(C))) 8231 8232 #define _mm512_mask_permutex_pd(W, U, X, C) \ 8233 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 8234 (__v8df)_mm512_permutex_pd((X), (C)), \ 8235 (__v8df)(__m512d)(W))) 8236 8237 #define _mm512_maskz_permutex_pd(U, X, C) \ 8238 ((__m512d)__builtin_ia32_selectpd_512((__mmask8)(U), \ 8239 (__v8df)_mm512_permutex_pd((X), (C)), \ 8240 (__v8df)_mm512_setzero_pd())) 8241 8242 #define _mm512_permutex_epi64(X, C) \ 8243 ((__m512i)__builtin_ia32_permdi512((__v8di)(__m512i)(X), (int)(C))) 8244 8245 #define _mm512_mask_permutex_epi64(W, U, X, C) \ 8246 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 8247 (__v8di)_mm512_permutex_epi64((X), (C)), \ 8248 (__v8di)(__m512i)(W))) 8249 8250 #define _mm512_maskz_permutex_epi64(U, X, C) \ 8251 ((__m512i)__builtin_ia32_selectq_512((__mmask8)(U), \ 8252 (__v8di)_mm512_permutex_epi64((X), (C)), \ 8253 (__v8di)_mm512_setzero_si512())) 8254 8255 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8256 _mm512_permutexvar_pd (__m512i __X, __m512d __Y) 8257 { 8258 return (__m512d)__builtin_ia32_permvardf512((__v8df) __Y, (__v8di) __X); 8259 } 8260 8261 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8262 _mm512_mask_permutexvar_pd (__m512d __W, __mmask8 __U, __m512i __X, __m512d __Y) 8263 { 8264 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 8265 (__v8df)_mm512_permutexvar_pd(__X, __Y), 8266 (__v8df)__W); 8267 } 8268 8269 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8270 _mm512_maskz_permutexvar_pd (__mmask8 __U, __m512i __X, __m512d __Y) 8271 { 8272 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 8273 (__v8df)_mm512_permutexvar_pd(__X, __Y), 8274 (__v8df)_mm512_setzero_pd()); 8275 } 8276 8277 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8278 _mm512_permutexvar_epi64 (__m512i __X, __m512i __Y) 8279 { 8280 return (__m512i)__builtin_ia32_permvardi512((__v8di)__Y, (__v8di)__X); 8281 } 8282 8283 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8284 _mm512_maskz_permutexvar_epi64 (__mmask8 __M, __m512i __X, __m512i __Y) 8285 { 8286 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 8287 (__v8di)_mm512_permutexvar_epi64(__X, __Y), 8288 (__v8di)_mm512_setzero_si512()); 8289 } 8290 8291 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8292 _mm512_mask_permutexvar_epi64 (__m512i __W, __mmask8 __M, __m512i __X, 8293 __m512i __Y) 8294 { 8295 return (__m512i)__builtin_ia32_selectq_512((__mmask8)__M, 8296 (__v8di)_mm512_permutexvar_epi64(__X, __Y), 8297 (__v8di)__W); 8298 } 8299 8300 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8301 _mm512_permutexvar_ps (__m512i __X, __m512 __Y) 8302 { 8303 return (__m512)__builtin_ia32_permvarsf512((__v16sf)__Y, (__v16si)__X); 8304 } 8305 8306 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8307 _mm512_mask_permutexvar_ps (__m512 __W, __mmask16 __U, __m512i __X, __m512 __Y) 8308 { 8309 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8310 (__v16sf)_mm512_permutexvar_ps(__X, __Y), 8311 (__v16sf)__W); 8312 } 8313 8314 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8315 _mm512_maskz_permutexvar_ps (__mmask16 __U, __m512i __X, __m512 __Y) 8316 { 8317 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8318 (__v16sf)_mm512_permutexvar_ps(__X, __Y), 8319 (__v16sf)_mm512_setzero_ps()); 8320 } 8321 8322 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8323 _mm512_permutexvar_epi32 (__m512i __X, __m512i __Y) 8324 { 8325 return (__m512i)__builtin_ia32_permvarsi512((__v16si)__Y, (__v16si)__X); 8326 } 8327 8328 #define _mm512_permutevar_epi32 _mm512_permutexvar_epi32 8329 8330 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8331 _mm512_maskz_permutexvar_epi32 (__mmask16 __M, __m512i __X, __m512i __Y) 8332 { 8333 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 8334 (__v16si)_mm512_permutexvar_epi32(__X, __Y), 8335 (__v16si)_mm512_setzero_si512()); 8336 } 8337 8338 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8339 _mm512_mask_permutexvar_epi32 (__m512i __W, __mmask16 __M, __m512i __X, 8340 __m512i __Y) 8341 { 8342 return (__m512i)__builtin_ia32_selectd_512((__mmask16)__M, 8343 (__v16si)_mm512_permutexvar_epi32(__X, __Y), 8344 (__v16si)__W); 8345 } 8346 8347 #define _mm512_mask_permutevar_epi32 _mm512_mask_permutexvar_epi32 8348 8349 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8350 _mm512_kand (__mmask16 __A, __mmask16 __B) 8351 { 8352 return (__mmask16) __builtin_ia32_kandhi ((__mmask16) __A, (__mmask16) __B); 8353 } 8354 8355 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8356 _mm512_kandn (__mmask16 __A, __mmask16 __B) 8357 { 8358 return (__mmask16) __builtin_ia32_kandnhi ((__mmask16) __A, (__mmask16) __B); 8359 } 8360 8361 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8362 _mm512_kor (__mmask16 __A, __mmask16 __B) 8363 { 8364 return (__mmask16) __builtin_ia32_korhi ((__mmask16) __A, (__mmask16) __B); 8365 } 8366 8367 static __inline__ int __DEFAULT_FN_ATTRS 8368 _mm512_kortestc (__mmask16 __A, __mmask16 __B) 8369 { 8370 return __builtin_ia32_kortestchi ((__mmask16) __A, (__mmask16) __B); 8371 } 8372 8373 static __inline__ int __DEFAULT_FN_ATTRS 8374 _mm512_kortestz (__mmask16 __A, __mmask16 __B) 8375 { 8376 return __builtin_ia32_kortestzhi ((__mmask16) __A, (__mmask16) __B); 8377 } 8378 8379 static __inline__ unsigned char __DEFAULT_FN_ATTRS 8380 _kortestc_mask16_u8(__mmask16 __A, __mmask16 __B) 8381 { 8382 return (unsigned char)__builtin_ia32_kortestchi(__A, __B); 8383 } 8384 8385 static __inline__ unsigned char __DEFAULT_FN_ATTRS 8386 _kortestz_mask16_u8(__mmask16 __A, __mmask16 __B) 8387 { 8388 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B); 8389 } 8390 8391 static __inline__ unsigned char __DEFAULT_FN_ATTRS 8392 _kortest_mask16_u8(__mmask16 __A, __mmask16 __B, unsigned char *__C) { 8393 *__C = (unsigned char)__builtin_ia32_kortestchi(__A, __B); 8394 return (unsigned char)__builtin_ia32_kortestzhi(__A, __B); 8395 } 8396 8397 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8398 _mm512_kunpackb (__mmask16 __A, __mmask16 __B) 8399 { 8400 return (__mmask16) __builtin_ia32_kunpckhi ((__mmask16) __A, (__mmask16) __B); 8401 } 8402 8403 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8404 _mm512_kxnor (__mmask16 __A, __mmask16 __B) 8405 { 8406 return (__mmask16) __builtin_ia32_kxnorhi ((__mmask16) __A, (__mmask16) __B); 8407 } 8408 8409 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8410 _mm512_kxor (__mmask16 __A, __mmask16 __B) 8411 { 8412 return (__mmask16) __builtin_ia32_kxorhi ((__mmask16) __A, (__mmask16) __B); 8413 } 8414 8415 #define _kand_mask16 _mm512_kand 8416 #define _kandn_mask16 _mm512_kandn 8417 #define _knot_mask16 _mm512_knot 8418 #define _kor_mask16 _mm512_kor 8419 #define _kxnor_mask16 _mm512_kxnor 8420 #define _kxor_mask16 _mm512_kxor 8421 8422 #define _kshiftli_mask16(A, I) \ 8423 ((__mmask16)__builtin_ia32_kshiftlihi((__mmask16)(A), (unsigned int)(I))) 8424 8425 #define _kshiftri_mask16(A, I) \ 8426 ((__mmask16)__builtin_ia32_kshiftrihi((__mmask16)(A), (unsigned int)(I))) 8427 8428 static __inline__ unsigned int __DEFAULT_FN_ATTRS 8429 _cvtmask16_u32(__mmask16 __A) { 8430 return (unsigned int)__builtin_ia32_kmovw((__mmask16)__A); 8431 } 8432 8433 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8434 _cvtu32_mask16(unsigned int __A) { 8435 return (__mmask16)__builtin_ia32_kmovw((__mmask16)__A); 8436 } 8437 8438 static __inline__ __mmask16 __DEFAULT_FN_ATTRS 8439 _load_mask16(__mmask16 *__A) { 8440 return (__mmask16)__builtin_ia32_kmovw(*(__mmask16 *)__A); 8441 } 8442 8443 static __inline__ void __DEFAULT_FN_ATTRS 8444 _store_mask16(__mmask16 *__A, __mmask16 __B) { 8445 *(__mmask16 *)__A = __builtin_ia32_kmovw((__mmask16)__B); 8446 } 8447 8448 static __inline__ void __DEFAULT_FN_ATTRS512 8449 _mm512_stream_si512 (void * __P, __m512i __A) 8450 { 8451 typedef __v8di __v8di_aligned __attribute__((aligned(64))); 8452 __builtin_nontemporal_store((__v8di_aligned)__A, (__v8di_aligned*)__P); 8453 } 8454 8455 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8456 _mm512_stream_load_si512 (void const *__P) 8457 { 8458 typedef __v8di __v8di_aligned __attribute__((aligned(64))); 8459 return (__m512i) __builtin_nontemporal_load((const __v8di_aligned *)__P); 8460 } 8461 8462 static __inline__ void __DEFAULT_FN_ATTRS512 8463 _mm512_stream_pd (void *__P, __m512d __A) 8464 { 8465 typedef __v8df __v8df_aligned __attribute__((aligned(64))); 8466 __builtin_nontemporal_store((__v8df_aligned)__A, (__v8df_aligned*)__P); 8467 } 8468 8469 static __inline__ void __DEFAULT_FN_ATTRS512 8470 _mm512_stream_ps (void *__P, __m512 __A) 8471 { 8472 typedef __v16sf __v16sf_aligned __attribute__((aligned(64))); 8473 __builtin_nontemporal_store((__v16sf_aligned)__A, (__v16sf_aligned*)__P); 8474 } 8475 8476 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8477 _mm512_mask_compress_pd (__m512d __W, __mmask8 __U, __m512d __A) 8478 { 8479 return (__m512d) __builtin_ia32_compressdf512_mask ((__v8df) __A, 8480 (__v8df) __W, 8481 (__mmask8) __U); 8482 } 8483 8484 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8485 _mm512_maskz_compress_pd (__mmask8 __U, __m512d __A) 8486 { 8487 return (__m512d) __builtin_ia32_compressdf512_mask ((__v8df) __A, 8488 (__v8df) 8489 _mm512_setzero_pd (), 8490 (__mmask8) __U); 8491 } 8492 8493 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8494 _mm512_mask_compress_epi64 (__m512i __W, __mmask8 __U, __m512i __A) 8495 { 8496 return (__m512i) __builtin_ia32_compressdi512_mask ((__v8di) __A, 8497 (__v8di) __W, 8498 (__mmask8) __U); 8499 } 8500 8501 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8502 _mm512_maskz_compress_epi64 (__mmask8 __U, __m512i __A) 8503 { 8504 return (__m512i) __builtin_ia32_compressdi512_mask ((__v8di) __A, 8505 (__v8di) 8506 _mm512_setzero_si512 (), 8507 (__mmask8) __U); 8508 } 8509 8510 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8511 _mm512_mask_compress_ps (__m512 __W, __mmask16 __U, __m512 __A) 8512 { 8513 return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A, 8514 (__v16sf) __W, 8515 (__mmask16) __U); 8516 } 8517 8518 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8519 _mm512_maskz_compress_ps (__mmask16 __U, __m512 __A) 8520 { 8521 return (__m512) __builtin_ia32_compresssf512_mask ((__v16sf) __A, 8522 (__v16sf) 8523 _mm512_setzero_ps (), 8524 (__mmask16) __U); 8525 } 8526 8527 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8528 _mm512_mask_compress_epi32 (__m512i __W, __mmask16 __U, __m512i __A) 8529 { 8530 return (__m512i) __builtin_ia32_compresssi512_mask ((__v16si) __A, 8531 (__v16si) __W, 8532 (__mmask16) __U); 8533 } 8534 8535 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8536 _mm512_maskz_compress_epi32 (__mmask16 __U, __m512i __A) 8537 { 8538 return (__m512i) __builtin_ia32_compresssi512_mask ((__v16si) __A, 8539 (__v16si) 8540 _mm512_setzero_si512 (), 8541 (__mmask16) __U); 8542 } 8543 8544 #define _mm_cmp_round_ss_mask(X, Y, P, R) \ 8545 ((__mmask8)__builtin_ia32_cmpss_mask((__v4sf)(__m128)(X), \ 8546 (__v4sf)(__m128)(Y), (int)(P), \ 8547 (__mmask8)-1, (int)(R))) 8548 8549 #define _mm_mask_cmp_round_ss_mask(M, X, Y, P, R) \ 8550 ((__mmask8)__builtin_ia32_cmpss_mask((__v4sf)(__m128)(X), \ 8551 (__v4sf)(__m128)(Y), (int)(P), \ 8552 (__mmask8)(M), (int)(R))) 8553 8554 #define _mm_cmp_ss_mask(X, Y, P) \ 8555 ((__mmask8)__builtin_ia32_cmpss_mask((__v4sf)(__m128)(X), \ 8556 (__v4sf)(__m128)(Y), (int)(P), \ 8557 (__mmask8)-1, \ 8558 _MM_FROUND_CUR_DIRECTION)) 8559 8560 #define _mm_mask_cmp_ss_mask(M, X, Y, P) \ 8561 ((__mmask8)__builtin_ia32_cmpss_mask((__v4sf)(__m128)(X), \ 8562 (__v4sf)(__m128)(Y), (int)(P), \ 8563 (__mmask8)(M), \ 8564 _MM_FROUND_CUR_DIRECTION)) 8565 8566 #define _mm_cmp_round_sd_mask(X, Y, P, R) \ 8567 ((__mmask8)__builtin_ia32_cmpsd_mask((__v2df)(__m128d)(X), \ 8568 (__v2df)(__m128d)(Y), (int)(P), \ 8569 (__mmask8)-1, (int)(R))) 8570 8571 #define _mm_mask_cmp_round_sd_mask(M, X, Y, P, R) \ 8572 ((__mmask8)__builtin_ia32_cmpsd_mask((__v2df)(__m128d)(X), \ 8573 (__v2df)(__m128d)(Y), (int)(P), \ 8574 (__mmask8)(M), (int)(R))) 8575 8576 #define _mm_cmp_sd_mask(X, Y, P) \ 8577 ((__mmask8)__builtin_ia32_cmpsd_mask((__v2df)(__m128d)(X), \ 8578 (__v2df)(__m128d)(Y), (int)(P), \ 8579 (__mmask8)-1, \ 8580 _MM_FROUND_CUR_DIRECTION)) 8581 8582 #define _mm_mask_cmp_sd_mask(M, X, Y, P) \ 8583 ((__mmask8)__builtin_ia32_cmpsd_mask((__v2df)(__m128d)(X), \ 8584 (__v2df)(__m128d)(Y), (int)(P), \ 8585 (__mmask8)(M), \ 8586 _MM_FROUND_CUR_DIRECTION)) 8587 8588 /* Bit Test */ 8589 8590 static __inline __mmask16 __DEFAULT_FN_ATTRS512 8591 _mm512_test_epi32_mask (__m512i __A, __m512i __B) 8592 { 8593 return _mm512_cmpneq_epi32_mask (_mm512_and_epi32(__A, __B), 8594 _mm512_setzero_si512()); 8595 } 8596 8597 static __inline__ __mmask16 __DEFAULT_FN_ATTRS512 8598 _mm512_mask_test_epi32_mask (__mmask16 __U, __m512i __A, __m512i __B) 8599 { 8600 return _mm512_mask_cmpneq_epi32_mask (__U, _mm512_and_epi32 (__A, __B), 8601 _mm512_setzero_si512()); 8602 } 8603 8604 static __inline __mmask8 __DEFAULT_FN_ATTRS512 8605 _mm512_test_epi64_mask (__m512i __A, __m512i __B) 8606 { 8607 return _mm512_cmpneq_epi64_mask (_mm512_and_epi32 (__A, __B), 8608 _mm512_setzero_si512()); 8609 } 8610 8611 static __inline__ __mmask8 __DEFAULT_FN_ATTRS512 8612 _mm512_mask_test_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B) 8613 { 8614 return _mm512_mask_cmpneq_epi64_mask (__U, _mm512_and_epi32 (__A, __B), 8615 _mm512_setzero_si512()); 8616 } 8617 8618 static __inline__ __mmask16 __DEFAULT_FN_ATTRS512 8619 _mm512_testn_epi32_mask (__m512i __A, __m512i __B) 8620 { 8621 return _mm512_cmpeq_epi32_mask (_mm512_and_epi32 (__A, __B), 8622 _mm512_setzero_si512()); 8623 } 8624 8625 static __inline__ __mmask16 __DEFAULT_FN_ATTRS512 8626 _mm512_mask_testn_epi32_mask (__mmask16 __U, __m512i __A, __m512i __B) 8627 { 8628 return _mm512_mask_cmpeq_epi32_mask (__U, _mm512_and_epi32 (__A, __B), 8629 _mm512_setzero_si512()); 8630 } 8631 8632 static __inline__ __mmask8 __DEFAULT_FN_ATTRS512 8633 _mm512_testn_epi64_mask (__m512i __A, __m512i __B) 8634 { 8635 return _mm512_cmpeq_epi64_mask (_mm512_and_epi32 (__A, __B), 8636 _mm512_setzero_si512()); 8637 } 8638 8639 static __inline__ __mmask8 __DEFAULT_FN_ATTRS512 8640 _mm512_mask_testn_epi64_mask (__mmask8 __U, __m512i __A, __m512i __B) 8641 { 8642 return _mm512_mask_cmpeq_epi64_mask (__U, _mm512_and_epi32 (__A, __B), 8643 _mm512_setzero_si512()); 8644 } 8645 8646 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8647 _mm512_movehdup_ps (__m512 __A) 8648 { 8649 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A, 8650 1, 1, 3, 3, 5, 5, 7, 7, 9, 9, 11, 11, 13, 13, 15, 15); 8651 } 8652 8653 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8654 _mm512_mask_movehdup_ps (__m512 __W, __mmask16 __U, __m512 __A) 8655 { 8656 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8657 (__v16sf)_mm512_movehdup_ps(__A), 8658 (__v16sf)__W); 8659 } 8660 8661 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8662 _mm512_maskz_movehdup_ps (__mmask16 __U, __m512 __A) 8663 { 8664 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8665 (__v16sf)_mm512_movehdup_ps(__A), 8666 (__v16sf)_mm512_setzero_ps()); 8667 } 8668 8669 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8670 _mm512_moveldup_ps (__m512 __A) 8671 { 8672 return (__m512)__builtin_shufflevector((__v16sf)__A, (__v16sf)__A, 8673 0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14); 8674 } 8675 8676 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8677 _mm512_mask_moveldup_ps (__m512 __W, __mmask16 __U, __m512 __A) 8678 { 8679 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8680 (__v16sf)_mm512_moveldup_ps(__A), 8681 (__v16sf)__W); 8682 } 8683 8684 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8685 _mm512_maskz_moveldup_ps (__mmask16 __U, __m512 __A) 8686 { 8687 return (__m512)__builtin_ia32_selectps_512((__mmask16)__U, 8688 (__v16sf)_mm512_moveldup_ps(__A), 8689 (__v16sf)_mm512_setzero_ps()); 8690 } 8691 8692 static __inline__ __m128 __DEFAULT_FN_ATTRS128 8693 _mm_mask_move_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) 8694 { 8695 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), __W); 8696 } 8697 8698 static __inline__ __m128 __DEFAULT_FN_ATTRS128 8699 _mm_maskz_move_ss (__mmask8 __U, __m128 __A, __m128 __B) 8700 { 8701 return __builtin_ia32_selectss_128(__U, _mm_move_ss(__A, __B), 8702 _mm_setzero_ps()); 8703 } 8704 8705 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8706 _mm_mask_move_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) 8707 { 8708 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), __W); 8709 } 8710 8711 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8712 _mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B) 8713 { 8714 return __builtin_ia32_selectsd_128(__U, _mm_move_sd(__A, __B), 8715 _mm_setzero_pd()); 8716 } 8717 8718 static __inline__ void __DEFAULT_FN_ATTRS128 8719 _mm_mask_store_ss (float * __W, __mmask8 __U, __m128 __A) 8720 { 8721 __builtin_ia32_storess128_mask ((__v4sf *)__W, __A, __U & 1); 8722 } 8723 8724 static __inline__ void __DEFAULT_FN_ATTRS128 8725 _mm_mask_store_sd (double * __W, __mmask8 __U, __m128d __A) 8726 { 8727 __builtin_ia32_storesd128_mask ((__v2df *)__W, __A, __U & 1); 8728 } 8729 8730 static __inline__ __m128 __DEFAULT_FN_ATTRS128 8731 _mm_mask_load_ss (__m128 __W, __mmask8 __U, const float* __A) 8732 { 8733 __m128 src = (__v4sf) __builtin_shufflevector((__v4sf) __W, 8734 (__v4sf)_mm_setzero_ps(), 8735 0, 4, 4, 4); 8736 8737 return (__m128) __builtin_ia32_loadss128_mask ((const __v4sf *) __A, src, __U & 1); 8738 } 8739 8740 static __inline__ __m128 __DEFAULT_FN_ATTRS128 8741 _mm_maskz_load_ss (__mmask8 __U, const float* __A) 8742 { 8743 return (__m128)__builtin_ia32_loadss128_mask ((const __v4sf *) __A, 8744 (__v4sf) _mm_setzero_ps(), 8745 __U & 1); 8746 } 8747 8748 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8749 _mm_mask_load_sd (__m128d __W, __mmask8 __U, const double* __A) 8750 { 8751 __m128d src = (__v2df) __builtin_shufflevector((__v2df) __W, 8752 (__v2df)_mm_setzero_pd(), 8753 0, 2); 8754 8755 return (__m128d) __builtin_ia32_loadsd128_mask ((const __v2df *) __A, src, __U & 1); 8756 } 8757 8758 static __inline__ __m128d __DEFAULT_FN_ATTRS128 8759 _mm_maskz_load_sd (__mmask8 __U, const double* __A) 8760 { 8761 return (__m128d) __builtin_ia32_loadsd128_mask ((const __v2df *) __A, 8762 (__v2df) _mm_setzero_pd(), 8763 __U & 1); 8764 } 8765 8766 #define _mm512_shuffle_epi32(A, I) \ 8767 ((__m512i)__builtin_ia32_pshufd512((__v16si)(__m512i)(A), (int)(I))) 8768 8769 #define _mm512_mask_shuffle_epi32(W, U, A, I) \ 8770 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 8771 (__v16si)_mm512_shuffle_epi32((A), (I)), \ 8772 (__v16si)(__m512i)(W))) 8773 8774 #define _mm512_maskz_shuffle_epi32(U, A, I) \ 8775 ((__m512i)__builtin_ia32_selectd_512((__mmask16)(U), \ 8776 (__v16si)_mm512_shuffle_epi32((A), (I)), \ 8777 (__v16si)_mm512_setzero_si512())) 8778 8779 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8780 _mm512_mask_expand_pd (__m512d __W, __mmask8 __U, __m512d __A) 8781 { 8782 return (__m512d) __builtin_ia32_expanddf512_mask ((__v8df) __A, 8783 (__v8df) __W, 8784 (__mmask8) __U); 8785 } 8786 8787 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8788 _mm512_maskz_expand_pd (__mmask8 __U, __m512d __A) 8789 { 8790 return (__m512d) __builtin_ia32_expanddf512_mask ((__v8df) __A, 8791 (__v8df) _mm512_setzero_pd (), 8792 (__mmask8) __U); 8793 } 8794 8795 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8796 _mm512_mask_expand_epi64 (__m512i __W, __mmask8 __U, __m512i __A) 8797 { 8798 return (__m512i) __builtin_ia32_expanddi512_mask ((__v8di) __A, 8799 (__v8di) __W, 8800 (__mmask8) __U); 8801 } 8802 8803 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8804 _mm512_maskz_expand_epi64 ( __mmask8 __U, __m512i __A) 8805 { 8806 return (__m512i) __builtin_ia32_expanddi512_mask ((__v8di) __A, 8807 (__v8di) _mm512_setzero_si512 (), 8808 (__mmask8) __U); 8809 } 8810 8811 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8812 _mm512_mask_expandloadu_pd(__m512d __W, __mmask8 __U, void const *__P) 8813 { 8814 return (__m512d) __builtin_ia32_expandloaddf512_mask ((const __v8df *)__P, 8815 (__v8df) __W, 8816 (__mmask8) __U); 8817 } 8818 8819 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8820 _mm512_maskz_expandloadu_pd(__mmask8 __U, void const *__P) 8821 { 8822 return (__m512d) __builtin_ia32_expandloaddf512_mask ((const __v8df *)__P, 8823 (__v8df) _mm512_setzero_pd(), 8824 (__mmask8) __U); 8825 } 8826 8827 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8828 _mm512_mask_expandloadu_epi64(__m512i __W, __mmask8 __U, void const *__P) 8829 { 8830 return (__m512i) __builtin_ia32_expandloaddi512_mask ((const __v8di *)__P, 8831 (__v8di) __W, 8832 (__mmask8) __U); 8833 } 8834 8835 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8836 _mm512_maskz_expandloadu_epi64(__mmask8 __U, void const *__P) 8837 { 8838 return (__m512i) __builtin_ia32_expandloaddi512_mask ((const __v8di *)__P, 8839 (__v8di) _mm512_setzero_si512(), 8840 (__mmask8) __U); 8841 } 8842 8843 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8844 _mm512_mask_expandloadu_ps(__m512 __W, __mmask16 __U, void const *__P) 8845 { 8846 return (__m512) __builtin_ia32_expandloadsf512_mask ((const __v16sf *)__P, 8847 (__v16sf) __W, 8848 (__mmask16) __U); 8849 } 8850 8851 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8852 _mm512_maskz_expandloadu_ps(__mmask16 __U, void const *__P) 8853 { 8854 return (__m512) __builtin_ia32_expandloadsf512_mask ((const __v16sf *)__P, 8855 (__v16sf) _mm512_setzero_ps(), 8856 (__mmask16) __U); 8857 } 8858 8859 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8860 _mm512_mask_expandloadu_epi32(__m512i __W, __mmask16 __U, void const *__P) 8861 { 8862 return (__m512i) __builtin_ia32_expandloadsi512_mask ((const __v16si *)__P, 8863 (__v16si) __W, 8864 (__mmask16) __U); 8865 } 8866 8867 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8868 _mm512_maskz_expandloadu_epi32(__mmask16 __U, void const *__P) 8869 { 8870 return (__m512i) __builtin_ia32_expandloadsi512_mask ((const __v16si *)__P, 8871 (__v16si) _mm512_setzero_si512(), 8872 (__mmask16) __U); 8873 } 8874 8875 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8876 _mm512_mask_expand_ps (__m512 __W, __mmask16 __U, __m512 __A) 8877 { 8878 return (__m512) __builtin_ia32_expandsf512_mask ((__v16sf) __A, 8879 (__v16sf) __W, 8880 (__mmask16) __U); 8881 } 8882 8883 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8884 _mm512_maskz_expand_ps (__mmask16 __U, __m512 __A) 8885 { 8886 return (__m512) __builtin_ia32_expandsf512_mask ((__v16sf) __A, 8887 (__v16sf) _mm512_setzero_ps(), 8888 (__mmask16) __U); 8889 } 8890 8891 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8892 _mm512_mask_expand_epi32 (__m512i __W, __mmask16 __U, __m512i __A) 8893 { 8894 return (__m512i) __builtin_ia32_expandsi512_mask ((__v16si) __A, 8895 (__v16si) __W, 8896 (__mmask16) __U); 8897 } 8898 8899 static __inline__ __m512i __DEFAULT_FN_ATTRS512 8900 _mm512_maskz_expand_epi32 (__mmask16 __U, __m512i __A) 8901 { 8902 return (__m512i) __builtin_ia32_expandsi512_mask ((__v16si) __A, 8903 (__v16si) _mm512_setzero_si512(), 8904 (__mmask16) __U); 8905 } 8906 8907 #define _mm512_cvt_roundps_pd(A, R) \ 8908 ((__m512d)__builtin_ia32_cvtps2pd512_mask((__v8sf)(__m256)(A), \ 8909 (__v8df)_mm512_undefined_pd(), \ 8910 (__mmask8)-1, (int)(R))) 8911 8912 #define _mm512_mask_cvt_roundps_pd(W, U, A, R) \ 8913 ((__m512d)__builtin_ia32_cvtps2pd512_mask((__v8sf)(__m256)(A), \ 8914 (__v8df)(__m512d)(W), \ 8915 (__mmask8)(U), (int)(R))) 8916 8917 #define _mm512_maskz_cvt_roundps_pd(U, A, R) \ 8918 ((__m512d)__builtin_ia32_cvtps2pd512_mask((__v8sf)(__m256)(A), \ 8919 (__v8df)_mm512_setzero_pd(), \ 8920 (__mmask8)(U), (int)(R))) 8921 8922 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8923 _mm512_cvtps_pd (__m256 __A) 8924 { 8925 return (__m512d) __builtin_convertvector((__v8sf)__A, __v8df); 8926 } 8927 8928 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8929 _mm512_mask_cvtps_pd (__m512d __W, __mmask8 __U, __m256 __A) 8930 { 8931 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 8932 (__v8df)_mm512_cvtps_pd(__A), 8933 (__v8df)__W); 8934 } 8935 8936 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8937 _mm512_maskz_cvtps_pd (__mmask8 __U, __m256 __A) 8938 { 8939 return (__m512d)__builtin_ia32_selectpd_512((__mmask8)__U, 8940 (__v8df)_mm512_cvtps_pd(__A), 8941 (__v8df)_mm512_setzero_pd()); 8942 } 8943 8944 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8945 _mm512_cvtpslo_pd (__m512 __A) 8946 { 8947 return (__m512d) _mm512_cvtps_pd(_mm512_castps512_ps256(__A)); 8948 } 8949 8950 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8951 _mm512_mask_cvtpslo_pd (__m512d __W, __mmask8 __U, __m512 __A) 8952 { 8953 return (__m512d) _mm512_mask_cvtps_pd(__W, __U, _mm512_castps512_ps256(__A)); 8954 } 8955 8956 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8957 _mm512_mask_mov_pd (__m512d __W, __mmask8 __U, __m512d __A) 8958 { 8959 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, 8960 (__v8df) __A, 8961 (__v8df) __W); 8962 } 8963 8964 static __inline__ __m512d __DEFAULT_FN_ATTRS512 8965 _mm512_maskz_mov_pd (__mmask8 __U, __m512d __A) 8966 { 8967 return (__m512d) __builtin_ia32_selectpd_512 ((__mmask8) __U, 8968 (__v8df) __A, 8969 (__v8df) _mm512_setzero_pd ()); 8970 } 8971 8972 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8973 _mm512_mask_mov_ps (__m512 __W, __mmask16 __U, __m512 __A) 8974 { 8975 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, 8976 (__v16sf) __A, 8977 (__v16sf) __W); 8978 } 8979 8980 static __inline__ __m512 __DEFAULT_FN_ATTRS512 8981 _mm512_maskz_mov_ps (__mmask16 __U, __m512 __A) 8982 { 8983 return (__m512) __builtin_ia32_selectps_512 ((__mmask16) __U, 8984 (__v16sf) __A, 8985 (__v16sf) _mm512_setzero_ps ()); 8986 } 8987 8988 static __inline__ void __DEFAULT_FN_ATTRS512 8989 _mm512_mask_compressstoreu_pd (void *__P, __mmask8 __U, __m512d __A) 8990 { 8991 __builtin_ia32_compressstoredf512_mask ((__v8df *) __P, (__v8df) __A, 8992 (__mmask8) __U); 8993 } 8994 8995 static __inline__ void __DEFAULT_FN_ATTRS512 8996 _mm512_mask_compressstoreu_epi64 (void *__P, __mmask8 __U, __m512i __A) 8997 { 8998 __builtin_ia32_compressstoredi512_mask ((__v8di *) __P, (__v8di) __A, 8999 (__mmask8) __U); 9000 } 9001 9002 static __inline__ void __DEFAULT_FN_ATTRS512 9003 _mm512_mask_compressstoreu_ps (void *__P, __mmask16 __U, __m512 __A) 9004 { 9005 __builtin_ia32_compressstoresf512_mask ((__v16sf *) __P, (__v16sf) __A, 9006 (__mmask16) __U); 9007 } 9008 9009 static __inline__ void __DEFAULT_FN_ATTRS512 9010 _mm512_mask_compressstoreu_epi32 (void *__P, __mmask16 __U, __m512i __A) 9011 { 9012 __builtin_ia32_compressstoresi512_mask ((__v16si *) __P, (__v16si) __A, 9013 (__mmask16) __U); 9014 } 9015 9016 #define _mm_cvt_roundsd_ss(A, B, R) \ 9017 ((__m128)__builtin_ia32_cvtsd2ss_round_mask((__v4sf)(__m128)(A), \ 9018 (__v2df)(__m128d)(B), \ 9019 (__v4sf)_mm_undefined_ps(), \ 9020 (__mmask8)-1, (int)(R))) 9021 9022 #define _mm_mask_cvt_roundsd_ss(W, U, A, B, R) \ 9023 ((__m128)__builtin_ia32_cvtsd2ss_round_mask((__v4sf)(__m128)(A), \ 9024 (__v2df)(__m128d)(B), \ 9025 (__v4sf)(__m128)(W), \ 9026 (__mmask8)(U), (int)(R))) 9027 9028 #define _mm_maskz_cvt_roundsd_ss(U, A, B, R) \ 9029 ((__m128)__builtin_ia32_cvtsd2ss_round_mask((__v4sf)(__m128)(A), \ 9030 (__v2df)(__m128d)(B), \ 9031 (__v4sf)_mm_setzero_ps(), \ 9032 (__mmask8)(U), (int)(R))) 9033 9034 static __inline__ __m128 __DEFAULT_FN_ATTRS128 9035 _mm_mask_cvtsd_ss (__m128 __W, __mmask8 __U, __m128 __A, __m128d __B) 9036 { 9037 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A, 9038 (__v2df)__B, 9039 (__v4sf)__W, 9040 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); 9041 } 9042 9043 static __inline__ __m128 __DEFAULT_FN_ATTRS128 9044 _mm_maskz_cvtsd_ss (__mmask8 __U, __m128 __A, __m128d __B) 9045 { 9046 return __builtin_ia32_cvtsd2ss_round_mask ((__v4sf)__A, 9047 (__v2df)__B, 9048 (__v4sf)_mm_setzero_ps(), 9049 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); 9050 } 9051 9052 #define _mm_cvtss_i32 _mm_cvtss_si32 9053 #define _mm_cvtsd_i32 _mm_cvtsd_si32 9054 #define _mm_cvti32_sd _mm_cvtsi32_sd 9055 #define _mm_cvti32_ss _mm_cvtsi32_ss 9056 #ifdef __x86_64__ 9057 #define _mm_cvtss_i64 _mm_cvtss_si64 9058 #define _mm_cvtsd_i64 _mm_cvtsd_si64 9059 #define _mm_cvti64_sd _mm_cvtsi64_sd 9060 #define _mm_cvti64_ss _mm_cvtsi64_ss 9061 #endif 9062 9063 #ifdef __x86_64__ 9064 #define _mm_cvt_roundi64_sd(A, B, R) \ 9065 ((__m128d)__builtin_ia32_cvtsi2sd64((__v2df)(__m128d)(A), (long long)(B), \ 9066 (int)(R))) 9067 9068 #define _mm_cvt_roundsi64_sd(A, B, R) \ 9069 ((__m128d)__builtin_ia32_cvtsi2sd64((__v2df)(__m128d)(A), (long long)(B), \ 9070 (int)(R))) 9071 #endif 9072 9073 #define _mm_cvt_roundsi32_ss(A, B, R) \ 9074 ((__m128)__builtin_ia32_cvtsi2ss32((__v4sf)(__m128)(A), (int)(B), (int)(R))) 9075 9076 #define _mm_cvt_roundi32_ss(A, B, R) \ 9077 ((__m128)__builtin_ia32_cvtsi2ss32((__v4sf)(__m128)(A), (int)(B), (int)(R))) 9078 9079 #ifdef __x86_64__ 9080 #define _mm_cvt_roundsi64_ss(A, B, R) \ 9081 ((__m128)__builtin_ia32_cvtsi2ss64((__v4sf)(__m128)(A), (long long)(B), \ 9082 (int)(R))) 9083 9084 #define _mm_cvt_roundi64_ss(A, B, R) \ 9085 ((__m128)__builtin_ia32_cvtsi2ss64((__v4sf)(__m128)(A), (long long)(B), \ 9086 (int)(R))) 9087 #endif 9088 9089 #define _mm_cvt_roundss_sd(A, B, R) \ 9090 ((__m128d)__builtin_ia32_cvtss2sd_round_mask((__v2df)(__m128d)(A), \ 9091 (__v4sf)(__m128)(B), \ 9092 (__v2df)_mm_undefined_pd(), \ 9093 (__mmask8)-1, (int)(R))) 9094 9095 #define _mm_mask_cvt_roundss_sd(W, U, A, B, R) \ 9096 ((__m128d)__builtin_ia32_cvtss2sd_round_mask((__v2df)(__m128d)(A), \ 9097 (__v4sf)(__m128)(B), \ 9098 (__v2df)(__m128d)(W), \ 9099 (__mmask8)(U), (int)(R))) 9100 9101 #define _mm_maskz_cvt_roundss_sd(U, A, B, R) \ 9102 ((__m128d)__builtin_ia32_cvtss2sd_round_mask((__v2df)(__m128d)(A), \ 9103 (__v4sf)(__m128)(B), \ 9104 (__v2df)_mm_setzero_pd(), \ 9105 (__mmask8)(U), (int)(R))) 9106 9107 static __inline__ __m128d __DEFAULT_FN_ATTRS128 9108 _mm_mask_cvtss_sd (__m128d __W, __mmask8 __U, __m128d __A, __m128 __B) 9109 { 9110 return __builtin_ia32_cvtss2sd_round_mask((__v2df)__A, 9111 (__v4sf)__B, 9112 (__v2df)__W, 9113 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); 9114 } 9115 9116 static __inline__ __m128d __DEFAULT_FN_ATTRS128 9117 _mm_maskz_cvtss_sd (__mmask8 __U, __m128d __A, __m128 __B) 9118 { 9119 return __builtin_ia32_cvtss2sd_round_mask((__v2df)__A, 9120 (__v4sf)__B, 9121 (__v2df)_mm_setzero_pd(), 9122 (__mmask8)__U, _MM_FROUND_CUR_DIRECTION); 9123 } 9124 9125 static __inline__ __m128d __DEFAULT_FN_ATTRS128 9126 _mm_cvtu32_sd (__m128d __A, unsigned __B) 9127 { 9128 __A[0] = __B; 9129 return __A; 9130 } 9131 9132 #ifdef __x86_64__ 9133 #define _mm_cvt_roundu64_sd(A, B, R) \ 9134 ((__m128d)__builtin_ia32_cvtusi2sd64((__v2df)(__m128d)(A), \ 9135 (unsigned long long)(B), (int)(R))) 9136 9137 static __inline__ __m128d __DEFAULT_FN_ATTRS128 9138 _mm_cvtu64_sd (__m128d __A, unsigned long long __B) 9139 { 9140 __A[0] = __B; 9141 return __A; 9142 } 9143 #endif 9144 9145 #define _mm_cvt_roundu32_ss(A, B, R) \ 9146 ((__m128)__builtin_ia32_cvtusi2ss32((__v4sf)(__m128)(A), (unsigned int)(B), \ 9147 (int)(R))) 9148 9149 static __inline__ __m128 __DEFAULT_FN_ATTRS128 9150 _mm_cvtu32_ss (__m128 __A, unsigned __B) 9151 { 9152 __A[0] = __B; 9153 return __A; 9154 } 9155 9156 #ifdef __x86_64__ 9157 #define _mm_cvt_roundu64_ss(A, B, R) \ 9158 ((__m128)__builtin_ia32_cvtusi2ss64((__v4sf)(__m128)(A), \ 9159 (unsigned long long)(B), (int)(R))) 9160 9161 static __inline__ __m128 __DEFAULT_FN_ATTRS128 9162 _mm_cvtu64_ss (__m128 __A, unsigned long long __B) 9163 { 9164 __A[0] = __B; 9165 return __A; 9166 } 9167 #endif 9168 9169 static __inline__ __m512i __DEFAULT_FN_ATTRS512 9170 _mm512_mask_set1_epi32 (__m512i __O, __mmask16 __M, int __A) 9171 { 9172 return (__m512i) __builtin_ia32_selectd_512(__M, 9173 (__v16si) _mm512_set1_epi32(__A), 9174 (__v16si) __O); 9175 } 9176 9177 static __inline__ __m512i __DEFAULT_FN_ATTRS512 9178 _mm512_mask_set1_epi64 (__m512i __O, __mmask8 __M, long long __A) 9179 { 9180 return (__m512i) __builtin_ia32_selectq_512(__M, 9181 (__v8di) _mm512_set1_epi64(__A), 9182 (__v8di) __O); 9183 } 9184 9185 static __inline __m512i __DEFAULT_FN_ATTRS512 9186 _mm512_set_epi8 (char __e63, char __e62, char __e61, char __e60, char __e59, 9187 char __e58, char __e57, char __e56, char __e55, char __e54, char __e53, 9188 char __e52, char __e51, char __e50, char __e49, char __e48, char __e47, 9189 char __e46, char __e45, char __e44, char __e43, char __e42, char __e41, 9190 char __e40, char __e39, char __e38, char __e37, char __e36, char __e35, 9191 char __e34, char __e33, char __e32, char __e31, char __e30, char __e29, 9192 char __e28, char __e27, char __e26, char __e25, char __e24, char __e23, 9193 char __e22, char __e21, char __e20, char __e19, char __e18, char __e17, 9194 char __e16, char __e15, char __e14, char __e13, char __e12, char __e11, 9195 char __e10, char __e9, char __e8, char __e7, char __e6, char __e5, 9196 char __e4, char __e3, char __e2, char __e1, char __e0) { 9197 9198 return __extension__ (__m512i)(__v64qi) 9199 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7, 9200 __e8, __e9, __e10, __e11, __e12, __e13, __e14, __e15, 9201 __e16, __e17, __e18, __e19, __e20, __e21, __e22, __e23, 9202 __e24, __e25, __e26, __e27, __e28, __e29, __e30, __e31, 9203 __e32, __e33, __e34, __e35, __e36, __e37, __e38, __e39, 9204 __e40, __e41, __e42, __e43, __e44, __e45, __e46, __e47, 9205 __e48, __e49, __e50, __e51, __e52, __e53, __e54, __e55, 9206 __e56, __e57, __e58, __e59, __e60, __e61, __e62, __e63}; 9207 } 9208 9209 static __inline __m512i __DEFAULT_FN_ATTRS512 9210 _mm512_set_epi16(short __e31, short __e30, short __e29, short __e28, 9211 short __e27, short __e26, short __e25, short __e24, short __e23, 9212 short __e22, short __e21, short __e20, short __e19, short __e18, 9213 short __e17, short __e16, short __e15, short __e14, short __e13, 9214 short __e12, short __e11, short __e10, short __e9, short __e8, 9215 short __e7, short __e6, short __e5, short __e4, short __e3, 9216 short __e2, short __e1, short __e0) { 9217 return __extension__ (__m512i)(__v32hi) 9218 {__e0, __e1, __e2, __e3, __e4, __e5, __e6, __e7, 9219 __e8, __e9, __e10, __e11, __e12, __e13, __e14, __e15, 9220 __e16, __e17, __e18, __e19, __e20, __e21, __e22, __e23, 9221 __e24, __e25, __e26, __e27, __e28, __e29, __e30, __e31 }; 9222 } 9223 9224 static __inline __m512i __DEFAULT_FN_ATTRS512 9225 _mm512_set_epi32 (int __A, int __B, int __C, int __D, 9226 int __E, int __F, int __G, int __H, 9227 int __I, int __J, int __K, int __L, 9228 int __M, int __N, int __O, int __P) 9229 { 9230 return __extension__ (__m512i)(__v16si) 9231 { __P, __O, __N, __M, __L, __K, __J, __I, 9232 __H, __G, __F, __E, __D, __C, __B, __A }; 9233 } 9234 9235 #define _mm512_setr_epi32(e0,e1,e2,e3,e4,e5,e6,e7, \ 9236 e8,e9,e10,e11,e12,e13,e14,e15) \ 9237 _mm512_set_epi32((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6), \ 9238 (e5),(e4),(e3),(e2),(e1),(e0)) 9239 9240 static __inline__ __m512i __DEFAULT_FN_ATTRS512 9241 _mm512_set_epi64 (long long __A, long long __B, long long __C, 9242 long long __D, long long __E, long long __F, 9243 long long __G, long long __H) 9244 { 9245 return __extension__ (__m512i) (__v8di) 9246 { __H, __G, __F, __E, __D, __C, __B, __A }; 9247 } 9248 9249 #define _mm512_setr_epi64(e0,e1,e2,e3,e4,e5,e6,e7) \ 9250 _mm512_set_epi64((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0)) 9251 9252 static __inline__ __m512d __DEFAULT_FN_ATTRS512 9253 _mm512_set_pd (double __A, double __B, double __C, double __D, 9254 double __E, double __F, double __G, double __H) 9255 { 9256 return __extension__ (__m512d) 9257 { __H, __G, __F, __E, __D, __C, __B, __A }; 9258 } 9259 9260 #define _mm512_setr_pd(e0,e1,e2,e3,e4,e5,e6,e7) \ 9261 _mm512_set_pd((e7),(e6),(e5),(e4),(e3),(e2),(e1),(e0)) 9262 9263 static __inline__ __m512 __DEFAULT_FN_ATTRS512 9264 _mm512_set_ps (float __A, float __B, float __C, float __D, 9265 float __E, float __F, float __G, float __H, 9266 float __I, float __J, float __K, float __L, 9267 float __M, float __N, float __O, float __P) 9268 { 9269 return __extension__ (__m512) 9270 { __P, __O, __N, __M, __L, __K, __J, __I, 9271 __H, __G, __F, __E, __D, __C, __B, __A }; 9272 } 9273 9274 #define _mm512_setr_ps(e0,e1,e2,e3,e4,e5,e6,e7,e8,e9,e10,e11,e12,e13,e14,e15) \ 9275 _mm512_set_ps((e15),(e14),(e13),(e12),(e11),(e10),(e9),(e8),(e7),(e6),(e5), \ 9276 (e4),(e3),(e2),(e1),(e0)) 9277 9278 static __inline__ __m512 __DEFAULT_FN_ATTRS512 9279 _mm512_abs_ps(__m512 __A) 9280 { 9281 return (__m512)_mm512_and_epi32(_mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ; 9282 } 9283 9284 static __inline__ __m512 __DEFAULT_FN_ATTRS512 9285 _mm512_mask_abs_ps(__m512 __W, __mmask16 __K, __m512 __A) 9286 { 9287 return (__m512)_mm512_mask_and_epi32((__m512i)__W, __K, _mm512_set1_epi32(0x7FFFFFFF),(__m512i)__A) ; 9288 } 9289 9290 static __inline__ __m512d __DEFAULT_FN_ATTRS512 9291 _mm512_abs_pd(__m512d __A) 9292 { 9293 return (__m512d)_mm512_and_epi64(_mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A) ; 9294 } 9295 9296 static __inline__ __m512d __DEFAULT_FN_ATTRS512 9297 _mm512_mask_abs_pd(__m512d __W, __mmask8 __K, __m512d __A) 9298 { 9299 return (__m512d)_mm512_mask_and_epi64((__v8di)__W, __K, _mm512_set1_epi64(0x7FFFFFFFFFFFFFFF),(__v8di)__A); 9300 } 9301 9302 /* Vector-reduction arithmetic accepts vectors as inputs and produces scalars as 9303 * outputs. This class of vector operation forms the basis of many scientific 9304 * computations. In vector-reduction arithmetic, the evaluation order is 9305 * independent of the order of the input elements of V. 9306 9307 * For floating-point intrinsics: 9308 * 1. When using fadd/fmul intrinsics, the order of operations within the 9309 * vector is unspecified (associative math). 9310 * 2. When using fmin/fmax intrinsics, NaN or -0.0 elements within the vector 9311 * produce unspecified results. 9312 9313 * Used bisection method. At each step, we partition the vector with previous 9314 * step in half, and the operation is performed on its two halves. 9315 * This takes log2(n) steps where n is the number of elements in the vector. 9316 */ 9317 9318 static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_add_epi64(__m512i __W) { 9319 return __builtin_ia32_reduce_add_q512(__W); 9320 } 9321 9322 static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_mul_epi64(__m512i __W) { 9323 return __builtin_ia32_reduce_mul_q512(__W); 9324 } 9325 9326 static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_and_epi64(__m512i __W) { 9327 return __builtin_reduce_and((__v8di)__W); 9328 } 9329 9330 static __inline__ long long __DEFAULT_FN_ATTRS512 _mm512_reduce_or_epi64(__m512i __W) { 9331 return __builtin_reduce_or((__v8di)__W); 9332 } 9333 9334 static __inline__ long long __DEFAULT_FN_ATTRS512 9335 _mm512_mask_reduce_add_epi64(__mmask8 __M, __m512i __W) { 9336 __W = _mm512_maskz_mov_epi64(__M, __W); 9337 return __builtin_ia32_reduce_add_q512(__W); 9338 } 9339 9340 static __inline__ long long __DEFAULT_FN_ATTRS512 9341 _mm512_mask_reduce_mul_epi64(__mmask8 __M, __m512i __W) { 9342 __W = _mm512_mask_mov_epi64(_mm512_set1_epi64(1), __M, __W); 9343 return __builtin_ia32_reduce_mul_q512(__W); 9344 } 9345 9346 static __inline__ long long __DEFAULT_FN_ATTRS512 9347 _mm512_mask_reduce_and_epi64(__mmask8 __M, __m512i __W) { 9348 __W = _mm512_mask_mov_epi64(_mm512_set1_epi64(~0ULL), __M, __W); 9349 return __builtin_reduce_and((__v8di)__W); 9350 } 9351 9352 static __inline__ long long __DEFAULT_FN_ATTRS512 9353 _mm512_mask_reduce_or_epi64(__mmask8 __M, __m512i __W) { 9354 __W = _mm512_maskz_mov_epi64(__M, __W); 9355 return __builtin_reduce_or((__v8di)__W); 9356 } 9357 9358 // -0.0 is used to ignore the start value since it is the neutral value of 9359 // floating point addition. For more information, please refer to 9360 // https://llvm.org/docs/LangRef.html#llvm-vector-reduce-fadd-intrinsic 9361 static __inline__ double __DEFAULT_FN_ATTRS512 _mm512_reduce_add_pd(__m512d __W) { 9362 return __builtin_ia32_reduce_fadd_pd512(-0.0, __W); 9363 } 9364 9365 static __inline__ double __DEFAULT_FN_ATTRS512 _mm512_reduce_mul_pd(__m512d __W) { 9366 return __builtin_ia32_reduce_fmul_pd512(1.0, __W); 9367 } 9368 9369 static __inline__ double __DEFAULT_FN_ATTRS512 9370 _mm512_mask_reduce_add_pd(__mmask8 __M, __m512d __W) { 9371 __W = _mm512_maskz_mov_pd(__M, __W); 9372 return __builtin_ia32_reduce_fadd_pd512(-0.0, __W); 9373 } 9374 9375 static __inline__ double __DEFAULT_FN_ATTRS512 9376 _mm512_mask_reduce_mul_pd(__mmask8 __M, __m512d __W) { 9377 __W = _mm512_mask_mov_pd(_mm512_set1_pd(1.0), __M, __W); 9378 return __builtin_ia32_reduce_fmul_pd512(1.0, __W); 9379 } 9380 9381 static __inline__ int __DEFAULT_FN_ATTRS512 9382 _mm512_reduce_add_epi32(__m512i __W) { 9383 return __builtin_ia32_reduce_add_d512((__v16si)__W); 9384 } 9385 9386 static __inline__ int __DEFAULT_FN_ATTRS512 9387 _mm512_reduce_mul_epi32(__m512i __W) { 9388 return __builtin_ia32_reduce_mul_d512((__v16si)__W); 9389 } 9390 9391 static __inline__ int __DEFAULT_FN_ATTRS512 9392 _mm512_reduce_and_epi32(__m512i __W) { 9393 return __builtin_reduce_and((__v16si)__W); 9394 } 9395 9396 static __inline__ int __DEFAULT_FN_ATTRS512 9397 _mm512_reduce_or_epi32(__m512i __W) { 9398 return __builtin_reduce_or((__v16si)__W); 9399 } 9400 9401 static __inline__ int __DEFAULT_FN_ATTRS512 9402 _mm512_mask_reduce_add_epi32( __mmask16 __M, __m512i __W) { 9403 __W = _mm512_maskz_mov_epi32(__M, __W); 9404 return __builtin_ia32_reduce_add_d512((__v16si)__W); 9405 } 9406 9407 static __inline__ int __DEFAULT_FN_ATTRS512 9408 _mm512_mask_reduce_mul_epi32( __mmask16 __M, __m512i __W) { 9409 __W = _mm512_mask_mov_epi32(_mm512_set1_epi32(1), __M, __W); 9410 return __builtin_ia32_reduce_mul_d512((__v16si)__W); 9411 } 9412 9413 static __inline__ int __DEFAULT_FN_ATTRS512 9414 _mm512_mask_reduce_and_epi32( __mmask16 __M, __m512i __W) { 9415 __W = _mm512_mask_mov_epi32(_mm512_set1_epi32(~0U), __M, __W); 9416 return __builtin_reduce_and((__v16si)__W); 9417 } 9418 9419 static __inline__ int __DEFAULT_FN_ATTRS512 9420 _mm512_mask_reduce_or_epi32(__mmask16 __M, __m512i __W) { 9421 __W = _mm512_maskz_mov_epi32(__M, __W); 9422 return __builtin_reduce_or((__v16si)__W); 9423 } 9424 9425 static __inline__ float __DEFAULT_FN_ATTRS512 9426 _mm512_reduce_add_ps(__m512 __W) { 9427 return __builtin_ia32_reduce_fadd_ps512(-0.0f, __W); 9428 } 9429 9430 static __inline__ float __DEFAULT_FN_ATTRS512 9431 _mm512_reduce_mul_ps(__m512 __W) { 9432 return __builtin_ia32_reduce_fmul_ps512(1.0f, __W); 9433 } 9434 9435 static __inline__ float __DEFAULT_FN_ATTRS512 9436 _mm512_mask_reduce_add_ps(__mmask16 __M, __m512 __W) { 9437 __W = _mm512_maskz_mov_ps(__M, __W); 9438 return __builtin_ia32_reduce_fadd_ps512(-0.0f, __W); 9439 } 9440 9441 static __inline__ float __DEFAULT_FN_ATTRS512 9442 _mm512_mask_reduce_mul_ps(__mmask16 __M, __m512 __W) { 9443 __W = _mm512_mask_mov_ps(_mm512_set1_ps(1.0f), __M, __W); 9444 return __builtin_ia32_reduce_fmul_ps512(1.0f, __W); 9445 } 9446 9447 static __inline__ long long __DEFAULT_FN_ATTRS512 9448 _mm512_reduce_max_epi64(__m512i __V) { 9449 return __builtin_reduce_max((__v8di)__V); 9450 } 9451 9452 static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 9453 _mm512_reduce_max_epu64(__m512i __V) { 9454 return __builtin_reduce_max((__v8du)__V); 9455 } 9456 9457 static __inline__ long long __DEFAULT_FN_ATTRS512 9458 _mm512_reduce_min_epi64(__m512i __V) { 9459 return __builtin_reduce_min((__v8di)__V); 9460 } 9461 9462 static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 9463 _mm512_reduce_min_epu64(__m512i __V) { 9464 return __builtin_reduce_min((__v8du)__V); 9465 } 9466 9467 static __inline__ long long __DEFAULT_FN_ATTRS512 9468 _mm512_mask_reduce_max_epi64(__mmask8 __M, __m512i __V) { 9469 __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(-__LONG_LONG_MAX__ - 1LL), __M, __V); 9470 return __builtin_reduce_max((__v8di)__V); 9471 } 9472 9473 static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 9474 _mm512_mask_reduce_max_epu64(__mmask8 __M, __m512i __V) { 9475 __V = _mm512_maskz_mov_epi64(__M, __V); 9476 return __builtin_reduce_max((__v8du)__V); 9477 } 9478 9479 static __inline__ long long __DEFAULT_FN_ATTRS512 9480 _mm512_mask_reduce_min_epi64(__mmask8 __M, __m512i __V) { 9481 __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(__LONG_LONG_MAX__), __M, __V); 9482 return __builtin_reduce_min((__v8di)__V); 9483 } 9484 9485 static __inline__ unsigned long long __DEFAULT_FN_ATTRS512 9486 _mm512_mask_reduce_min_epu64(__mmask8 __M, __m512i __V) { 9487 __V = _mm512_mask_mov_epi64(_mm512_set1_epi64(~0ULL), __M, __V); 9488 return __builtin_reduce_min((__v8du)__V); 9489 } 9490 static __inline__ int __DEFAULT_FN_ATTRS512 9491 _mm512_reduce_max_epi32(__m512i __V) { 9492 return __builtin_reduce_max((__v16si)__V); 9493 } 9494 9495 static __inline__ unsigned int __DEFAULT_FN_ATTRS512 9496 _mm512_reduce_max_epu32(__m512i __V) { 9497 return __builtin_reduce_max((__v16su)__V); 9498 } 9499 9500 static __inline__ int __DEFAULT_FN_ATTRS512 9501 _mm512_reduce_min_epi32(__m512i __V) { 9502 return __builtin_reduce_min((__v16si)__V); 9503 } 9504 9505 static __inline__ unsigned int __DEFAULT_FN_ATTRS512 9506 _mm512_reduce_min_epu32(__m512i __V) { 9507 return __builtin_reduce_min((__v16su)__V); 9508 } 9509 9510 static __inline__ int __DEFAULT_FN_ATTRS512 9511 _mm512_mask_reduce_max_epi32(__mmask16 __M, __m512i __V) { 9512 __V = _mm512_mask_mov_epi32(_mm512_set1_epi32(-__INT_MAX__ - 1), __M, __V); 9513 return __builtin_reduce_max((__v16si)__V); 9514 } 9515 9516 static __inline__ unsigned int __DEFAULT_FN_ATTRS512 9517 _mm512_mask_reduce_max_epu32(__mmask16 __M, __m512i __V) { 9518 __V = _mm512_maskz_mov_epi32(__M, __V); 9519 return __builtin_reduce_max((__v16su)__V); 9520 } 9521 9522 static __inline__ int __DEFAULT_FN_ATTRS512 9523 _mm512_mask_reduce_min_epi32(__mmask16 __M, __m512i __V) { 9524 __V = _mm512_mask_mov_epi32(_mm512_set1_epi32(__INT_MAX__), __M, __V); 9525 return __builtin_reduce_min((__v16si)__V); 9526 } 9527 9528 static __inline__ unsigned int __DEFAULT_FN_ATTRS512 9529 _mm512_mask_reduce_min_epu32(__mmask16 __M, __m512i __V) { 9530 __V = _mm512_mask_mov_epi32(_mm512_set1_epi32(~0U), __M, __V); 9531 return __builtin_reduce_min((__v16su)__V); 9532 } 9533 9534 static __inline__ double __DEFAULT_FN_ATTRS512 9535 _mm512_reduce_max_pd(__m512d __V) { 9536 return __builtin_ia32_reduce_fmax_pd512(__V); 9537 } 9538 9539 static __inline__ double __DEFAULT_FN_ATTRS512 9540 _mm512_reduce_min_pd(__m512d __V) { 9541 return __builtin_ia32_reduce_fmin_pd512(__V); 9542 } 9543 9544 static __inline__ double __DEFAULT_FN_ATTRS512 9545 _mm512_mask_reduce_max_pd(__mmask8 __M, __m512d __V) { 9546 __V = _mm512_mask_mov_pd(_mm512_set1_pd(-__builtin_inf()), __M, __V); 9547 return __builtin_ia32_reduce_fmax_pd512(__V); 9548 } 9549 9550 static __inline__ double __DEFAULT_FN_ATTRS512 9551 _mm512_mask_reduce_min_pd(__mmask8 __M, __m512d __V) { 9552 __V = _mm512_mask_mov_pd(_mm512_set1_pd(__builtin_inf()), __M, __V); 9553 return __builtin_ia32_reduce_fmin_pd512(__V); 9554 } 9555 9556 static __inline__ float __DEFAULT_FN_ATTRS512 9557 _mm512_reduce_max_ps(__m512 __V) { 9558 return __builtin_ia32_reduce_fmax_ps512(__V); 9559 } 9560 9561 static __inline__ float __DEFAULT_FN_ATTRS512 9562 _mm512_reduce_min_ps(__m512 __V) { 9563 return __builtin_ia32_reduce_fmin_ps512(__V); 9564 } 9565 9566 static __inline__ float __DEFAULT_FN_ATTRS512 9567 _mm512_mask_reduce_max_ps(__mmask16 __M, __m512 __V) { 9568 __V = _mm512_mask_mov_ps(_mm512_set1_ps(-__builtin_inff()), __M, __V); 9569 return __builtin_ia32_reduce_fmax_ps512(__V); 9570 } 9571 9572 static __inline__ float __DEFAULT_FN_ATTRS512 9573 _mm512_mask_reduce_min_ps(__mmask16 __M, __m512 __V) { 9574 __V = _mm512_mask_mov_ps(_mm512_set1_ps(__builtin_inff()), __M, __V); 9575 return __builtin_ia32_reduce_fmin_ps512(__V); 9576 } 9577 9578 /// Moves the least significant 32 bits of a vector of [16 x i32] to a 9579 /// 32-bit signed integer value. 9580 /// 9581 /// \headerfile <x86intrin.h> 9582 /// 9583 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction. 9584 /// 9585 /// \param __A 9586 /// A vector of [16 x i32]. The least significant 32 bits are moved to the 9587 /// destination. 9588 /// \returns A 32-bit signed integer containing the moved value. 9589 static __inline__ int __DEFAULT_FN_ATTRS512 9590 _mm512_cvtsi512_si32(__m512i __A) { 9591 __v16si __b = (__v16si)__A; 9592 return __b[0]; 9593 } 9594 9595 /// Loads 8 double-precision (64-bit) floating-point elements stored at memory 9596 /// locations starting at location \a base_addr at packed 32-bit integer indices 9597 /// stored in the lower half of \a vindex scaled by \a scale them in dst. 9598 /// 9599 /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions. 9600 /// 9601 /// \operation 9602 /// FOR j := 0 to 7 9603 /// i := j*64 9604 /// m := j*32 9605 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9606 /// dst[i+63:i] := MEM[addr+63:addr] 9607 /// ENDFOR 9608 /// dst[MAX:512] := 0 9609 /// \endoperation 9610 #define _mm512_i32logather_pd(vindex, base_addr, scale) \ 9611 _mm512_i32gather_pd(_mm512_castsi512_si256(vindex), (base_addr), (scale)) 9612 9613 /// Loads 8 double-precision (64-bit) floating-point elements from memory 9614 /// starting at location \a base_addr at packed 32-bit integer indices stored in 9615 /// the lower half of \a vindex scaled by \a scale into dst using writemask 9616 /// \a mask (elements are copied from \a src when the corresponding mask bit is 9617 /// not set). 9618 /// 9619 /// This intrinsic corresponds to the <c> VGATHERDPD </c> instructions. 9620 /// 9621 /// \operation 9622 /// FOR j := 0 to 7 9623 /// i := j*64 9624 /// m := j*32 9625 /// IF mask[j] 9626 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9627 /// dst[i+63:i] := MEM[addr+63:addr] 9628 /// ELSE 9629 /// dst[i+63:i] := src[i+63:i] 9630 /// FI 9631 /// ENDFOR 9632 /// dst[MAX:512] := 0 9633 /// \endoperation 9634 #define _mm512_mask_i32logather_pd(src, mask, vindex, base_addr, scale) \ 9635 _mm512_mask_i32gather_pd((src), (mask), _mm512_castsi512_si256(vindex), \ 9636 (base_addr), (scale)) 9637 9638 /// Loads 8 64-bit integer elements from memory starting at location \a base_addr 9639 /// at packed 32-bit integer indices stored in the lower half of \a vindex 9640 /// scaled by \a scale and stores them in dst. 9641 /// 9642 /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions. 9643 /// 9644 /// \operation 9645 /// FOR j := 0 to 7 9646 /// i := j*64 9647 /// m := j*32 9648 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9649 /// dst[i+63:i] := MEM[addr+63:addr] 9650 /// ENDFOR 9651 /// dst[MAX:512] := 0 9652 /// \endoperation 9653 #define _mm512_i32logather_epi64(vindex, base_addr, scale) \ 9654 _mm512_i32gather_epi64(_mm512_castsi512_si256(vindex), (base_addr), (scale)) 9655 9656 /// Loads 8 64-bit integer elements from memory starting at location \a base_addr 9657 /// at packed 32-bit integer indices stored in the lower half of \a vindex 9658 /// scaled by \a scale and stores them in dst using writemask \a mask (elements 9659 /// are copied from \a src when the corresponding mask bit is not set). 9660 /// 9661 /// This intrinsic corresponds to the <c> VPGATHERDQ </c> instructions. 9662 /// 9663 /// \operation 9664 /// FOR j := 0 to 7 9665 /// i := j*64 9666 /// m := j*32 9667 /// IF mask[j] 9668 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9669 /// dst[i+63:i] := MEM[addr+63:addr] 9670 /// ELSE 9671 /// dst[i+63:i] := src[i+63:i] 9672 /// FI 9673 /// ENDFOR 9674 /// dst[MAX:512] := 0 9675 /// \endoperation 9676 #define _mm512_mask_i32logather_epi64(src, mask, vindex, base_addr, scale) \ 9677 _mm512_mask_i32gather_epi64((src), (mask), _mm512_castsi512_si256(vindex), \ 9678 (base_addr), (scale)) 9679 9680 /// Stores 8 packed double-precision (64-bit) floating-point elements in \a v1 9681 /// and to memory locations starting at location \a base_addr at packed 32-bit 9682 /// integer indices stored in \a vindex scaled by \a scale. 9683 /// 9684 /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions. 9685 /// 9686 /// \operation 9687 /// FOR j := 0 to 7 9688 /// i := j*64 9689 /// m := j*32 9690 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9691 /// MEM[addr+63:addr] := v1[i+63:i] 9692 /// ENDFOR 9693 /// \endoperation 9694 #define _mm512_i32loscatter_pd(base_addr, vindex, v1, scale) \ 9695 _mm512_i32scatter_pd((base_addr), _mm512_castsi512_si256(vindex), (v1), (scale)) 9696 9697 /// Stores 8 packed double-precision (64-bit) floating-point elements in \a v1 9698 /// to memory locations starting at location \a base_addr at packed 32-bit 9699 /// integer indices stored in \a vindex scaled by \a scale. Only those elements 9700 /// whose corresponding mask bit is set in writemask \a mask are written to 9701 /// memory. 9702 /// 9703 /// This intrinsic corresponds to the <c> VSCATTERDPD </c> instructions. 9704 /// 9705 /// \operation 9706 /// FOR j := 0 to 7 9707 /// i := j*64 9708 /// m := j*32 9709 /// IF mask[j] 9710 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9711 /// MEM[addr+63:addr] := a[i+63:i] 9712 /// FI 9713 /// ENDFOR 9714 /// \endoperation 9715 #define _mm512_mask_i32loscatter_pd(base_addr, mask, vindex, v1, scale) \ 9716 _mm512_mask_i32scatter_pd((base_addr), (mask), \ 9717 _mm512_castsi512_si256(vindex), (v1), (scale)) 9718 9719 /// Stores 8 packed 64-bit integer elements located in \a v1 and stores them in 9720 /// memory locations starting at location \a base_addr at packed 32-bit integer 9721 /// indices stored in \a vindex scaled by \a scale. 9722 /// 9723 /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions. 9724 /// 9725 /// \operation 9726 /// FOR j := 0 to 7 9727 /// i := j*64 9728 /// m := j*32 9729 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9730 /// MEM[addr+63:addr] := a[i+63:i] 9731 /// ENDFOR 9732 /// \endoperation 9733 #define _mm512_i32loscatter_epi64(base_addr, vindex, v1, scale) \ 9734 _mm512_i32scatter_epi64((base_addr), \ 9735 _mm512_castsi512_si256(vindex), (v1), (scale)) 9736 9737 /// Stores 8 packed 64-bit integer elements located in a and stores them in 9738 /// memory locations starting at location \a base_addr at packed 32-bit integer 9739 /// indices stored in \a vindex scaled by scale using writemask \a mask (elements 9740 /// whose corresponding mask bit is not set are not written to memory). 9741 /// 9742 /// This intrinsic corresponds to the <c> VPSCATTERDQ </c> instructions. 9743 /// 9744 /// \operation 9745 /// FOR j := 0 to 7 9746 /// i := j*64 9747 /// m := j*32 9748 /// IF mask[j] 9749 /// addr := base_addr + SignExtend64(vindex[m+31:m]) * ZeroExtend64(scale) * 8 9750 /// MEM[addr+63:addr] := a[i+63:i] 9751 /// FI 9752 /// ENDFOR 9753 /// \endoperation 9754 #define _mm512_mask_i32loscatter_epi64(base_addr, mask, vindex, v1, scale) \ 9755 _mm512_mask_i32scatter_epi64((base_addr), (mask), \ 9756 _mm512_castsi512_si256(vindex), (v1), (scale)) 9757 9758 #undef __DEFAULT_FN_ATTRS512 9759 #undef __DEFAULT_FN_ATTRS128 9760 #undef __DEFAULT_FN_ATTRS 9761 9762 #endif /* __AVX512FINTRIN_H */ 9763