1 //===--- RISCV.cpp - RISCV Helpers for Tools --------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "RISCV.h" 10 #include "../Clang.h" 11 #include "ToolChains/CommonArgs.h" 12 #include "clang/Basic/CharInfo.h" 13 #include "clang/Driver/Driver.h" 14 #include "clang/Driver/DriverDiagnostic.h" 15 #include "clang/Driver/Options.h" 16 #include "llvm/ADT/Optional.h" 17 #include "llvm/Option/ArgList.h" 18 #include "llvm/Support/Error.h" 19 #include "llvm/Support/RISCVISAInfo.h" 20 #include "llvm/Support/TargetParser.h" 21 #include "llvm/Support/raw_ostream.h" 22 23 using namespace clang::driver; 24 using namespace clang::driver::tools; 25 using namespace clang; 26 using namespace llvm::opt; 27 28 // Returns false if an error is diagnosed. 29 static bool getArchFeatures(const Driver &D, StringRef Arch, 30 std::vector<StringRef> &Features, 31 const ArgList &Args) { 32 bool EnableExperimentalExtensions = 33 Args.hasArg(options::OPT_menable_experimental_extensions); 34 auto ISAInfo = 35 llvm::RISCVISAInfo::parseArchString(Arch, EnableExperimentalExtensions); 36 if (!ISAInfo) { 37 handleAllErrors(ISAInfo.takeError(), [&](llvm::StringError &ErrMsg) { 38 D.Diag(diag::err_drv_invalid_riscv_arch_name) 39 << Arch << ErrMsg.getMessage(); 40 }); 41 42 return false; 43 } 44 45 (*ISAInfo)->toFeatures( 46 Features, [&Args](const Twine &Str) { return Args.MakeArgString(Str); }); 47 return true; 48 } 49 50 // Get features except standard extension feature 51 static void getRISCFeaturesFromMcpu(const Driver &D, const llvm::Triple &Triple, 52 const llvm::opt::ArgList &Args, 53 const llvm::opt::Arg *A, StringRef Mcpu, 54 std::vector<StringRef> &Features) { 55 bool Is64Bit = (Triple.getArch() == llvm::Triple::riscv64); 56 llvm::RISCV::CPUKind CPUKind = llvm::RISCV::parseCPUKind(Mcpu); 57 if (!llvm::RISCV::checkCPUKind(CPUKind, Is64Bit) || 58 !llvm::RISCV::getCPUFeaturesExceptStdExt(CPUKind, Features)) { 59 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args); 60 } 61 } 62 63 void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple, 64 const ArgList &Args, 65 std::vector<StringRef> &Features) { 66 StringRef MArch = getRISCVArch(Args, Triple); 67 68 if (!getArchFeatures(D, MArch, Features, Args)) 69 return; 70 71 // If users give march and mcpu, get std extension feature from MArch 72 // and other features (ex. mirco architecture feature) from mcpu 73 if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) 74 getRISCFeaturesFromMcpu(D, Triple, Args, A, A->getValue(), Features); 75 76 // Handle features corresponding to "-ffixed-X" options 77 if (Args.hasArg(options::OPT_ffixed_x1)) 78 Features.push_back("+reserve-x1"); 79 if (Args.hasArg(options::OPT_ffixed_x2)) 80 Features.push_back("+reserve-x2"); 81 if (Args.hasArg(options::OPT_ffixed_x3)) 82 Features.push_back("+reserve-x3"); 83 if (Args.hasArg(options::OPT_ffixed_x4)) 84 Features.push_back("+reserve-x4"); 85 if (Args.hasArg(options::OPT_ffixed_x5)) 86 Features.push_back("+reserve-x5"); 87 if (Args.hasArg(options::OPT_ffixed_x6)) 88 Features.push_back("+reserve-x6"); 89 if (Args.hasArg(options::OPT_ffixed_x7)) 90 Features.push_back("+reserve-x7"); 91 if (Args.hasArg(options::OPT_ffixed_x8)) 92 Features.push_back("+reserve-x8"); 93 if (Args.hasArg(options::OPT_ffixed_x9)) 94 Features.push_back("+reserve-x9"); 95 if (Args.hasArg(options::OPT_ffixed_x10)) 96 Features.push_back("+reserve-x10"); 97 if (Args.hasArg(options::OPT_ffixed_x11)) 98 Features.push_back("+reserve-x11"); 99 if (Args.hasArg(options::OPT_ffixed_x12)) 100 Features.push_back("+reserve-x12"); 101 if (Args.hasArg(options::OPT_ffixed_x13)) 102 Features.push_back("+reserve-x13"); 103 if (Args.hasArg(options::OPT_ffixed_x14)) 104 Features.push_back("+reserve-x14"); 105 if (Args.hasArg(options::OPT_ffixed_x15)) 106 Features.push_back("+reserve-x15"); 107 if (Args.hasArg(options::OPT_ffixed_x16)) 108 Features.push_back("+reserve-x16"); 109 if (Args.hasArg(options::OPT_ffixed_x17)) 110 Features.push_back("+reserve-x17"); 111 if (Args.hasArg(options::OPT_ffixed_x18)) 112 Features.push_back("+reserve-x18"); 113 if (Args.hasArg(options::OPT_ffixed_x19)) 114 Features.push_back("+reserve-x19"); 115 if (Args.hasArg(options::OPT_ffixed_x20)) 116 Features.push_back("+reserve-x20"); 117 if (Args.hasArg(options::OPT_ffixed_x21)) 118 Features.push_back("+reserve-x21"); 119 if (Args.hasArg(options::OPT_ffixed_x22)) 120 Features.push_back("+reserve-x22"); 121 if (Args.hasArg(options::OPT_ffixed_x23)) 122 Features.push_back("+reserve-x23"); 123 if (Args.hasArg(options::OPT_ffixed_x24)) 124 Features.push_back("+reserve-x24"); 125 if (Args.hasArg(options::OPT_ffixed_x25)) 126 Features.push_back("+reserve-x25"); 127 if (Args.hasArg(options::OPT_ffixed_x26)) 128 Features.push_back("+reserve-x26"); 129 if (Args.hasArg(options::OPT_ffixed_x27)) 130 Features.push_back("+reserve-x27"); 131 if (Args.hasArg(options::OPT_ffixed_x28)) 132 Features.push_back("+reserve-x28"); 133 if (Args.hasArg(options::OPT_ffixed_x29)) 134 Features.push_back("+reserve-x29"); 135 if (Args.hasArg(options::OPT_ffixed_x30)) 136 Features.push_back("+reserve-x30"); 137 if (Args.hasArg(options::OPT_ffixed_x31)) 138 Features.push_back("+reserve-x31"); 139 140 // FreeBSD local, because ld.lld doesn't support relaxations 141 // -mno-relax is default, unless -mrelax is specified. 142 if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, false)) { 143 Features.push_back("+relax"); 144 // -gsplit-dwarf -mrelax requires DW_AT_high_pc/DW_AT_ranges/... indexing 145 // into .debug_addr, which is currently not implemented. 146 Arg *A; 147 if (getDebugFissionKind(D, Args, A) != DwarfFissionKind::None) 148 D.Diag(clang::diag::err_drv_riscv_unsupported_with_linker_relaxation) 149 << A->getAsString(Args); 150 } else { 151 Features.push_back("-relax"); 152 } 153 154 // GCC Compatibility: -mno-save-restore is default, unless -msave-restore is 155 // specified. 156 if (Args.hasFlag(options::OPT_msave_restore, options::OPT_mno_save_restore, false)) 157 Features.push_back("+save-restore"); 158 else 159 Features.push_back("-save-restore"); 160 161 // Now add any that the user explicitly requested on the command line, 162 // which may override the defaults. 163 handleTargetFeaturesGroup(Args, Features, options::OPT_m_riscv_Features_Group); 164 } 165 166 StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) { 167 assert((Triple.getArch() == llvm::Triple::riscv32 || 168 Triple.getArch() == llvm::Triple::riscv64) && 169 "Unexpected triple"); 170 171 // GCC's logic around choosing a default `-mabi=` is complex. If GCC is not 172 // configured using `--with-abi=`, then the logic for the default choice is 173 // defined in config.gcc. This function is based on the logic in GCC 9.2.0. 174 // 175 // The logic used in GCC 9.2.0 is the following, in order: 176 // 1. Explicit choices using `--with-abi=` 177 // 2. A default based on `--with-arch=`, if provided 178 // 3. A default based on the target triple's arch 179 // 180 // The logic in config.gcc is a little circular but it is not inconsistent. 181 // 182 // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=` 183 // and `-mabi=` respectively instead. 184 // 185 // In order to make chosing logic more clear, Clang uses the following logic, 186 // in order: 187 // 1. Explicit choices using `-mabi=` 188 // 2. A default based on the architecture as determined by getRISCVArch 189 // 3. Choose a default based on the triple 190 191 // 1. If `-mabi=` is specified, use it. 192 if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) 193 return A->getValue(); 194 195 // 2. Choose a default based on the target architecture. 196 // 197 // rv32g | rv32*d -> ilp32d 198 // rv32e -> ilp32e 199 // rv32* -> ilp32 200 // rv64g | rv64*d -> lp64d 201 // rv64* -> lp64 202 StringRef Arch = getRISCVArch(Args, Triple); 203 204 auto ParseResult = llvm::RISCVISAInfo::parseArchString( 205 Arch, /* EnableExperimentalExtension */ true); 206 if (!ParseResult) 207 // Ignore parsing error, just go 3rd step. 208 consumeError(ParseResult.takeError()); 209 else 210 return (*ParseResult)->computeDefaultABI(); 211 212 // 3. Choose a default based on the triple 213 // 214 // We deviate from GCC's defaults here: 215 // - On `riscv{XLEN}-unknown-elf` we use the integer calling convention only. 216 // - On all other OSs we use the double floating point calling convention. 217 if (Triple.getArch() == llvm::Triple::riscv32) { 218 if (Triple.getOS() == llvm::Triple::UnknownOS) 219 return "ilp32"; 220 else 221 return "ilp32d"; 222 } else { 223 if (Triple.getOS() == llvm::Triple::UnknownOS) 224 return "lp64"; 225 else 226 return "lp64d"; 227 } 228 } 229 230 StringRef riscv::getRISCVArch(const llvm::opt::ArgList &Args, 231 const llvm::Triple &Triple) { 232 assert((Triple.getArch() == llvm::Triple::riscv32 || 233 Triple.getArch() == llvm::Triple::riscv64) && 234 "Unexpected triple"); 235 236 // GCC's logic around choosing a default `-march=` is complex. If GCC is not 237 // configured using `--with-arch=`, then the logic for the default choice is 238 // defined in config.gcc. This function is based on the logic in GCC 9.2.0. We 239 // deviate from GCC's default on additional `-mcpu` option (GCC does not 240 // support `-mcpu`) and baremetal targets (UnknownOS) where neither `-march` 241 // nor `-mabi` is specified. 242 // 243 // The logic used in GCC 9.2.0 is the following, in order: 244 // 1. Explicit choices using `--with-arch=` 245 // 2. A default based on `--with-abi=`, if provided 246 // 3. A default based on the target triple's arch 247 // 248 // The logic in config.gcc is a little circular but it is not inconsistent. 249 // 250 // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=` 251 // and `-mabi=` respectively instead. 252 // 253 // Clang uses the following logic, in order: 254 // 1. Explicit choices using `-march=` 255 // 2. Based on `-mcpu` if the target CPU has a default ISA string 256 // 3. A default based on `-mabi`, if provided 257 // 4. A default based on the target triple's arch 258 // 259 // Clang does not yet support MULTILIB_REUSE, so we use `rv{XLEN}imafdc` 260 // instead of `rv{XLEN}gc` though they are (currently) equivalent. 261 262 // 1. If `-march=` is specified, use it. 263 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) 264 return A->getValue(); 265 266 // 2. Get march (isa string) based on `-mcpu=` 267 if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { 268 StringRef MArch = llvm::RISCV::getMArchFromMcpu(A->getValue()); 269 // Bypass if target cpu's default march is empty. 270 if (MArch != "") 271 return MArch; 272 } 273 274 // 3. Choose a default based on `-mabi=` 275 // 276 // ilp32e -> rv32e 277 // ilp32 | ilp32f | ilp32d -> rv32imafdc 278 // lp64 | lp64f | lp64d -> rv64imafdc 279 if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) { 280 StringRef MABI = A->getValue(); 281 282 if (MABI.equals_insensitive("ilp32e")) 283 return "rv32e"; 284 else if (MABI.startswith_insensitive("ilp32")) 285 return "rv32imafdc"; 286 else if (MABI.startswith_insensitive("lp64")) 287 return "rv64imafdc"; 288 } 289 290 // 4. Choose a default based on the triple 291 // 292 // We deviate from GCC's defaults here: 293 // - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac` 294 // - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`) 295 if (Triple.getArch() == llvm::Triple::riscv32) { 296 if (Triple.getOS() == llvm::Triple::UnknownOS) 297 return "rv32imac"; 298 else 299 return "rv32imafdc"; 300 } else { 301 if (Triple.getOS() == llvm::Triple::UnknownOS) 302 return "rv64imac"; 303 else 304 return "rv64imafdc"; 305 } 306 } 307