1 //===--- RISCV.cpp - RISCV Helpers for Tools --------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "RISCV.h" 10 #include "../Clang.h" 11 #include "ToolChains/CommonArgs.h" 12 #include "clang/Basic/CharInfo.h" 13 #include "clang/Driver/Driver.h" 14 #include "clang/Driver/DriverDiagnostic.h" 15 #include "clang/Driver/Options.h" 16 #include "llvm/Option/ArgList.h" 17 #include "llvm/Support/Error.h" 18 #include "llvm/Support/Host.h" 19 #include "llvm/Support/RISCVISAInfo.h" 20 #include "llvm/Support/raw_ostream.h" 21 #include "llvm/TargetParser/RISCVTargetParser.h" 22 23 using namespace clang::driver; 24 using namespace clang::driver::tools; 25 using namespace clang; 26 using namespace llvm::opt; 27 28 // Returns false if an error is diagnosed. 29 static bool getArchFeatures(const Driver &D, StringRef Arch, 30 std::vector<StringRef> &Features, 31 const ArgList &Args) { 32 bool EnableExperimentalExtensions = 33 Args.hasArg(options::OPT_menable_experimental_extensions); 34 auto ISAInfo = 35 llvm::RISCVISAInfo::parseArchString(Arch, EnableExperimentalExtensions); 36 if (!ISAInfo) { 37 handleAllErrors(ISAInfo.takeError(), [&](llvm::StringError &ErrMsg) { 38 D.Diag(diag::err_drv_invalid_riscv_arch_name) 39 << Arch << ErrMsg.getMessage(); 40 }); 41 42 return false; 43 } 44 45 (*ISAInfo)->toFeatures( 46 Features, [&Args](const Twine &Str) { return Args.MakeArgString(Str); }, 47 /*AddAllExtensions=*/true); 48 return true; 49 } 50 51 // Get features except standard extension feature 52 static bool getRISCFeaturesFromMcpu(const llvm::Triple &Triple, StringRef Mcpu, 53 std::vector<StringRef> &Features) { 54 bool Is64Bit = Triple.isRISCV64(); 55 llvm::RISCV::CPUKind CPUKind = llvm::RISCV::parseCPUKind(Mcpu); 56 return llvm::RISCV::checkCPUKind(CPUKind, Is64Bit) && 57 llvm::RISCV::getCPUFeaturesExceptStdExt(CPUKind, Features); 58 } 59 60 void riscv::getRISCVTargetFeatures(const Driver &D, const llvm::Triple &Triple, 61 const ArgList &Args, 62 std::vector<StringRef> &Features) { 63 StringRef MArch = getRISCVArch(Args, Triple); 64 65 if (!getArchFeatures(D, MArch, Features, Args)) 66 return; 67 68 // If users give march and mcpu, get std extension feature from MArch 69 // and other features (ex. mirco architecture feature) from mcpu 70 if (Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { 71 StringRef CPU = A->getValue(); 72 if (CPU == "native") 73 CPU = llvm::sys::getHostCPUName(); 74 if (!getRISCFeaturesFromMcpu(Triple, CPU, Features)) 75 D.Diag(clang::diag::err_drv_unsupported_option_argument) 76 << A->getSpelling() << CPU; 77 } 78 79 // Handle features corresponding to "-ffixed-X" options 80 if (Args.hasArg(options::OPT_ffixed_x1)) 81 Features.push_back("+reserve-x1"); 82 if (Args.hasArg(options::OPT_ffixed_x2)) 83 Features.push_back("+reserve-x2"); 84 if (Args.hasArg(options::OPT_ffixed_x3)) 85 Features.push_back("+reserve-x3"); 86 if (Args.hasArg(options::OPT_ffixed_x4)) 87 Features.push_back("+reserve-x4"); 88 if (Args.hasArg(options::OPT_ffixed_x5)) 89 Features.push_back("+reserve-x5"); 90 if (Args.hasArg(options::OPT_ffixed_x6)) 91 Features.push_back("+reserve-x6"); 92 if (Args.hasArg(options::OPT_ffixed_x7)) 93 Features.push_back("+reserve-x7"); 94 if (Args.hasArg(options::OPT_ffixed_x8)) 95 Features.push_back("+reserve-x8"); 96 if (Args.hasArg(options::OPT_ffixed_x9)) 97 Features.push_back("+reserve-x9"); 98 if (Args.hasArg(options::OPT_ffixed_x10)) 99 Features.push_back("+reserve-x10"); 100 if (Args.hasArg(options::OPT_ffixed_x11)) 101 Features.push_back("+reserve-x11"); 102 if (Args.hasArg(options::OPT_ffixed_x12)) 103 Features.push_back("+reserve-x12"); 104 if (Args.hasArg(options::OPT_ffixed_x13)) 105 Features.push_back("+reserve-x13"); 106 if (Args.hasArg(options::OPT_ffixed_x14)) 107 Features.push_back("+reserve-x14"); 108 if (Args.hasArg(options::OPT_ffixed_x15)) 109 Features.push_back("+reserve-x15"); 110 if (Args.hasArg(options::OPT_ffixed_x16)) 111 Features.push_back("+reserve-x16"); 112 if (Args.hasArg(options::OPT_ffixed_x17)) 113 Features.push_back("+reserve-x17"); 114 if (Args.hasArg(options::OPT_ffixed_x18)) 115 Features.push_back("+reserve-x18"); 116 if (Args.hasArg(options::OPT_ffixed_x19)) 117 Features.push_back("+reserve-x19"); 118 if (Args.hasArg(options::OPT_ffixed_x20)) 119 Features.push_back("+reserve-x20"); 120 if (Args.hasArg(options::OPT_ffixed_x21)) 121 Features.push_back("+reserve-x21"); 122 if (Args.hasArg(options::OPT_ffixed_x22)) 123 Features.push_back("+reserve-x22"); 124 if (Args.hasArg(options::OPT_ffixed_x23)) 125 Features.push_back("+reserve-x23"); 126 if (Args.hasArg(options::OPT_ffixed_x24)) 127 Features.push_back("+reserve-x24"); 128 if (Args.hasArg(options::OPT_ffixed_x25)) 129 Features.push_back("+reserve-x25"); 130 if (Args.hasArg(options::OPT_ffixed_x26)) 131 Features.push_back("+reserve-x26"); 132 if (Args.hasArg(options::OPT_ffixed_x27)) 133 Features.push_back("+reserve-x27"); 134 if (Args.hasArg(options::OPT_ffixed_x28)) 135 Features.push_back("+reserve-x28"); 136 if (Args.hasArg(options::OPT_ffixed_x29)) 137 Features.push_back("+reserve-x29"); 138 if (Args.hasArg(options::OPT_ffixed_x30)) 139 Features.push_back("+reserve-x30"); 140 if (Args.hasArg(options::OPT_ffixed_x31)) 141 Features.push_back("+reserve-x31"); 142 143 // FreeBSD local, because ld.lld doesn't support relaxations 144 // -mno-relax is default, unless -mrelax is specified. 145 if (Args.hasFlag(options::OPT_mrelax, options::OPT_mno_relax, false)) { 146 Features.push_back("+relax"); 147 // -gsplit-dwarf -mrelax requires DW_AT_high_pc/DW_AT_ranges/... indexing 148 // into .debug_addr, which is currently not implemented. 149 Arg *A; 150 if (getDebugFissionKind(D, Args, A) != DwarfFissionKind::None) 151 D.Diag(clang::diag::err_drv_riscv_unsupported_with_linker_relaxation) 152 << A->getAsString(Args); 153 } else { 154 Features.push_back("-relax"); 155 } 156 157 // GCC Compatibility: -mno-save-restore is default, unless -msave-restore is 158 // specified. 159 if (Args.hasFlag(options::OPT_msave_restore, options::OPT_mno_save_restore, false)) 160 Features.push_back("+save-restore"); 161 else 162 Features.push_back("-save-restore"); 163 164 // Now add any that the user explicitly requested on the command line, 165 // which may override the defaults. 166 handleTargetFeaturesGroup(Args, Features, options::OPT_m_riscv_Features_Group); 167 } 168 169 StringRef riscv::getRISCVABI(const ArgList &Args, const llvm::Triple &Triple) { 170 assert(Triple.isRISCV() && "Unexpected triple"); 171 172 // GCC's logic around choosing a default `-mabi=` is complex. If GCC is not 173 // configured using `--with-abi=`, then the logic for the default choice is 174 // defined in config.gcc. This function is based on the logic in GCC 9.2.0. 175 // 176 // The logic used in GCC 9.2.0 is the following, in order: 177 // 1. Explicit choices using `--with-abi=` 178 // 2. A default based on `--with-arch=`, if provided 179 // 3. A default based on the target triple's arch 180 // 181 // The logic in config.gcc is a little circular but it is not inconsistent. 182 // 183 // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=` 184 // and `-mabi=` respectively instead. 185 // 186 // In order to make chosing logic more clear, Clang uses the following logic, 187 // in order: 188 // 1. Explicit choices using `-mabi=` 189 // 2. A default based on the architecture as determined by getRISCVArch 190 // 3. Choose a default based on the triple 191 192 // 1. If `-mabi=` is specified, use it. 193 if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) 194 return A->getValue(); 195 196 // 2. Choose a default based on the target architecture. 197 // 198 // rv32g | rv32*d -> ilp32d 199 // rv32e -> ilp32e 200 // rv32* -> ilp32 201 // rv64g | rv64*d -> lp64d 202 // rv64* -> lp64 203 StringRef Arch = getRISCVArch(Args, Triple); 204 205 auto ParseResult = llvm::RISCVISAInfo::parseArchString( 206 Arch, /* EnableExperimentalExtension */ true); 207 if (!ParseResult) 208 // Ignore parsing error, just go 3rd step. 209 consumeError(ParseResult.takeError()); 210 else 211 return (*ParseResult)->computeDefaultABI(); 212 213 // 3. Choose a default based on the triple 214 // 215 // We deviate from GCC's defaults here: 216 // - On `riscv{XLEN}-unknown-elf` we use the integer calling convention only. 217 // - On all other OSs we use the double floating point calling convention. 218 if (Triple.isRISCV32()) { 219 if (Triple.getOS() == llvm::Triple::UnknownOS) 220 return "ilp32"; 221 else 222 return "ilp32d"; 223 } else { 224 if (Triple.getOS() == llvm::Triple::UnknownOS) 225 return "lp64"; 226 else 227 return "lp64d"; 228 } 229 } 230 231 StringRef riscv::getRISCVArch(const llvm::opt::ArgList &Args, 232 const llvm::Triple &Triple) { 233 assert(Triple.isRISCV() && "Unexpected triple"); 234 235 // GCC's logic around choosing a default `-march=` is complex. If GCC is not 236 // configured using `--with-arch=`, then the logic for the default choice is 237 // defined in config.gcc. This function is based on the logic in GCC 9.2.0. We 238 // deviate from GCC's default on additional `-mcpu` option (GCC does not 239 // support `-mcpu`) and baremetal targets (UnknownOS) where neither `-march` 240 // nor `-mabi` is specified. 241 // 242 // The logic used in GCC 9.2.0 is the following, in order: 243 // 1. Explicit choices using `--with-arch=` 244 // 2. A default based on `--with-abi=`, if provided 245 // 3. A default based on the target triple's arch 246 // 247 // The logic in config.gcc is a little circular but it is not inconsistent. 248 // 249 // Clang does not have `--with-arch=` or `--with-abi=`, so we use `-march=` 250 // and `-mabi=` respectively instead. 251 // 252 // Clang uses the following logic, in order: 253 // 1. Explicit choices using `-march=` 254 // 2. Based on `-mcpu` if the target CPU has a default ISA string 255 // 3. A default based on `-mabi`, if provided 256 // 4. A default based on the target triple's arch 257 // 258 // Clang does not yet support MULTILIB_REUSE, so we use `rv{XLEN}imafdc` 259 // instead of `rv{XLEN}gc` though they are (currently) equivalent. 260 261 // 1. If `-march=` is specified, use it. 262 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) 263 return A->getValue(); 264 265 // 2. Get march (isa string) based on `-mcpu=` 266 if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) { 267 StringRef CPU = A->getValue(); 268 if (CPU == "native") 269 CPU = llvm::sys::getHostCPUName(); 270 StringRef MArch = llvm::RISCV::getMArchFromMcpu(CPU); 271 // Bypass if target cpu's default march is empty. 272 if (MArch != "") 273 return MArch; 274 } 275 276 // 3. Choose a default based on `-mabi=` 277 // 278 // ilp32e -> rv32e 279 // ilp32 | ilp32f | ilp32d -> rv32imafdc 280 // lp64 | lp64f | lp64d -> rv64imafdc 281 if (const Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) { 282 StringRef MABI = A->getValue(); 283 284 if (MABI.equals_insensitive("ilp32e")) 285 return "rv32e"; 286 else if (MABI.startswith_insensitive("ilp32")) 287 return "rv32imafdc"; 288 else if (MABI.startswith_insensitive("lp64")) 289 return "rv64imafdc"; 290 } 291 292 // 4. Choose a default based on the triple 293 // 294 // We deviate from GCC's defaults here: 295 // - On `riscv{XLEN}-unknown-elf` we default to `rv{XLEN}imac` 296 // - On all other OSs we use `rv{XLEN}imafdc` (equivalent to `rv{XLEN}gc`) 297 if (Triple.isRISCV32()) { 298 if (Triple.getOS() == llvm::Triple::UnknownOS) 299 return "rv32imac"; 300 else 301 return "rv32imafdc"; 302 } else { 303 if (Triple.getOS() == llvm::Triple::UnknownOS) 304 return "rv64imac"; 305 else 306 return "rv64imafdc"; 307 } 308 } 309 310 std::string riscv::getRISCVTargetCPU(const llvm::opt::ArgList &Args, 311 const llvm::Triple &Triple) { 312 std::string CPU; 313 // If we have -mcpu, use that. 314 if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) 315 CPU = A->getValue(); 316 317 // Handle CPU name is 'native'. 318 if (CPU == "native") 319 CPU = llvm::sys::getHostCPUName(); 320 321 if (!CPU.empty()) 322 return CPU; 323 324 return Triple.isRISCV64() ? "generic-rv64" : "generic-rv32"; 325 } 326