1 //===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "ARM.h" 10 #include "clang/Driver/Driver.h" 11 #include "clang/Driver/DriverDiagnostic.h" 12 #include "clang/Driver/Options.h" 13 #include "llvm/ADT/StringSwitch.h" 14 #include "llvm/Option/ArgList.h" 15 #include "llvm/TargetParser/ARMTargetParser.h" 16 #include "llvm/TargetParser/Host.h" 17 18 using namespace clang::driver; 19 using namespace clang::driver::tools; 20 using namespace clang; 21 using namespace llvm::opt; 22 23 // Get SubArch (vN). 24 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) { 25 llvm::StringRef Arch = Triple.getArchName(); 26 return llvm::ARM::parseArchVersion(Arch); 27 } 28 29 // True if M-profile. 30 bool arm::isARMMProfile(const llvm::Triple &Triple) { 31 llvm::StringRef Arch = Triple.getArchName(); 32 return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M; 33 } 34 35 // On Arm the endianness of the output file is determined by the target and 36 // can be overridden by the pseudo-target flags '-mlittle-endian'/'-EL' and 37 // '-mbig-endian'/'-EB'. Unlike other targets the flag does not result in a 38 // normalized triple so we must handle the flag here. 39 bool arm::isARMBigEndian(const llvm::Triple &Triple, const ArgList &Args) { 40 if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian, 41 options::OPT_mbig_endian)) { 42 return !A->getOption().matches(options::OPT_mlittle_endian); 43 } 44 45 return Triple.getArch() == llvm::Triple::armeb || 46 Triple.getArch() == llvm::Triple::thumbeb; 47 } 48 49 // True if A-profile. 50 bool arm::isARMAProfile(const llvm::Triple &Triple) { 51 llvm::StringRef Arch = Triple.getArchName(); 52 return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::A; 53 } 54 55 // Get Arch/CPU from args. 56 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch, 57 llvm::StringRef &CPU, bool FromAs) { 58 if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ)) 59 CPU = A->getValue(); 60 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) 61 Arch = A->getValue(); 62 if (!FromAs) 63 return; 64 65 for (const Arg *A : 66 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) { 67 // Use getValues because -Wa can have multiple arguments 68 // e.g. -Wa,-mcpu=foo,-mcpu=bar 69 for (StringRef Value : A->getValues()) { 70 if (Value.startswith("-mcpu=")) 71 CPU = Value.substr(6); 72 if (Value.startswith("-march=")) 73 Arch = Value.substr(7); 74 } 75 } 76 } 77 78 // Handle -mhwdiv=. 79 // FIXME: Use ARMTargetParser. 80 static void getARMHWDivFeatures(const Driver &D, const Arg *A, 81 const ArgList &Args, StringRef HWDiv, 82 std::vector<StringRef> &Features) { 83 uint64_t HWDivID = llvm::ARM::parseHWDiv(HWDiv); 84 if (!llvm::ARM::getHWDivFeatures(HWDivID, Features)) 85 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args); 86 } 87 88 // Handle -mfpu=. 89 static llvm::ARM::FPUKind getARMFPUFeatures(const Driver &D, const Arg *A, 90 const ArgList &Args, StringRef FPU, 91 std::vector<StringRef> &Features) { 92 llvm::ARM::FPUKind FPUKind = llvm::ARM::parseFPU(FPU); 93 if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) 94 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args); 95 return FPUKind; 96 } 97 98 // Decode ARM features from string like +[no]featureA+[no]featureB+... 99 static bool DecodeARMFeatures(const Driver &D, StringRef text, StringRef CPU, 100 llvm::ARM::ArchKind ArchKind, 101 std::vector<StringRef> &Features, 102 llvm::ARM::FPUKind &ArgFPUKind) { 103 SmallVector<StringRef, 8> Split; 104 text.split(Split, StringRef("+"), -1, false); 105 106 for (StringRef Feature : Split) { 107 if (!appendArchExtFeatures(CPU, ArchKind, Feature, Features, ArgFPUKind)) 108 return false; 109 } 110 return true; 111 } 112 113 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU, 114 std::vector<StringRef> &Features) { 115 CPU = CPU.split("+").first; 116 if (CPU != "generic") { 117 llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU); 118 uint64_t Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind); 119 llvm::ARM::getExtensionFeatures(Extension, Features); 120 } 121 } 122 123 // Check if -march is valid by checking if it can be canonicalised and parsed. 124 // getARMArch is used here instead of just checking the -march value in order 125 // to handle -march=native correctly. 126 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args, 127 llvm::StringRef ArchName, llvm::StringRef CPUName, 128 std::vector<StringRef> &Features, 129 const llvm::Triple &Triple, 130 llvm::ARM::FPUKind &ArgFPUKind) { 131 std::pair<StringRef, StringRef> Split = ArchName.split("+"); 132 133 std::string MArch = arm::getARMArch(ArchName, Triple); 134 llvm::ARM::ArchKind ArchKind = llvm::ARM::parseArch(MArch); 135 if (ArchKind == llvm::ARM::ArchKind::INVALID || 136 (Split.second.size() && 137 !DecodeARMFeatures(D, Split.second, CPUName, ArchKind, Features, 138 ArgFPUKind))) 139 D.Diag(clang::diag::err_drv_unsupported_option_argument) 140 << A->getSpelling() << A->getValue(); 141 } 142 143 // Check -mcpu=. Needs ArchName to handle -mcpu=generic. 144 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args, 145 llvm::StringRef CPUName, llvm::StringRef ArchName, 146 std::vector<StringRef> &Features, 147 const llvm::Triple &Triple, 148 llvm::ARM::FPUKind &ArgFPUKind) { 149 std::pair<StringRef, StringRef> Split = CPUName.split("+"); 150 151 std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple); 152 llvm::ARM::ArchKind ArchKind = 153 arm::getLLVMArchKindForARM(CPU, ArchName, Triple); 154 if (ArchKind == llvm::ARM::ArchKind::INVALID || 155 (Split.second.size() && !DecodeARMFeatures(D, Split.second, CPU, ArchKind, 156 Features, ArgFPUKind))) 157 D.Diag(clang::diag::err_drv_unsupported_option_argument) 158 << A->getSpelling() << A->getValue(); 159 } 160 161 // If -mfloat-abi=hard or -mhard-float are specified explicitly then check that 162 // floating point registers are available on the target CPU. 163 static void checkARMFloatABI(const Driver &D, const ArgList &Args, 164 bool HasFPRegs) { 165 if (HasFPRegs) 166 return; 167 const Arg *A = 168 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float, 169 options::OPT_mfloat_abi_EQ); 170 if (A && (A->getOption().matches(options::OPT_mhard_float) || 171 (A->getOption().matches(options::OPT_mfloat_abi_EQ) && 172 A->getValue() == StringRef("hard")))) 173 D.Diag(clang::diag::warn_drv_no_floating_point_registers) 174 << A->getAsString(Args); 175 } 176 177 bool arm::useAAPCSForMachO(const llvm::Triple &T) { 178 // The backend is hardwired to assume AAPCS for M-class processors, ensure 179 // the frontend matches that. 180 return T.getEnvironment() == llvm::Triple::EABI || 181 T.getEnvironment() == llvm::Triple::EABIHF || 182 T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T); 183 } 184 185 // We follow GCC and support when the backend has support for the MRC/MCR 186 // instructions that are used to set the hard thread pointer ("CP15 C13 187 // Thread id"). 188 bool arm::isHardTPSupported(const llvm::Triple &Triple) { 189 int Ver = getARMSubArchVersionNumber(Triple); 190 llvm::ARM::ArchKind AK = llvm::ARM::parseArch(Triple.getArchName()); 191 return Triple.isARM() || AK == llvm::ARM::ArchKind::ARMV6T2 || 192 (Ver >= 7 && AK != llvm::ARM::ArchKind::ARMV8MBaseline); 193 } 194 195 // Select mode for reading thread pointer (-mtp=soft/cp15). 196 arm::ReadTPMode arm::getReadTPMode(const Driver &D, const ArgList &Args, 197 const llvm::Triple &Triple, bool ForAS) { 198 if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) { 199 arm::ReadTPMode ThreadPointer = 200 llvm::StringSwitch<arm::ReadTPMode>(A->getValue()) 201 .Case("cp15", ReadTPMode::TPIDRURO) 202 .Case("tpidrurw", ReadTPMode::TPIDRURW) 203 .Case("tpidruro", ReadTPMode::TPIDRURO) 204 .Case("tpidrprw", ReadTPMode::TPIDRPRW) 205 .Case("soft", ReadTPMode::Soft) 206 .Default(ReadTPMode::Invalid); 207 if ((ThreadPointer == ReadTPMode::TPIDRURW || 208 ThreadPointer == ReadTPMode::TPIDRURO || 209 ThreadPointer == ReadTPMode::TPIDRPRW) && 210 !isHardTPSupported(Triple) && !ForAS) { 211 D.Diag(diag::err_target_unsupported_tp_hard) << Triple.getArchName(); 212 return ReadTPMode::Invalid; 213 } 214 if (ThreadPointer != ReadTPMode::Invalid) 215 return ThreadPointer; 216 if (StringRef(A->getValue()).empty()) 217 D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args); 218 else 219 D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args); 220 return ReadTPMode::Invalid; 221 } 222 return ReadTPMode::Soft; 223 } 224 225 void arm::setArchNameInTriple(const Driver &D, const ArgList &Args, 226 types::ID InputType, llvm::Triple &Triple) { 227 StringRef MCPU, MArch; 228 if (const Arg *A = Args.getLastArg(options::OPT_mcpu_EQ)) 229 MCPU = A->getValue(); 230 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ)) 231 MArch = A->getValue(); 232 233 std::string CPU = Triple.isOSBinFormatMachO() 234 ? tools::arm::getARMCPUForMArch(MArch, Triple).str() 235 : tools::arm::getARMTargetCPU(MCPU, MArch, Triple); 236 StringRef Suffix = tools::arm::getLLVMArchSuffixForARM(CPU, MArch, Triple); 237 238 bool IsBigEndian = Triple.getArch() == llvm::Triple::armeb || 239 Triple.getArch() == llvm::Triple::thumbeb; 240 // Handle pseudo-target flags '-mlittle-endian'/'-EL' and 241 // '-mbig-endian'/'-EB'. 242 if (Arg *A = Args.getLastArg(options::OPT_mlittle_endian, 243 options::OPT_mbig_endian)) { 244 IsBigEndian = !A->getOption().matches(options::OPT_mlittle_endian); 245 } 246 std::string ArchName = IsBigEndian ? "armeb" : "arm"; 247 248 // FIXME: Thumb should just be another -target-feaure, not in the triple. 249 bool IsMProfile = 250 llvm::ARM::parseArchProfile(Suffix) == llvm::ARM::ProfileKind::M; 251 bool ThumbDefault = IsMProfile || 252 // Thumb2 is the default for V7 on Darwin. 253 (llvm::ARM::parseArchVersion(Suffix) == 7 && 254 Triple.isOSBinFormatMachO()) || 255 // FIXME: this is invalid for WindowsCE 256 Triple.isOSWindows(); 257 258 // Check if ARM ISA was explicitly selected (using -mno-thumb or -marm) for 259 // M-Class CPUs/architecture variants, which is not supported. 260 bool ARMModeRequested = 261 !Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault); 262 if (IsMProfile && ARMModeRequested) { 263 if (MCPU.size()) 264 D.Diag(diag::err_cpu_unsupported_isa) << CPU << "ARM"; 265 else 266 D.Diag(diag::err_arch_unsupported_isa) 267 << tools::arm::getARMArch(MArch, Triple) << "ARM"; 268 } 269 270 // Check to see if an explicit choice to use thumb has been made via 271 // -mthumb. For assembler files we must check for -mthumb in the options 272 // passed to the assembler via -Wa or -Xassembler. 273 bool IsThumb = false; 274 if (InputType != types::TY_PP_Asm) 275 IsThumb = 276 Args.hasFlag(options::OPT_mthumb, options::OPT_mno_thumb, ThumbDefault); 277 else { 278 // Ideally we would check for these flags in 279 // CollectArgsForIntegratedAssembler but we can't change the ArchName at 280 // that point. 281 llvm::StringRef WaMArch, WaMCPU; 282 for (const auto *A : 283 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) { 284 for (StringRef Value : A->getValues()) { 285 // There is no assembler equivalent of -mno-thumb, -marm, or -mno-arm. 286 if (Value == "-mthumb") 287 IsThumb = true; 288 else if (Value.startswith("-march=")) 289 WaMArch = Value.substr(7); 290 else if (Value.startswith("-mcpu=")) 291 WaMCPU = Value.substr(6); 292 } 293 } 294 295 if (WaMCPU.size() || WaMArch.size()) { 296 // The way this works means that we prefer -Wa,-mcpu's architecture 297 // over -Wa,-march. Which matches the compiler behaviour. 298 Suffix = tools::arm::getLLVMArchSuffixForARM(WaMCPU, WaMArch, Triple); 299 } 300 } 301 302 // Assembly files should start in ARM mode, unless arch is M-profile, or 303 // -mthumb has been passed explicitly to the assembler. Windows is always 304 // thumb. 305 if (IsThumb || IsMProfile || Triple.isOSWindows()) { 306 if (IsBigEndian) 307 ArchName = "thumbeb"; 308 else 309 ArchName = "thumb"; 310 } 311 Triple.setArchName(ArchName + Suffix.str()); 312 } 313 314 void arm::setFloatABIInTriple(const Driver &D, const ArgList &Args, 315 llvm::Triple &Triple) { 316 if (Triple.isOSLiteOS()) { 317 Triple.setEnvironment(llvm::Triple::OpenHOS); 318 return; 319 } 320 321 bool isHardFloat = 322 (arm::getARMFloatABI(D, Triple, Args) == arm::FloatABI::Hard); 323 324 switch (Triple.getEnvironment()) { 325 case llvm::Triple::GNUEABI: 326 case llvm::Triple::GNUEABIHF: 327 Triple.setEnvironment(isHardFloat ? llvm::Triple::GNUEABIHF 328 : llvm::Triple::GNUEABI); 329 break; 330 case llvm::Triple::EABI: 331 case llvm::Triple::EABIHF: 332 Triple.setEnvironment(isHardFloat ? llvm::Triple::EABIHF 333 : llvm::Triple::EABI); 334 break; 335 case llvm::Triple::MuslEABI: 336 case llvm::Triple::MuslEABIHF: 337 Triple.setEnvironment(isHardFloat ? llvm::Triple::MuslEABIHF 338 : llvm::Triple::MuslEABI); 339 break; 340 case llvm::Triple::OpenHOS: 341 break; 342 default: { 343 arm::FloatABI DefaultABI = arm::getDefaultFloatABI(Triple); 344 if (DefaultABI != arm::FloatABI::Invalid && 345 isHardFloat != (DefaultABI == arm::FloatABI::Hard)) { 346 Arg *ABIArg = 347 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float, 348 options::OPT_mfloat_abi_EQ); 349 assert(ABIArg && "Non-default float abi expected to be from arg"); 350 D.Diag(diag::err_drv_unsupported_opt_for_target) 351 << ABIArg->getAsString(Args) << Triple.getTriple(); 352 } 353 break; 354 } 355 } 356 } 357 358 arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) { 359 return arm::getARMFloatABI(TC.getDriver(), TC.getEffectiveTriple(), Args); 360 } 361 362 arm::FloatABI arm::getDefaultFloatABI(const llvm::Triple &Triple) { 363 auto SubArch = getARMSubArchVersionNumber(Triple); 364 switch (Triple.getOS()) { 365 case llvm::Triple::Darwin: 366 case llvm::Triple::MacOSX: 367 case llvm::Triple::IOS: 368 case llvm::Triple::TvOS: 369 case llvm::Triple::DriverKit: 370 // Darwin defaults to "softfp" for v6 and v7. 371 if (Triple.isWatchABI()) 372 return FloatABI::Hard; 373 else 374 return (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft; 375 376 case llvm::Triple::WatchOS: 377 return FloatABI::Hard; 378 379 // FIXME: this is invalid for WindowsCE 380 case llvm::Triple::Win32: 381 // It is incorrect to select hard float ABI on MachO platforms if the ABI is 382 // "apcs-gnu". 383 if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple)) 384 return FloatABI::Soft; 385 return FloatABI::Hard; 386 387 case llvm::Triple::NetBSD: 388 switch (Triple.getEnvironment()) { 389 case llvm::Triple::EABIHF: 390 case llvm::Triple::GNUEABIHF: 391 return FloatABI::Hard; 392 default: 393 return FloatABI::Soft; 394 } 395 break; 396 397 case llvm::Triple::FreeBSD: 398 switch (Triple.getEnvironment()) { 399 case llvm::Triple::GNUEABIHF: 400 return FloatABI::Hard; 401 default: 402 // FreeBSD defaults to soft float 403 return FloatABI::Soft; 404 } 405 break; 406 407 case llvm::Triple::OpenBSD: 408 return FloatABI::SoftFP; 409 410 default: 411 if (Triple.isOHOSFamily()) 412 return FloatABI::Soft; 413 switch (Triple.getEnvironment()) { 414 case llvm::Triple::GNUEABIHF: 415 case llvm::Triple::MuslEABIHF: 416 case llvm::Triple::EABIHF: 417 return FloatABI::Hard; 418 case llvm::Triple::GNUEABI: 419 case llvm::Triple::MuslEABI: 420 case llvm::Triple::EABI: 421 // EABI is always AAPCS, and if it was not marked 'hard', it's softfp 422 return FloatABI::SoftFP; 423 case llvm::Triple::Android: 424 return (SubArch >= 7) ? FloatABI::SoftFP : FloatABI::Soft; 425 default: 426 return FloatABI::Invalid; 427 } 428 } 429 return FloatABI::Invalid; 430 } 431 432 // Select the float ABI as determined by -msoft-float, -mhard-float, and 433 // -mfloat-abi=. 434 arm::FloatABI arm::getARMFloatABI(const Driver &D, const llvm::Triple &Triple, 435 const ArgList &Args) { 436 arm::FloatABI ABI = FloatABI::Invalid; 437 if (Arg *A = 438 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float, 439 options::OPT_mfloat_abi_EQ)) { 440 if (A->getOption().matches(options::OPT_msoft_float)) { 441 ABI = FloatABI::Soft; 442 } else if (A->getOption().matches(options::OPT_mhard_float)) { 443 ABI = FloatABI::Hard; 444 } else { 445 ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue()) 446 .Case("soft", FloatABI::Soft) 447 .Case("softfp", FloatABI::SoftFP) 448 .Case("hard", FloatABI::Hard) 449 .Default(FloatABI::Invalid); 450 if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) { 451 D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args); 452 ABI = FloatABI::Soft; 453 } 454 } 455 } 456 457 // If unspecified, choose the default based on the platform. 458 if (ABI == FloatABI::Invalid) 459 ABI = arm::getDefaultFloatABI(Triple); 460 461 if (ABI == FloatABI::Invalid) { 462 // Assume "soft", but warn the user we are guessing. 463 if (Triple.isOSBinFormatMachO() && 464 Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em) 465 ABI = FloatABI::Hard; 466 else 467 ABI = FloatABI::Soft; 468 469 if (Triple.getOS() != llvm::Triple::UnknownOS || 470 !Triple.isOSBinFormatMachO()) 471 D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft"; 472 } 473 474 assert(ABI != FloatABI::Invalid && "must select an ABI"); 475 return ABI; 476 } 477 478 static bool hasIntegerMVE(const std::vector<StringRef> &F) { 479 auto MVE = llvm::find(llvm::reverse(F), "+mve"); 480 auto NoMVE = llvm::find(llvm::reverse(F), "-mve"); 481 return MVE != F.rend() && 482 (NoMVE == F.rend() || std::distance(MVE, NoMVE) > 0); 483 } 484 485 llvm::ARM::FPUKind arm::getARMTargetFeatures(const Driver &D, 486 const llvm::Triple &Triple, 487 const ArgList &Args, 488 std::vector<StringRef> &Features, 489 bool ForAS, bool ForMultilib) { 490 bool KernelOrKext = 491 Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext); 492 arm::FloatABI ABI = arm::getARMFloatABI(D, Triple, Args); 493 std::optional<std::pair<const Arg *, StringRef>> WaCPU, WaFPU, WaHDiv, WaArch; 494 495 // This vector will accumulate features from the architecture 496 // extension suffixes on -mcpu and -march (e.g. the 'bar' in 497 // -mcpu=foo+bar). We want to apply those after the features derived 498 // from the FPU, in case -mfpu generates a negative feature which 499 // the +bar is supposed to override. 500 std::vector<StringRef> ExtensionFeatures; 501 502 if (!ForAS) { 503 // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these 504 // yet (it uses the -mfloat-abi and -msoft-float options), and it is 505 // stripped out by the ARM target. We should probably pass this a new 506 // -target-option, which is handled by the -cc1/-cc1as invocation. 507 // 508 // FIXME2: For consistency, it would be ideal if we set up the target 509 // machine state the same when using the frontend or the assembler. We don't 510 // currently do that for the assembler, we pass the options directly to the 511 // backend and never even instantiate the frontend TargetInfo. If we did, 512 // and used its handleTargetFeatures hook, then we could ensure the 513 // assembler and the frontend behave the same. 514 515 // Use software floating point operations? 516 if (ABI == arm::FloatABI::Soft) 517 Features.push_back("+soft-float"); 518 519 // Use software floating point argument passing? 520 if (ABI != arm::FloatABI::Hard) 521 Features.push_back("+soft-float-abi"); 522 } else { 523 // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down 524 // to the assembler correctly. 525 for (const Arg *A : 526 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) { 527 // We use getValues here because you can have many options per -Wa 528 // We will keep the last one we find for each of these 529 for (StringRef Value : A->getValues()) { 530 if (Value.startswith("-mfpu=")) { 531 WaFPU = std::make_pair(A, Value.substr(6)); 532 } else if (Value.startswith("-mcpu=")) { 533 WaCPU = std::make_pair(A, Value.substr(6)); 534 } else if (Value.startswith("-mhwdiv=")) { 535 WaHDiv = std::make_pair(A, Value.substr(8)); 536 } else if (Value.startswith("-march=")) { 537 WaArch = std::make_pair(A, Value.substr(7)); 538 } 539 } 540 } 541 542 // The integrated assembler doesn't implement e_flags setting behavior for 543 // -meabi=gnu (gcc -mabi={apcs-gnu,atpcs} passes -meabi=gnu to gas). For 544 // compatibility we accept but warn. 545 if (Arg *A = Args.getLastArgNoClaim(options::OPT_mabi_EQ)) 546 A->ignoreTargetSpecific(); 547 } 548 549 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRURW) 550 Features.push_back("+read-tp-tpidrurw"); 551 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRURO) 552 Features.push_back("+read-tp-tpidruro"); 553 if (getReadTPMode(D, Args, Triple, ForAS) == ReadTPMode::TPIDRPRW) 554 Features.push_back("+read-tp-tpidrprw"); 555 556 const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ); 557 const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ); 558 StringRef ArchName; 559 StringRef CPUName; 560 llvm::ARM::FPUKind ArchArgFPUKind = llvm::ARM::FK_INVALID; 561 llvm::ARM::FPUKind CPUArgFPUKind = llvm::ARM::FK_INVALID; 562 563 // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=. 564 if (WaCPU) { 565 if (CPUArg) 566 D.Diag(clang::diag::warn_drv_unused_argument) 567 << CPUArg->getAsString(Args); 568 CPUName = WaCPU->second; 569 CPUArg = WaCPU->first; 570 } else if (CPUArg) 571 CPUName = CPUArg->getValue(); 572 573 // Check -march. ClangAs gives preference to -Wa,-march=. 574 if (WaArch) { 575 if (ArchArg) 576 D.Diag(clang::diag::warn_drv_unused_argument) 577 << ArchArg->getAsString(Args); 578 ArchName = WaArch->second; 579 // This will set any features after the base architecture. 580 checkARMArchName(D, WaArch->first, Args, ArchName, CPUName, 581 ExtensionFeatures, Triple, ArchArgFPUKind); 582 // The base architecture was handled in ToolChain::ComputeLLVMTriple because 583 // triple is read only by this point. 584 } else if (ArchArg) { 585 ArchName = ArchArg->getValue(); 586 checkARMArchName(D, ArchArg, Args, ArchName, CPUName, ExtensionFeatures, 587 Triple, ArchArgFPUKind); 588 } 589 590 // Add CPU features for generic CPUs 591 if (CPUName == "native") { 592 llvm::StringMap<bool> HostFeatures; 593 if (llvm::sys::getHostCPUFeatures(HostFeatures)) 594 for (auto &F : HostFeatures) 595 Features.push_back( 596 Args.MakeArgString((F.second ? "+" : "-") + F.first())); 597 } else if (!CPUName.empty()) { 598 // This sets the default features for the specified CPU. We certainly don't 599 // want to override the features that have been explicitly specified on the 600 // command line. Therefore, process them directly instead of appending them 601 // at the end later. 602 DecodeARMFeaturesFromCPU(D, CPUName, Features); 603 } 604 605 if (CPUArg) 606 checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, ExtensionFeatures, 607 Triple, CPUArgFPUKind); 608 609 // TODO Handle -mtune=. Suppress -Wunused-command-line-argument as a 610 // longstanding behavior. 611 (void)Args.getLastArg(options::OPT_mtune_EQ); 612 613 // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=. 614 llvm::ARM::FPUKind FPUKind = llvm::ARM::FK_INVALID; 615 const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ); 616 if (WaFPU) { 617 if (FPUArg) 618 D.Diag(clang::diag::warn_drv_unused_argument) 619 << FPUArg->getAsString(Args); 620 (void)getARMFPUFeatures(D, WaFPU->first, Args, WaFPU->second, Features); 621 } else if (FPUArg) { 622 FPUKind = getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features); 623 } else if (Triple.isAndroid() && getARMSubArchVersionNumber(Triple) >= 7) { 624 const char *AndroidFPU = "neon"; 625 FPUKind = llvm::ARM::parseFPU(AndroidFPU); 626 if (!llvm::ARM::getFPUFeatures(FPUKind, Features)) 627 D.Diag(clang::diag::err_drv_clang_unsupported) 628 << std::string("-mfpu=") + AndroidFPU; 629 } else { 630 if (!ForAS) { 631 std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple); 632 llvm::ARM::ArchKind ArchKind = 633 arm::getLLVMArchKindForARM(CPU, ArchName, Triple); 634 FPUKind = llvm::ARM::getDefaultFPU(CPU, ArchKind); 635 (void)llvm::ARM::getFPUFeatures(FPUKind, Features); 636 } 637 } 638 639 // Now we've finished accumulating features from arch, cpu and fpu, 640 // we can append the ones for architecture extensions that we 641 // collected separately. 642 Features.insert(std::end(Features), 643 std::begin(ExtensionFeatures), std::end(ExtensionFeatures)); 644 645 // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=. 646 const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ); 647 if (WaHDiv) { 648 if (HDivArg) 649 D.Diag(clang::diag::warn_drv_unused_argument) 650 << HDivArg->getAsString(Args); 651 getARMHWDivFeatures(D, WaHDiv->first, Args, WaHDiv->second, Features); 652 } else if (HDivArg) 653 getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features); 654 655 // Handle (arch-dependent) fp16fml/fullfp16 relationship. 656 // Must happen before any features are disabled due to soft-float. 657 // FIXME: this fp16fml option handling will be reimplemented after the 658 // TargetParser rewrite. 659 const auto ItRNoFullFP16 = std::find(Features.rbegin(), Features.rend(), "-fullfp16"); 660 const auto ItRFP16FML = std::find(Features.rbegin(), Features.rend(), "+fp16fml"); 661 if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8_4a) { 662 const auto ItRFullFP16 = std::find(Features.rbegin(), Features.rend(), "+fullfp16"); 663 if (ItRFullFP16 < ItRNoFullFP16 && ItRFullFP16 < ItRFP16FML) { 664 // Only entangled feature that can be to the right of this +fullfp16 is -fp16fml. 665 // Only append the +fp16fml if there is no -fp16fml after the +fullfp16. 666 if (std::find(Features.rbegin(), ItRFullFP16, "-fp16fml") == ItRFullFP16) 667 Features.push_back("+fp16fml"); 668 } 669 else 670 goto fp16_fml_fallthrough; 671 } 672 else { 673 fp16_fml_fallthrough: 674 // In both of these cases, putting the 'other' feature on the end of the vector will 675 // result in the same effect as placing it immediately after the current feature. 676 if (ItRNoFullFP16 < ItRFP16FML) 677 Features.push_back("-fp16fml"); 678 else if (ItRNoFullFP16 > ItRFP16FML) 679 Features.push_back("+fullfp16"); 680 } 681 682 // Setting -msoft-float/-mfloat-abi=soft, -mfpu=none, or adding +nofp to 683 // -march/-mcpu effectively disables the FPU (GCC ignores the -mfpu options in 684 // this case). Note that the ABI can also be set implicitly by the target 685 // selected. 686 bool HasFPRegs = true; 687 if (ABI == arm::FloatABI::Soft) { 688 llvm::ARM::getFPUFeatures(llvm::ARM::FK_NONE, Features); 689 690 // Disable all features relating to hardware FP, not already disabled by the 691 // above call. 692 Features.insert(Features.end(), 693 {"-dotprod", "-fp16fml", "-bf16", "-mve", "-mve.fp"}); 694 HasFPRegs = false; 695 FPUKind = llvm::ARM::FK_NONE; 696 } else if (FPUKind == llvm::ARM::FK_NONE || 697 ArchArgFPUKind == llvm::ARM::FK_NONE || 698 CPUArgFPUKind == llvm::ARM::FK_NONE) { 699 // -mfpu=none, -march=armvX+nofp or -mcpu=X+nofp is *very* similar to 700 // -mfloat-abi=soft, only that it should not disable MVE-I. They disable the 701 // FPU, but not the FPU registers, thus MVE-I, which depends only on the 702 // latter, is still supported. 703 Features.insert(Features.end(), 704 {"-dotprod", "-fp16fml", "-bf16", "-mve.fp"}); 705 HasFPRegs = hasIntegerMVE(Features); 706 FPUKind = llvm::ARM::FK_NONE; 707 } 708 if (!HasFPRegs) 709 Features.emplace_back("-fpregs"); 710 711 // En/disable crc code generation. 712 if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) { 713 if (A->getOption().matches(options::OPT_mcrc)) 714 Features.push_back("+crc"); 715 else 716 Features.push_back("-crc"); 717 } 718 719 // For Arch >= ARMv8.0 && A or R profile: crypto = sha2 + aes 720 // Rather than replace within the feature vector, determine whether each 721 // algorithm is enabled and append this to the end of the vector. 722 // The algorithms can be controlled by their specific feature or the crypto 723 // feature, so their status can be determined by the last occurance of 724 // either in the vector. This allows one to supercede the other. 725 // e.g. +crypto+noaes in -march/-mcpu should enable sha2, but not aes 726 // FIXME: this needs reimplementation after the TargetParser rewrite 727 bool HasSHA2 = false; 728 bool HasAES = false; 729 const auto ItCrypto = 730 llvm::find_if(llvm::reverse(Features), [](const StringRef F) { 731 return F.contains("crypto"); 732 }); 733 const auto ItSHA2 = 734 llvm::find_if(llvm::reverse(Features), [](const StringRef F) { 735 return F.contains("crypto") || F.contains("sha2"); 736 }); 737 const auto ItAES = 738 llvm::find_if(llvm::reverse(Features), [](const StringRef F) { 739 return F.contains("crypto") || F.contains("aes"); 740 }); 741 const bool FoundSHA2 = ItSHA2 != Features.rend(); 742 const bool FoundAES = ItAES != Features.rend(); 743 if (FoundSHA2) 744 HasSHA2 = ItSHA2->take_front() == "+"; 745 if (FoundAES) 746 HasAES = ItAES->take_front() == "+"; 747 if (ItCrypto != Features.rend()) { 748 if (HasSHA2 && HasAES) 749 Features.push_back("+crypto"); 750 else 751 Features.push_back("-crypto"); 752 if (HasSHA2) 753 Features.push_back("+sha2"); 754 else 755 Features.push_back("-sha2"); 756 if (HasAES) 757 Features.push_back("+aes"); 758 else 759 Features.push_back("-aes"); 760 } 761 762 if (HasSHA2 || HasAES) { 763 StringRef ArchSuffix = arm::getLLVMArchSuffixForARM( 764 arm::getARMTargetCPU(CPUName, ArchName, Triple), ArchName, Triple); 765 llvm::ARM::ProfileKind ArchProfile = 766 llvm::ARM::parseArchProfile(ArchSuffix); 767 if (!((llvm::ARM::parseArchVersion(ArchSuffix) >= 8) && 768 (ArchProfile == llvm::ARM::ProfileKind::A || 769 ArchProfile == llvm::ARM::ProfileKind::R))) { 770 if (HasSHA2) 771 D.Diag(clang::diag::warn_target_unsupported_extension) 772 << "sha2" 773 << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix)); 774 if (HasAES) 775 D.Diag(clang::diag::warn_target_unsupported_extension) 776 << "aes" 777 << llvm::ARM::getArchName(llvm::ARM::parseArch(ArchSuffix)); 778 // With -fno-integrated-as -mfpu=crypto-neon-fp-armv8 some assemblers such 779 // as the GNU assembler will permit the use of crypto instructions as the 780 // fpu will override the architecture. We keep the crypto feature in this 781 // case to preserve compatibility. In all other cases we remove the crypto 782 // feature. 783 if (!Args.hasArg(options::OPT_fno_integrated_as)) { 784 Features.push_back("-sha2"); 785 Features.push_back("-aes"); 786 } 787 } 788 } 789 790 // Propagate frame-chain model selection 791 if (Arg *A = Args.getLastArg(options::OPT_mframe_chain)) { 792 StringRef FrameChainOption = A->getValue(); 793 if (FrameChainOption.startswith("aapcs")) 794 Features.push_back("+aapcs-frame-chain"); 795 if (FrameChainOption == "aapcs+leaf") 796 Features.push_back("+aapcs-frame-chain-leaf"); 797 } 798 799 // CMSE: Check for target 8M (for -mcmse to be applicable) is performed later. 800 if (Args.getLastArg(options::OPT_mcmse)) 801 Features.push_back("+8msecext"); 802 803 if (Arg *A = Args.getLastArg(options::OPT_mfix_cmse_cve_2021_35465, 804 options::OPT_mno_fix_cmse_cve_2021_35465)) { 805 if (!Args.getLastArg(options::OPT_mcmse)) 806 D.Diag(diag::err_opt_not_valid_without_opt) 807 << A->getOption().getName() << "-mcmse"; 808 809 if (A->getOption().matches(options::OPT_mfix_cmse_cve_2021_35465)) 810 Features.push_back("+fix-cmse-cve-2021-35465"); 811 else 812 Features.push_back("-fix-cmse-cve-2021-35465"); 813 } 814 815 // This also handles the -m(no-)fix-cortex-a72-1655431 arguments via aliases. 816 if (Arg *A = Args.getLastArg(options::OPT_mfix_cortex_a57_aes_1742098, 817 options::OPT_mno_fix_cortex_a57_aes_1742098)) { 818 if (A->getOption().matches(options::OPT_mfix_cortex_a57_aes_1742098)) { 819 Features.push_back("+fix-cortex-a57-aes-1742098"); 820 } else { 821 Features.push_back("-fix-cortex-a57-aes-1742098"); 822 } 823 } 824 825 // Look for the last occurrence of -mlong-calls or -mno-long-calls. If 826 // neither options are specified, see if we are compiling for kernel/kext and 827 // decide whether to pass "+long-calls" based on the OS and its version. 828 if (Arg *A = Args.getLastArg(options::OPT_mlong_calls, 829 options::OPT_mno_long_calls)) { 830 if (A->getOption().matches(options::OPT_mlong_calls)) 831 Features.push_back("+long-calls"); 832 } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) && 833 !Triple.isWatchOS()) { 834 Features.push_back("+long-calls"); 835 } 836 837 // Generate execute-only output (no data access to code sections). 838 // This only makes sense for the compiler, not for the assembler. 839 // It's not needed for multilib selection and may hide an unused 840 // argument diagnostic if the code is always run. 841 if (!ForAS && !ForMultilib) { 842 // Supported only on ARMv6T2 and ARMv7 and above. 843 // Cannot be combined with -mno-movt. 844 if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) { 845 if (A->getOption().matches(options::OPT_mexecute_only)) { 846 if (getARMSubArchVersionNumber(Triple) < 7 && 847 llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2) 848 D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName(); 849 else if (Arg *B = Args.getLastArg(options::OPT_mno_movt)) 850 D.Diag(diag::err_opt_not_valid_with_opt) 851 << A->getAsString(Args) << B->getAsString(Args); 852 Features.push_back("+execute-only"); 853 } 854 } 855 } 856 857 // Kernel code has more strict alignment requirements. 858 if (KernelOrKext) { 859 Features.push_back("+strict-align"); 860 } else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access, 861 options::OPT_munaligned_access)) { 862 if (A->getOption().matches(options::OPT_munaligned_access)) { 863 // No v6M core supports unaligned memory access (v6M ARM ARM A3.2). 864 if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m) 865 D.Diag(diag::err_target_unsupported_unaligned) << "v6m"; 866 // v8M Baseline follows on from v6M, so doesn't support unaligned memory 867 // access either. 868 else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline) 869 D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base"; 870 } else 871 Features.push_back("+strict-align"); 872 } else { 873 // Assume pre-ARMv6 doesn't support unaligned accesses. 874 // 875 // ARMv6 may or may not support unaligned accesses depending on the 876 // SCTLR.U bit, which is architecture-specific. We assume ARMv6 877 // Darwin and NetBSD targets support unaligned accesses, and others don't. 878 // 879 // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit 880 // which raises an alignment fault on unaligned accesses. Linux 881 // defaults this bit to 0 and handles it as a system-wide (not 882 // per-process) setting. It is therefore safe to assume that ARMv7+ 883 // Linux targets support unaligned accesses. The same goes for NaCl 884 // and Windows. 885 // 886 // The above behavior is consistent with GCC. 887 int VersionNum = getARMSubArchVersionNumber(Triple); 888 if (Triple.isOSDarwin() || Triple.isOSNetBSD()) { 889 if (VersionNum < 6 || 890 Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m) 891 Features.push_back("+strict-align"); 892 } else if (Triple.isOSLinux() || Triple.isOSNaCl() || 893 Triple.isOSWindows()) { 894 if (VersionNum < 7) 895 Features.push_back("+strict-align"); 896 } else 897 Features.push_back("+strict-align"); 898 } 899 900 // llvm does not support reserving registers in general. There is support 901 // for reserving r9 on ARM though (defined as a platform-specific register 902 // in ARM EABI). 903 if (Args.hasArg(options::OPT_ffixed_r9)) 904 Features.push_back("+reserve-r9"); 905 906 // The kext linker doesn't know how to deal with movw/movt. 907 if (KernelOrKext || Args.hasArg(options::OPT_mno_movt)) 908 Features.push_back("+no-movt"); 909 910 if (Args.hasArg(options::OPT_mno_neg_immediates)) 911 Features.push_back("+no-neg-immediates"); 912 913 // Enable/disable straight line speculation hardening. 914 if (Arg *A = Args.getLastArg(options::OPT_mharden_sls_EQ)) { 915 StringRef Scope = A->getValue(); 916 bool EnableRetBr = false; 917 bool EnableBlr = false; 918 bool DisableComdat = false; 919 if (Scope != "none") { 920 SmallVector<StringRef, 4> Opts; 921 Scope.split(Opts, ","); 922 for (auto Opt : Opts) { 923 Opt = Opt.trim(); 924 if (Opt == "all") { 925 EnableBlr = true; 926 EnableRetBr = true; 927 continue; 928 } 929 if (Opt == "retbr") { 930 EnableRetBr = true; 931 continue; 932 } 933 if (Opt == "blr") { 934 EnableBlr = true; 935 continue; 936 } 937 if (Opt == "comdat") { 938 DisableComdat = false; 939 continue; 940 } 941 if (Opt == "nocomdat") { 942 DisableComdat = true; 943 continue; 944 } 945 D.Diag(diag::err_drv_unsupported_option_argument) 946 << A->getSpelling() << Scope; 947 break; 948 } 949 } 950 951 if (EnableRetBr || EnableBlr) 952 if (!(isARMAProfile(Triple) && getARMSubArchVersionNumber(Triple) >= 7)) 953 D.Diag(diag::err_sls_hardening_arm_not_supported) 954 << Scope << A->getAsString(Args); 955 956 if (EnableRetBr) 957 Features.push_back("+harden-sls-retbr"); 958 if (EnableBlr) 959 Features.push_back("+harden-sls-blr"); 960 if (DisableComdat) { 961 Features.push_back("+harden-sls-nocomdat"); 962 } 963 } 964 965 if (Args.getLastArg(options::OPT_mno_bti_at_return_twice)) 966 Features.push_back("+no-bti-at-return-twice"); 967 968 checkARMFloatABI(D, Args, HasFPRegs); 969 970 return FPUKind; 971 } 972 973 std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) { 974 std::string MArch; 975 if (!Arch.empty()) 976 MArch = std::string(Arch); 977 else 978 MArch = std::string(Triple.getArchName()); 979 MArch = StringRef(MArch).split("+").first.lower(); 980 981 // Handle -march=native. 982 if (MArch == "native") { 983 std::string CPU = std::string(llvm::sys::getHostCPUName()); 984 if (CPU != "generic") { 985 // Translate the native cpu into the architecture suffix for that CPU. 986 StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple); 987 // If there is no valid architecture suffix for this CPU we don't know how 988 // to handle it, so return no architecture. 989 if (Suffix.empty()) 990 MArch = ""; 991 else 992 MArch = std::string("arm") + Suffix.str(); 993 } 994 } 995 996 return MArch; 997 } 998 999 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting. 1000 StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) { 1001 std::string MArch = getARMArch(Arch, Triple); 1002 // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch 1003 // here means an -march=native that we can't handle, so instead return no CPU. 1004 if (MArch.empty()) 1005 return StringRef(); 1006 1007 // We need to return an empty string here on invalid MArch values as the 1008 // various places that call this function can't cope with a null result. 1009 return llvm::ARM::getARMCPUForArch(Triple, MArch); 1010 } 1011 1012 /// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting. 1013 std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch, 1014 const llvm::Triple &Triple) { 1015 // FIXME: Warn on inconsistent use of -mcpu and -march. 1016 // If we have -mcpu=, use that. 1017 if (!CPU.empty()) { 1018 std::string MCPU = StringRef(CPU).split("+").first.lower(); 1019 // Handle -mcpu=native. 1020 if (MCPU == "native") 1021 return std::string(llvm::sys::getHostCPUName()); 1022 else 1023 return MCPU; 1024 } 1025 1026 return std::string(getARMCPUForMArch(Arch, Triple)); 1027 } 1028 1029 /// getLLVMArchSuffixForARM - Get the LLVM ArchKind value to use for a 1030 /// particular CPU (or Arch, if CPU is generic). This is needed to 1031 /// pass to functions like llvm::ARM::getDefaultFPU which need an 1032 /// ArchKind as well as a CPU name. 1033 llvm::ARM::ArchKind arm::getLLVMArchKindForARM(StringRef CPU, StringRef Arch, 1034 const llvm::Triple &Triple) { 1035 llvm::ARM::ArchKind ArchKind; 1036 if (CPU == "generic" || CPU.empty()) { 1037 std::string ARMArch = tools::arm::getARMArch(Arch, Triple); 1038 ArchKind = llvm::ARM::parseArch(ARMArch); 1039 if (ArchKind == llvm::ARM::ArchKind::INVALID) 1040 // In case of generic Arch, i.e. "arm", 1041 // extract arch from default cpu of the Triple 1042 ArchKind = 1043 llvm::ARM::parseCPUArch(llvm::ARM::getARMCPUForArch(Triple, ARMArch)); 1044 } else { 1045 // FIXME: horrible hack to get around the fact that Cortex-A7 is only an 1046 // armv7k triple if it's actually been specified via "-arch armv7k". 1047 ArchKind = (Arch == "armv7k" || Arch == "thumbv7k") 1048 ? llvm::ARM::ArchKind::ARMV7K 1049 : llvm::ARM::parseCPUArch(CPU); 1050 } 1051 return ArchKind; 1052 } 1053 1054 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular 1055 /// CPU (or Arch, if CPU is generic). 1056 // FIXME: This is redundant with -mcpu, why does LLVM use this. 1057 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch, 1058 const llvm::Triple &Triple) { 1059 llvm::ARM::ArchKind ArchKind = getLLVMArchKindForARM(CPU, Arch, Triple); 1060 if (ArchKind == llvm::ARM::ArchKind::INVALID) 1061 return ""; 1062 return llvm::ARM::getSubArch(ArchKind); 1063 } 1064 1065 void arm::appendBE8LinkFlag(const ArgList &Args, ArgStringList &CmdArgs, 1066 const llvm::Triple &Triple) { 1067 if (Args.hasArg(options::OPT_r)) 1068 return; 1069 1070 // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker 1071 // to generate BE-8 executables. 1072 if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple)) 1073 CmdArgs.push_back("--be8"); 1074 } 1075