1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares ARM TargetInfo objects. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 14 #define LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 15 16 #include "OSTargets.h" 17 #include "clang/Basic/TargetInfo.h" 18 #include "clang/Basic/TargetOptions.h" 19 #include "llvm/ADT/Triple.h" 20 #include "llvm/Support/Compiler.h" 21 #include "llvm/Support/TargetParser.h" 22 23 namespace clang { 24 namespace targets { 25 26 class LLVM_LIBRARY_VISIBILITY ARMTargetInfo : public TargetInfo { 27 // Possible FPU choices. 28 enum FPUMode { 29 VFP2FPU = (1 << 0), 30 VFP3FPU = (1 << 1), 31 VFP4FPU = (1 << 2), 32 NeonFPU = (1 << 3), 33 FPARMV8 = (1 << 4) 34 }; 35 36 enum MVEMode { 37 MVE_INT = (1 << 0), 38 MVE_FP = (1 << 1) 39 }; 40 41 // Possible HWDiv features. 42 enum HWDivMode { HWDivThumb = (1 << 0), HWDivARM = (1 << 1) }; 43 44 static bool FPUModeIsVFP(FPUMode Mode) { 45 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU | FPARMV8); 46 } 47 48 static const TargetInfo::GCCRegAlias GCCRegAliases[]; 49 static const char *const GCCRegNames[]; 50 51 std::string ABI, CPU; 52 53 StringRef CPUProfile; 54 StringRef CPUAttr; 55 56 enum { FP_Default, FP_VFP, FP_Neon } FPMath; 57 58 llvm::ARM::ISAKind ArchISA; 59 llvm::ARM::ArchKind ArchKind = llvm::ARM::ArchKind::ARMV4T; 60 llvm::ARM::ProfileKind ArchProfile; 61 unsigned ArchVersion; 62 63 unsigned FPU : 5; 64 unsigned MVE : 2; 65 66 unsigned IsAAPCS : 1; 67 unsigned HWDiv : 2; 68 69 // Initialized via features. 70 unsigned SoftFloat : 1; 71 unsigned SoftFloatABI : 1; 72 73 unsigned CRC : 1; 74 unsigned Crypto : 1; 75 unsigned DSP : 1; 76 unsigned Unaligned : 1; 77 unsigned DotProd : 1; 78 unsigned HasMatMul : 1; 79 80 enum { 81 LDREX_B = (1 << 0), /// byte (8-bit) 82 LDREX_H = (1 << 1), /// half (16-bit) 83 LDREX_W = (1 << 2), /// word (32-bit) 84 LDREX_D = (1 << 3), /// double (64-bit) 85 }; 86 87 uint32_t LDREX; 88 89 // ACLE 6.5.1 Hardware floating point 90 enum { 91 HW_FP_HP = (1 << 1), /// half (16-bit) 92 HW_FP_SP = (1 << 2), /// single (32-bit) 93 HW_FP_DP = (1 << 3), /// double (64-bit) 94 }; 95 uint32_t HW_FP; 96 97 static const Builtin::Info BuiltinInfo[]; 98 99 void setABIAAPCS(); 100 void setABIAPCS(bool IsAAPCS16); 101 102 void setArchInfo(); 103 void setArchInfo(llvm::ARM::ArchKind Kind); 104 105 void setAtomic(); 106 107 bool isThumb() const; 108 bool supportsThumb() const; 109 bool supportsThumb2() const; 110 bool hasMVE() const; 111 bool hasMVEFloat() const; 112 bool hasCDE() const; 113 114 StringRef getCPUAttr() const; 115 StringRef getCPUProfile() const; 116 117 public: 118 ARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 119 120 StringRef getABI() const override; 121 bool setABI(const std::string &Name) override; 122 123 // FIXME: This should be based on Arch attributes, not CPU names. 124 bool 125 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, 126 StringRef CPU, 127 const std::vector<std::string> &FeaturesVec) const override; 128 129 bool isValidFeatureName(StringRef Feature) const override { 130 // We pass soft-float-abi in as a -target-feature, but the backend figures 131 // this out through other means. 132 return Feature != "soft-float-abi"; 133 } 134 135 bool handleTargetFeatures(std::vector<std::string> &Features, 136 DiagnosticsEngine &Diags) override; 137 138 bool hasFeature(StringRef Feature) const override; 139 140 bool hasBFloat16Type() const override; 141 142 bool isValidCPUName(StringRef Name) const override; 143 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; 144 145 bool setCPU(const std::string &Name) override; 146 147 bool setFPMath(StringRef Name) override; 148 149 bool useFP16ConversionIntrinsics() const override { 150 return false; 151 } 152 153 void getTargetDefinesARMV81A(const LangOptions &Opts, 154 MacroBuilder &Builder) const; 155 void getTargetDefinesARMV82A(const LangOptions &Opts, 156 MacroBuilder &Builder) const; 157 void getTargetDefinesARMV83A(const LangOptions &Opts, 158 MacroBuilder &Builder) const; 159 void getTargetDefines(const LangOptions &Opts, 160 MacroBuilder &Builder) const override; 161 162 ArrayRef<Builtin::Info> getTargetBuiltins() const override; 163 164 bool isCLZForZeroUndef() const override; 165 BuiltinVaListKind getBuiltinVaListKind() const override; 166 167 ArrayRef<const char *> getGCCRegNames() const override; 168 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; 169 bool validateAsmConstraint(const char *&Name, 170 TargetInfo::ConstraintInfo &Info) const override; 171 std::string convertConstraint(const char *&Constraint) const override; 172 bool 173 validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size, 174 std::string &SuggestedModifier) const override; 175 const char *getClobbers() const override; 176 177 StringRef getConstraintRegister(StringRef Constraint, 178 StringRef Expression) const override { 179 return Expression; 180 } 181 182 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 183 184 int getEHDataRegisterNumber(unsigned RegNo) const override; 185 186 bool hasSjLjLowering() const override; 187 188 bool hasExtIntType() const override { return true; } 189 190 const char *getBFloat16Mangling() const override { return "u6__bf16"; }; 191 }; 192 193 class LLVM_LIBRARY_VISIBILITY ARMleTargetInfo : public ARMTargetInfo { 194 public: 195 ARMleTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 196 void getTargetDefines(const LangOptions &Opts, 197 MacroBuilder &Builder) const override; 198 }; 199 200 class LLVM_LIBRARY_VISIBILITY ARMbeTargetInfo : public ARMTargetInfo { 201 public: 202 ARMbeTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 203 void getTargetDefines(const LangOptions &Opts, 204 MacroBuilder &Builder) const override; 205 }; 206 207 class LLVM_LIBRARY_VISIBILITY WindowsARMTargetInfo 208 : public WindowsTargetInfo<ARMleTargetInfo> { 209 const llvm::Triple Triple; 210 211 public: 212 WindowsARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 213 214 void getVisualStudioDefines(const LangOptions &Opts, 215 MacroBuilder &Builder) const; 216 217 BuiltinVaListKind getBuiltinVaListKind() const override; 218 219 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; 220 }; 221 222 // Windows ARM + Itanium C++ ABI Target 223 class LLVM_LIBRARY_VISIBILITY ItaniumWindowsARMleTargetInfo 224 : public WindowsARMTargetInfo { 225 public: 226 ItaniumWindowsARMleTargetInfo(const llvm::Triple &Triple, 227 const TargetOptions &Opts); 228 229 void getTargetDefines(const LangOptions &Opts, 230 MacroBuilder &Builder) const override; 231 }; 232 233 // Windows ARM, MS (C++) ABI 234 class LLVM_LIBRARY_VISIBILITY MicrosoftARMleTargetInfo 235 : public WindowsARMTargetInfo { 236 public: 237 MicrosoftARMleTargetInfo(const llvm::Triple &Triple, 238 const TargetOptions &Opts); 239 240 void getTargetDefines(const LangOptions &Opts, 241 MacroBuilder &Builder) const override; 242 }; 243 244 // ARM MinGW target 245 class LLVM_LIBRARY_VISIBILITY MinGWARMTargetInfo : public WindowsARMTargetInfo { 246 public: 247 MinGWARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 248 249 void getTargetDefines(const LangOptions &Opts, 250 MacroBuilder &Builder) const override; 251 }; 252 253 // ARM Cygwin target 254 class LLVM_LIBRARY_VISIBILITY CygwinARMTargetInfo : public ARMleTargetInfo { 255 public: 256 CygwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 257 258 void getTargetDefines(const LangOptions &Opts, 259 MacroBuilder &Builder) const override; 260 }; 261 262 class LLVM_LIBRARY_VISIBILITY DarwinARMTargetInfo 263 : public DarwinTargetInfo<ARMleTargetInfo> { 264 protected: 265 void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, 266 MacroBuilder &Builder) const override; 267 268 public: 269 DarwinARMTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); 270 }; 271 272 // 32-bit RenderScript is armv7 with width and align of 'long' set to 8-bytes 273 class LLVM_LIBRARY_VISIBILITY RenderScript32TargetInfo 274 : public ARMleTargetInfo { 275 public: 276 RenderScript32TargetInfo(const llvm::Triple &Triple, 277 const TargetOptions &Opts); 278 279 void getTargetDefines(const LangOptions &Opts, 280 MacroBuilder &Builder) const override; 281 }; 282 283 } // namespace targets 284 } // namespace clang 285 286 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H 287